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SLFS043F − SEPTEMBER 1983 − REVISED FEBRUARY 2005
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
DVery Low Power Consumption
− 1 mW Typ at VDD = 5 V
DCapable of Operation in Astable Mode
DCMOS Output Capable of Swinging Rail
to Rail
DHigh Output-Current Capability
− Sink 100 mA Typ
− Source 10 mA Typ
DOutput Fully Compatible With CMOS, TTL,
and MOS
DLow Supply Current Reduces Spikes
During Output Transitions
DSingle-Supply Operation From 2 V to 15 V
DFunctionally Interchangeable With the
NE555; Has Same Pinout
DESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015.2
DAvailable in Q-Temp Automotive
High Reliability Automotive Applications
Configuration Control/Print Support
Qualification to Automotive Standards
description
The TLC555 is a monolithic timing circuit
fabricated using the TI LinCMOS process. The
timer is fully compatible with CMOS, TTL, and
MOS logic and operates at frequencies up to
2 MHz. Because of its high input impedance, this
device uses smaller timing capacitors than those
used by the NE555. As a result, more accurate
time delays and oscillations are possible. Power
consumption is low across the full range of power
supply voltage.
Like the NE555, the TLC555 has a trigger level equal to approximately one-third of the supply voltage and a
threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of
the control voltage terminal (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is
set and the output goes high. If TRIG is above the trigger level and the threshold input (THRES) is above the
threshold level, the flip-flop is reset and the output is low. The reset input (RESET) can override all other inputs
and can be used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output is low.
Whenever the output is low, a low-impedance path is provided between the discharge terminal (DISCH) and
GND. All unused inputs should be tied to an appropriate logic level to prevent false triggering.
While t h e C M O S o u tput is capable of sinking over 100 mA and sourcing over 10 mA, the TLC555 exhibits greatly
reduced supply-current spikes during output transitions. This minimizes the need for the large decoupling
capacitors required by the NE555.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1983−2005, Texas Instruments Incorporated
        !
     "   # 
 $%!  &   % 
&   !
LinCMOS is a trademark of Texas Instruments.
3212019
910111213
4
5
6
7
8
18
17
16
15
14
NC
DISCH
NC
THRES
NC
NC
TRIG
NC
OUT
NC
FK PACKAGE
(TOP VIEW)
NC
GND
NC
CONT
NC V
NC
RESET
NC
NC
DD
D, DB, JG, OR P PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
GND
TRIG
OUT
RESET
VDD
DISCH
THRES
CONT
NC − No internal connection
1
2
3
4
5
6
7
14
13
12
11
10
9
8
GND
NC
TRIG
NC
OUT
NC
RESET
VDD
NC
DISCH
NC
THRES
NC
CONT
PW PACKAGE
(TOP VIEW)
    '(')*)+    
 "$ !   " + 
&   %  &   !
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SLFS043F − SEPTEMBER 1983 − REVISED FEBRUARY 2005
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description (continued)
The TLC555C is characterized for operation from 0°C to 70°C. The TLC555I is characterized for operation from
−40°C to 85°C. The TLC555Q is characterized for operation over the automotive temperature range of −40°C
to 125°C. The TLC555M is characterized for operation over the full military temperature range of −55°C to
125°C.
AVAILABLE OPTIONS
PACKAGED DEVICES
TAVDD
RANGE
SMALL
OUTLINE
(D)SSOP
(DB)CHIP CARRIER
(FK) CERAMIC DIP
(JG) PLASTIC DIP
(P) TSSOP
(PW)
0°C to 70°C2 V to 15 V TLC555CD TLC555CDB TLC555CP TLC555CPW
−40°C to 85°C3 V to 15 V TLC555ID TLC555IP
−40°C to 125°C5 V to 15 V TLC555QD
−55°C to 125°C5 V to 15 V TLC555MD TLC555MFK TLC555MJG TLC555MP
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
This package is available taped and reeled. Add the R suffix to device type (e.g., TLC555CDR).
FUNCTION TABLE
RESET VOLTAGETRIGGER VOLTAGETHRESHOLD VOLTAGEOUTPUT DISCHARGE SWITCH
<MIN Irrelevant Irrelevant L On
>MAX <MIN Irrelevant H Off
>MAX >MAX >MAX L On
>MAX >MAX <MIN As previously established
For conditions shown as MIN or MAX, use the appropriate value specified under electrical characteristics.
functional block diagram
GND
RESET
CONT
VDD
1
THRES
TRIG
R
R
R
DISCH
OUT
S
R
R1
Pin numbers are for all packages except the FK package. RESET can override TRIG, which can override THRES.
5
6
2
1
7
3
4
8
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SLFS043F − SEPTEMBER 1983 − REVISED FEBRUARY 2005
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3
equivalent schematic (each channel)
THRES
CONT
TRIG RESET
VDD
DISCH
OUT
GND
Transistors
COMPONENT COUNT
Resistors 39
5
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SLFS043F − SEPTEMBER 1983 − REVISED FEBRUARY 2005
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD (see Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (any input) 0.3 to VDD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sink current, discharge or output 150 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Source current, output, IO 15 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: C-suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I-suffix −40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Q-suffix −40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M-suffix −55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range 65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package 300°C. . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, DB, P, or PW package 260°C. . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to network GND.
DISSIPATION RATING TABLE
PACKAGE TA 25°C
POWER RATING DERATING FACTOR
ABOVE TA = 25°CTA = 70°C
POWER RATING TA = 85°C
POWER RATING TA = 125°C
POWER RATING
D
DB
FK
JG
P
PW
725 mW
525 mW
1375 mW
1050 mW
1000 mW
525 mW
5.8 mW/°C
4.2 mW/°C
11.0 mW/°C
8.4 mW/°C
8.0 mW/°C
4.2 mW/°C
464 mW
336 mW
880 mW
672 mW
640 mW
336 mW
377 mW
273 mW
715 mW
546 mW
520 mW
273 mW
145 mW
105 mW
275 mW
210 mW
200 mW
105 mW
recommended operating conditions
MIN MAX UNIT
Supply voltage, VDD 2 15 V
TLC555C 0 70
Operating free-air temperature range, TA
TLC555I −40 85
°C
Operating free-air temperature range, T
ATLC555Q −40 125 °
C
TLC555M −55 125
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SLFS043F − SEPTEMBER 1983 − REVISED FEBRUARY 2005
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 2 V for TLC555C, VDD = 3 V for
TLC555I
PARAMETER
TEST
TA
TLC555C TLC555I
UNIT
PARAMETER
TEST
CONDITIONS TA
MIN TYP MAX MIN TYP MAX
UNIT
VIT
25°C 0.95 1.33 1.65 1.6 2.4
V
VIT Threshold voltage Full range 0.85 1.75 1.5 2.5 V
IIT
25°C 10 10
pA
IIT Threshold current MAX 75 150 pA
VI(TRIG)
25°C 0.4 0.67 0.95 0.71 1 1.29
V
VI(TRIG) Trigger voltage Full range 0.3 1.05 0.61 1.39 V
II(TRIG)
25°C 10 10
pA
II(TRIG) Trigger current MAX 75 150 pA
VI(RESET)
25°C 0.4 1.1 1.5 0.4 1.1 1.5
V
VI(RESET) Reset voltage Full range 0.3 2 0.3 1.8 V
II(RESET)
25°C 10 10
pA
II(RESET) Reset current MAX 75 150 pA
Control voltage (open circuit) as
a percentage of supply voltage MAX 66.7% 66.7%
IOL = 1 mA
25°C 0.03 0.2 0.03 0.2
V
voltage IOL = 1 mA Full range 0.25 0.375 V
25°C 0.1 0.1
nA
current MAX 0.5 120 nA
VOH
IOH = −300 A
25°C 1.5 1.9 2.5 2.85
V
VOH High-level output voltage IOH = −300 µAFull range 1.5 2.5 V
VOL
IOL = 1 mA
25°C 0.07 0.3 0.07 0.3
V
VOL Low-level output voltage IOL = 1 mA Full range 0.35 0.4 V
IDD
See Note 2
25°C 250 250
µA
I
DD
See Note 2
Full range 400 500 µ
A
Full range is 0°C to 70°C for the TLC555C and −40°C to 85°C for the TLC555I. For conditions shown as MAX, use the appropriate value specified
in the recommended operating conditions table.
NOTE 2: These values apply for the expected operating configurations in which THRES is connected directly to DISCH or to TRIG.
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SLFS043F − SEPTEMBER 1983 − REVISED FEBRUARY 2005
6POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 5 V
PARAMETER
TEST
TA
TLC555C TLC555I TLC555Q, TLC555M
UNIT
PARAMETER
TEST
CONDITIONS TA
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT
VIT
Threshold voltage
25°C2.8 3.3 3.8 2.8 3.3 3.8 2.8 3.3 3.8
V
V
IT Threshold voltage Full range 2.7 3.9 2.7 3.9 2.7 3.9 V
IIT
Threshold current
25°C10 10 10
pA
IIT Threshold current MAX 75 150 5000 pA
VI(TRIG)
Trigger voltage
25°C1.36 1.66 1.96 1.36 1.66 1.96 1.36 1.66 1.96
V
VI(TRIG) Trigger voltage Full range 1.26 2.06 1.26 2.06 1.26 2.06 V
II(TRIG)
Trigger current
25°C10 10 10
pA
II(TRIG) Trigger current MAX 75 150 5000 pA
VI(RESET)
Reset voltage
25°C0.4 1.1 1.5 0.4 1.1 1.5 0.4 1.1 1.5
V
VI(RESET
)
Reset voltage Full range 0.3 1.8 0.3 1.8 0.3 1.8 V
II(RESET)
Reset current
25°C10 10 10
pA
II(RESET) Reset current MAX 75 150 5000 pA
Control voltage (open
circuit) as a percent-
age of supply voltage MAX 66.7% 66.7% 66.7%
Discharge switch
IOL = 10 mA
25°C0.14 0.5 0.14 0.5 0.14 0.5
V
Discharge switch
on-state voltage IOL = 10 mA Full range 0.6 0.6 0.6 V
Discharge switch
25°C0.1 0.1 0.1
nA
Discharge switch
off-state current MAX 0.5 120 120 nA
VOH
High-level output
IOH = − 1 mA
25°C4.1 4.8 4.1 4.8 4.1 4.8
V
VOH
High-level output
voltage IOH = − 1 mA Full range 4.1 4.1 4.1 V
IOL = 8 mA
25°C0.21 0.4 0.21 0.4 0.21 0.4
IOL = 8 mA Full range 0.5 0.5 0.6
VOL
Low-level output
IOL = 5 mA
25°C0.13 0.3 0.13 0.3 0.13 0.3
V
VOL
Low-level output
voltage IOL = 5 mA Full range 0.4 0.4 0.45 V
voltage
IOL = 3.2 mA
25°C0.08 0.3 0.08 0.3 0.08 0.3
IOL = 3.2 mA Full range 0.35 0.35 0.4
IDD
Supply current
See Note 2
25°C170 350 170 350 170 350
µA
IDD Supply current See Note 2 Full range 500 600 700 µA
Full range is 0°C to 70°C the for TLC555C, −40°C to 85°C for the TLC555I, −40°C to 125°C for the TLC555Q, and −55°C to 125°C for the
TLC555M. For conditions shown as MAX, use the appropriate value specified in the recommended operating conditions table.
NOTE 2: These values apply for the expected operating configurations in which THRES is connected directly to DISCH or TRIG.
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SLFS043F − SEPTEMBER 1983 − REVISED FEBRUARY 2005
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 15 V
PARAMETER
TEST
CONDITIONS
TA
TLC555C TLC555I TLC555Q, TLC555M
UNIT
PARAMETER
TEST
CONDITIONS TA
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT
VIT
Threshold voltage
25°C 9.45 10 10.55 9.45 10 10.55 9.45 10 10.55
V
VIT Threshold voltage Full range 9.35 10.65 9.35 10.65 9.35 10.65 V
IIT
Threshold current
25°C 10 10 10
pA
IIT Threshold current MAX 75 150 5000 pA
VI(TRIG)
Trigger voltage
25°C 4.65 5 5.35 4.65 5 5.35 4.65 5 5.35
V
VI(TRIG) Trigger voltage Full range 4.55 5.45 4.55 5.45 4.55 5.45 V
II(TRIG)
Trigger current
25°C 10 10 10
pA
II(TRIG) Trigger current MAX 75 150 5000 pA
VI(RESET)
Reset voltage
25°C 0.4 1.1 1.5 0.4 1.1 1.5 0.4 1.1 1.5
V
VI(RESET
)
Reset voltage Full range 0.3 1.8 0.3 1.8 0.3 1.8 V
II(RESET)
Reset current
25°C 10 10 10
pA
II(RESET) Reset current MAX 75 150 5000 pA
Control voltage (open
circuit) as a percent-
age of supply voltage MAX 66.7% 66.7% 66.7%
Discharge switch
IOL = 100 mA
25°C 0.77 1.7 0.77 1.7 0.77 1.7
V
Discharge switch
on-state voltage IOL = 100 mA Full range 1.8 1.8 1.8 V
Discharge switch
25°C 0.1 0.1 0.1
nA
Discharge switch
off-state current MAX 0.5 120 120 nA
IOH = − 10 mA
25°C 12.5 14.2 12.5 14.2 12.5 14.2
IOH = − 10 mA Full range 12.5 12.5 12.5
VOH
High-level output
IOH = − 5 mA
25°C 13.5 14.6 13.5 14.6 13.5 14.6
V
VOH
High-level output
voltage IOH = − 5 mA Full range 13.5 13.5 13.5 V
IOH = − 1 mA
25°C 14.2 14.9 14.2 14.9 14.2 14.9
IOH = − 1 mA Full range 14.2 14.2 14.2
IOL = 100 mA
25°C 1.28 3.2 1.28 3.2 1.28 3.2
IOL = 100 mA Full range 3.6 3.7 3.8
VOL
Low-level output
IOL = 50 mA
25°C 0.63 1 0.63 1 0.63 1
V
VOL
Low-level output
voltage IOL = 50 mA Full range 1.3 1.4 1.5 V
IOL = 10 mA
25°C 0.12 0.3 0.12 0.3 0.12 0.3
IOL = 10 mA Full range 0.4 0.4 0.45
IDD
Supply current
See Note 2
25°C 360 600 360 600 360 600
µA
IDD Supply current See Note 2 Full range 800 900 1000 µA
Full range is 0°C to 70°C for TLC555C, −40°C to 85°C for TLC555I, −40°C to 125°C for the TLC555Q, and −55°C to 125°C for TLC555M. For
conditions shown as MAX, use the appropriate value specified in the recommended operating conditions table.
NOTE 2: These values apply for the expected operating configurations in which THRES is connected directly to DISCH or TRIG.
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SLFS043F − SEPTEMBER 1983 − REVISED FEBRUARY 2005
8POST OFFICE BOX 655303 DALLAS, TEXAS 75265
operating characteristics, VDD = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Initial error of timing interval
VDD = 5 V to 15 V,
RA = RB = 1 k
to 100 k
,
1% 3%
Supply voltage sensitivity of timing interval
VDD = 5 V to 15 V,
CT = 0.1 µF,
RA = RB = 1 k to 100 k,
See Note 3 0.1 0.5 %/V
trOutput pulse rise time
RL = 10 M
CL = 10 pF
20 75
ns
tfOutput pulse fall time RL = 10 MΩ, CL = 10 pF 15 60 ns
fmax Maximum frequency in astable mode RA = 470 Ω,
CT = 200 pF, RB = 200 Ω,
See Note 3 1.2 2.1 MHz
Timing interval error is defined as the difference between the measured value and the average value of a random sample from each process
run.
NOTE 3: RA, RB, and CT are as defined in Figure 1.
electrical characteristics at VDD = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIT Threshold voltage 2.8 3.3 3.8 V
IIT Threshold current 10 pA
VI(TRIG) Trigger voltage 1.36 1.66 1.96 V
II(TRIG) Trigger current 10 pA
VI(RESET) Reset voltage 0.4 1.1 1.5 V
II(RESET) Reset current 10 pA
Control voltage (open circuit) as a percentage of supply voltage 66.7%
Discharge switch on-state voltage IOL = 10 mA 0.14 0.5 V
Discharge switch off-state current 0.1 nA
VOH High-level output voltage IOH = − 1 mA 4.1 4.8 V
IOL = 8 mA 0.21 0.4
V
OL
Low-level output voltage IOL = 5 mA 0.13 0.3 V
VOL
Low-level output voltage
IOL = 3.2 mA 0.08 0.3
V
IDD Supply current See Note 2 170 350 µA
NOTE 2: These values apply for the expected operating configurations in which THRES is connected directly to DISCH or TRIG.
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SLFS043F − SEPTEMBER 1983 − REVISED FEBRUARY 2005
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 1
2
1
−75 − 50 − 25 0 25 75 125
Discharge Switch On-State Resistance −
DISCHARGE SWITCH ON-STATE RESISTANCE
vs
FREE-AIR TEMPERATURE
50 100
10
4
20
100
40
7
70
TA − Free-Air Temperature − °C
VDD = 2 V, IO = 1 mA
VDD = 5 V, IO = 10 mA
VDD = 15 V, IO = 100 mA
Figure 2
100
00 2 4 6 8 12 16
PROPAGATION DELAY TIMES TO DISCHARGE
OUTPUT FROM TRIGGER AND THRESHOLD
SHORTED TOGETHER
vs
SUPPLY VOLTAGE
10 14
400
200
500
600
300
VDD − Supply Voltage − V 2018
PHL
t,
PLH
t − Propagation Delay Times − ns
tPLH
IO(on) 1 mA
CL 0
TA = 25°C
The effects of the load resistance on these values must be
taken into account separately.
tPHL
APPLICATION INFORMATION
0.1 µF
0.1 µF
CT
CL
RL
Output
RB
RA
GND
TRIG
THRES
RESET
DISCH
CONT VDD
OUT
VDD
2/3 VDD
1/3 VDD
GND
tPHL
tPLH
tc(H) tc(L)
CIRCUIT
TRIGGER AND THRESHOLD VOLTAGE WAVEFORM
TLC555
6
1
3
85
4
7
2
Pin numbers shown are for all packages except the
FK package.
Figure 3. Astable Operation

 
SLFS043F − SEPTEMBER 1983 − REVISED FEBRUARY 2005
10 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
Connecting TRIG to THRES, as shown in Figure 3, causes the timer to run as a multivibrator. The capacitor CT
charges through RA and RB to the threshold voltage level (approximately 0.67 VDD) and then discharges through RB
only to the value of the trigger voltage level (approximately 0.33 VDD). The output is high during the charging cycle
(tc(H)) and low during the discharge cycle (tc(L)). The duty cycle is controlled by the values of RA, RB, and CT as shown
in the equations below.
tc(H) [CT(RA)RB)In2 (In2 +0.693)
tc(L) [CTRBIn 2
Period +tc(H) )tc(L) [CT(RA)2RB)In2
Output driver duty cycle +
tc(L)
tc(H) )tc(L) [1– RB
RA)2RB
Output waveform duty cycle +
tc(H)
tc(H) )tc(L) [RB
RA)2RB
The 0.1-µF capacitor at CONT in Figure 3 decreases the period by about 10%.
The formulas shown above do not allow for any propagation delay times from the TRIG and THRES inputs to DISCH.
These delay times add directly to the period and create differences between calculated and actual values that
increase with frequency. In addition, the internal on-state resistance ron during discharge adds to RB to provide
another source of timing error in the calculation when RB is very low or ron is very high.
The equations below provide better agreement with measured values.
tc(H) +CT(RA)RB)Inƪ3–expǒ–tPLH
CT(RB)ron)Ǔƫ)tPHL
tc(L) +CT(RB)ron)Inƪ3–expǒ–tPHL
CT(RA)RB)Ǔƫ)tPLH
These equations and those given earlier are similar in that a time constant is multiplied by the logarithm of a number
or function. The limit values of the logarithmic terms must be between In 2 at low frequencies and In 3 at extremely
high frequencies. For a duty cycle close to 50%, an appropriate constant for the logarithmic terms can be substituted
with good results. Duty cycles less than 50% tc(H)
tc(H) )tc(L) require that tc(H)
tc(L) <1 and possibly RA ron. These
conditions can be difficult to obtain.
In monostable applications, the trip point on TRIG can be set by a voltage applied to CONT. An input voltage between
10% and 80% of the supply voltage from a resistor divider with at least 500-µA bias provides good results.
PACKAGE OPTION ADDENDUM
www.ti.com 27-Apr-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
5962-89503012A ACTIVE LCCC FK 20 1 TBD Call TI Call TI
5962-8950301PA ACTIVE CDIP JG 8 1 TBD Call TI Call TI
TLC555CD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC555CDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC555CDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC555CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC555CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC555CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC555CPSR ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC555CPSRG4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC555CPW ACTIVE TSSOP PW 14 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC555CPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC555CPWR ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC555CPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC555ID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC555IDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC555IDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC555IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC555IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
PACKAGE OPTION ADDENDUM
www.ti.com 27-Apr-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TLC555IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC555MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
TLC555MJG ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
TLC555MJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
TLC555MP OBSOLETE PDIP P 8 TBD Call TI Call TI
TLC555QDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC555QDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLC555, TLC555M :
PACKAGE OPTION ADDENDUM
www.ti.com 27-Apr-2012
Addendum-Page 3
Catalog: TLC555
Automotive: TLC555-Q1, TLC555-Q1
Military: TLC555M
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TLC555CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLC555CPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
TLC555CPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TLC555IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TLC555QDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TLC555CDR SOIC D 8 2500 340.5 338.1 20.6
TLC555CPSR SO PS 8 2000 367.0 367.0 38.0
TLC555CPWR TSSOP PW 14 2000 367.0 367.0 35.0
TLC555IDR SOIC D 8 2500 340.5 338.1 20.6
TLC555QDR SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUAR Y 1997
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE
0.310 (7,87)
0.290 (7,37)
0.014 (0,36)
0.008 (0,20)
Seating Plane
4040107/C 08/96
5
4
0.065 (1,65)
0.045 (1,14)
8
1
0.020 (0,51) MIN
0.400 (10,16)
0.355 (9,00)
0.015 (0,38)
0.023 (0,58)
0.063 (1,60)
0.015 (0,38)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.245 (6,22)
0.280 (7,11)
0.100 (2,54)
0°–15°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
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