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74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs

74LCX157 Rev. 1.3

April 2015

74LCX157

Low Vo ltage Quad 2-Input Multiplexer

with 5 V Tolerant Inputs

Features

• 5 V Tolerant Inputs

• 2.3 V – 3.6 V, VCC Specifications Provided

• 5.8 ns tPD max. (VCC = 3.3 V), 10 μA ICC max.

• Power Down High Impedance Inputs and Outputs

• ±24 mA Output Drive (VCC = 3.0 V)

• Implemen ts Pate nted Noise/EMI Reduction Circuitry

• Latch-Up Performance Exceeds 500 mA

• ESD Performance:

Human Body Model > 2000 V

Machine Model > 200 V

Ordering Information

Part Number Top Mark Package Packing Method

74LCX157M LCX157 SOIC 16L Rail

74LCX157MX LCX157 SOIC 16L Tape and Reel

74LCX157MTC LCX157 TSSOP 16L Rail

74LCX157MTCX LCX157 TSSOP 16L Tape and Reel

General Description

The LCX157 is a high-speed quad 2-input multiplexer.

Four bits of data from two sources can be selected using

the common Select and Enable inputs. The four outputs

present the selected data in the true (noninverted) form.

The LCX157 can also be used as a function generator.

The 74LCX157 is fabricated with advanced CMOS tech-

nology to achieve high speed operation while maintain-

ing CMOS low power dissipation.

74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs

74LCX157 Rev. 1.3 2

Logic Symbols Connection Diagram

Pin Descriptions

Functional Description

The LCX157 is a quad 2-input multiplexer. It selects four

bits of data from two sources under the control of a com-

mon Select input (S). The Enable input (E) is active-LOW.

When E is HIGH, all of the outputs (Z) are forced LOW

regardless of all other inputs. The LCX157 is the logic

implementation of a 4-pole, 2-position switch where the

position of the switch is determined by the logic levels

supplied to the Select input. The logic equations for the

outputs are shown below:

Za = E • (I1a • S + I0a • S)

Zb = E • (I1b • S + I0b • S)

Zc = E • (I1c • S + I0c • S)

Zd = E • (I1d • S + I0d • S)

A common use of the LCX157 is the moving of data from

two groups of registers to four common output busses.

The particular register from which the data comes is

determined by the state of the Select input. A less obvi-

ous use is as a function generator. The LCX157 can gen-

erate any four of the sixteen different functions of two

variables with one variable common. This is useful for

implementing gating functions.

Truth Table

IEEE/IEC

Pin Names Description

I0a–I0d Source 0 Data Inputs

I1a–I1d Source 1 Data Inputs

EEnable Input

S Select Input

Za–ZdOutputs

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

Inputs Outputs

ESI

0I1Z

HX X X L

LH X L L

LH X H H

LL L X L

LL H X H

74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs

74LCX157 Rev. 1.3 3

Logic Diagram(1)

Note:

1. Please note that this diagram is provided only for the understanding of logic operations and should not be used to

estimate propagation delays.

Absolute Maximum Ratings(2)

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-

ble above the reco mmen de d ope rati ng conditions and stressing the part s to the se lev el s is not rec ommen ded . In add i-

tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The

absolute maximum ratings are stress ratings only.

Notes:

2. The Absolute Maximum Ratings are thos e values beyond which the safety of the device cannot be guaranteed. The

device should not be ope rated at these li mit s. The p arametric va lues define d in the Electrical Characteris tics t ables are

not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the

conditions for actual device operation.

3. IO Absolute Maximum Rating must be observed.

Symbol Parameter Value Conditions Unit

VCC Supply Voltage -0.5 to +7.0 V

VIDC Input Voltage -0.5 to +7.0 V

VODC Output Voltage -0.5 to VCC+0.5 Output in HIGH or LOW State(3) V

IIK DC Input Diode Current -50 VI < GND mA

IOK DC Output Diode Current -50 VO < GND mA

+50 VO > VCC

IODC Output Source/Sink Current ±50 mA

ICC DC Supply Current per Supply Pin ±100 mA

IGND DC Ground Current per Ground Pin ±100 mA

TSTG Storage Temperature -65 to +150 °C

74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs

74LCX157 Rev. 1.3 4

Recommended Operating Conditions(4)

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to absolute maximum ratings.

Note:

4. Unused inputs must be held HIGH or LOW. They may not float.

DC Electrical Characteristics

Symbol Parameter Min. Max. Unit

VCC Supply Voltage Operating 2.0 3.6 V

VIN Input Voltage 0 5.5 V

VOUT Output Voltage HIGH or LOW State 0 VCC V

IOH/IOL Output Current VCC = 3.0 V - 3.6 V ±24 mAVCC = 2.7 V - 3.0 V ±12

VCC = 2.3 V - 2.7 V ±8

TAFree-Air Operat ing Temperature -40 85 °C

Δt/ΔV Input Edge Rate, VIN = 0.8 V - 2.0 V, VCC = 3.0 V 0 10 ns/V

Symbol Parameter Conditions VCC (V) TA = -40 to +85°C Unit

Min. Max.

VIH HIGH Level Input Voltage 2.3 - 2.7 1.7 V

2.7 - 3.6 2.0

VIL LOW Level In put Voltage 2.3 - 2.7 0.7 V

2.7 - 3.6 0.8

VOH HIGH Level Output Voltage

IOH = -100 μA 2.3 - 3.6 VCC - 0.2

IOH = -8 mA 2.3 1.8

IOH = -12 mA 2.7 2.2

IOH = -18 mA 3.0 2.4

IOH = -24 mA 3.0 2.2

VOL LOW Level Output Voltage

IOL = 100 μA 2.3 - 3.6 0.2

IOL = 8 mA 2.3 0.6

IOL = 12 mA 2.7 0.4

IOL = 16 mA 3.0 0.4

IOL = 24 mA 3.0 0.55

IIInput Leakage Current 0 ≤ VI ≤ 5.5 V 2.3 - 3.6 ±5.0 μA

IOFF Power-Off Leakage Current VI or VO = 5.5 V 0 10 μA

ICC Quiescent Supply Current VI = VCC or GND 2.3 - 3.6 10 μA

3.6 V ≤ VI ≤ 5.5 V 2.3 - 3.6 ±10

ΔICC Increase in ICC per Input VIH = VCC - 0.6 V 2.3 - 3.6 500 μA

74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs

74LCX157 Rev. 1.3 5

AC Electrical Characteristics

Note:

5. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate

outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-

LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design.

Dynamic Switching Characteristics

Capacitance

Symbol Parameter

TA = -40 to +85°C, RL = 500 Ω

Unit

VCC = 3.3 V ± 0.3 V VCC = 2.7 V VCC = 2.5 V ± 0.2 V

CL = 50 pF CL = 50 pF CL = 30 pF

Min. Max. Min. Max. Min. Max.

tPHL Propagation Delay

S -> Zn

1.5 7.0 1.5 8.0 1.5 8.4 ns

tPLH 1.5 7.0 1.5 8.0 1.5 8.4

tPHL Propagation Delay

E -> Zn

1.5 7.0 1.5 8.0 1.5 8.4 ns

tPLH 1.5 7.0 1.5 8.0 1.5 8.4

tPHL Propagation Delay

In -> Zn

1.5 5.8 1.5 6.3 1.5 7.0 ns

tPLH 1.5 5.8 1.5 6.3 1.5 7.0

tOSHL Output to Output Skew(5) 1.0 ns

tOSLH 1.0

Symbol Parameter Conditions VCC (V) TA = 25°C Unit

Typical

VOLP Quiet Output Dynamic Peak VOL CL = 50 pF, VIH = 3.3 V, V IL = 0 V 3.3 0.8 V

CL = 30 pF, VIH = 2.5 V, VIL = 0 V 2.5 0.6

VOLV Quiet Output Dynamic Valley VOL CL = 50 pF, VIH = 3.3 V, VIL = 0 V 3.3 -0.8 V

CL = 30 pF, VIH = 2.5 V, VIL = 0 V 2.5 -0.6

Symbol Parameter Conditions Typical Unit

CIN Input Capacitance VCC = Open, VI = 0 V or VCC 7pF

COUT Output Capacitance VCC = 3.3 V, VI = 0 V or VCC 8pF

CPD Power Dissipation Capacit a nce VCC = 3.3 V, VI = 0 V or VCC, f = 10 MHz 25 pF

74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs

74LCX157 Rev. 1.3 6

AC Loading and Waveforms Generic for LCX Family

Figure 1. AC Test Circuit (CL includes probe and jig capacitance)

Waveform for Inverting and Non-Inve rting Functions 3-STATE Output Low Enable and

Disable Times for Logic

Propagation Delay. Pulse Width and trec Waveforms Setup Time, Hold Time and Recovery Time for Logic

3-STATE Output High Enable and

Disable Times for Logic trise and tfall

Figure 2. W aveforms

(Input Characteristics; f = 1 MHz, tr = tf = 3 ns)

Test Switch

tPLH, tPHL Open

tPZL, tPLZ 6V at VCC = 3.3 ± 0.3V

VCC x 2 at VCC = 2.5 ± 0.2V

tPZH, tPHZ GND

Symbol VCC

3.3V ± 0.3V 2.7V 2.5V ± 0.2V

Vmi 1.5V 1.5V VCC/2

Vmo 1.5V 1.5V VCC/2

VxVOL + 0.3V VOL + 0.3V VOL + 0.15V

VyVOH − 0.3V VOH − 0.3V VOH − 0.15V

74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs

74LCX157 Rev. 1.3 7

Schematic Diagram Generic for LCX Family

74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs

74LCX157 Rev. 1.3 8

Physical Dimensions

Figure 3. 16-LEAD, SOIC, JEDEC MS-012, 0.150 INCH, NARROW BODY

X 45°

DETAIL A

SCALE: 2:1

8°

0°

NOTES: UNLESS OTHERWISE SPECIFIED

A) THIS PACKAGE CONFORMS TO JEDEC

MS-012, VARIATION AC, ISSUE C.

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD

FLASH AND TIE BAR PROTRUSIONS

D) CONFORMS TO ASME Y14.5M-1994

E) LANDPATTERN STANDARD: SOIC127P600X175-16AM

F) DRAWING FILE NAME: M16AREV12.

SEATING PLANE

GAGE PLANE

C0.10

SEE DETAIL A

LAND PATTERN RECOMMENDATION

PIN ONE

INDICATOR

0.25

CBA

5.6

1.27 0.65

1.75

10.00

9.80

8.89

6.00

1.27

(0.30)

0.51

0.35

1.75 MAX

1.50

1.25

0.25

0.10

0.25

0.19

(1.04)

0.90

0.50

0.36

(R0.10)

0.50

0.25

4.00

3.80

74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs

74LCX157 Rev. 1.3 9

Physical Dimensions (Continued)

Figure 4. 16-LEAD, TSSOP, JEDEC MO-153, 4.4 MM WIDE

0.65

4.4±0.1

MTC16rev4

0.11

4.55

5.00

5.00±0.10

12°

7.354.45

1.45

5.90

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