VNS1NV04DPTR-E - STMicroelectronics

April 2010 Doc ID 17344 Rev 2 1/24

VNS1NV04DP-E

OMNIFET II

fully autoprotected Power MOSFET

Features

■Linear current limitation

■Thermal shutdown

■Short circuit protection

■Integrated clamp

■Low current drawn from input pin

■Diagnostic feedback through input pin

■ESD protection

■Direct access to the gate of the power mosfet

(analog driving)

■Compatible with standard power mosfet

■In compliance with the 2002/95/EC european

directive

Description

The VNS1NV04DP-E is a device formed by two

monolithic OMNIFET II chips housed in a

standard SO-8 package. The OMNIFET II are

designed in STMicroelectronics VIPower™ M0-3

technology: they are intended for replacement of

standard Power MOSFETs from DC up to 50KHz

applications. Built in thermal shutdown, linear

current limitation and overvoltage clamp protects

the chip in harsh environments.

Fault feedback can be detected by monitoring the

voltage at the input pin.

Max On-state resistance(1)

1. Per each device.

RDS(ON)250mΩ

Current limitation (typ)(1) ILIMH 1.7A

Drain-Source clamp voltage(1) V

CLAMP 40V

SO-8

Table 1. Device summary

Package

Order codes

Tube Tape and reel

SO-8 VNS1NV04DP-E VNS1NV04DPTR-E

www.st.com

Contents VNS1NV04DP-E

2/24 Doc ID 17344 Rev 2

Contents

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.1 Overvoltage clamp protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.2 Linear current limiter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.3 Overtemperature and short circuit protection . . . . . . . . . . . . . . . . . . . . . . 16

3.4 Status feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5.2 SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5.3 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

VNS1NV04DP-E List of tables

Doc ID 17344 Rev 2 3/24

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4. Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 5. On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 6. Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 7. Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 8. Source Drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 9. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 10. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Table 11. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Table 12. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

List of figures VNS1NV04DP-E

4/24 Doc ID 17344 Rev 2

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 4. Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 5. Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 6. Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 7. Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 8. Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 9. Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 10. Static drain-source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 11. Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 12. Static drain-source on resistance vs input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 13. Static drain-source on resistance vs input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 14. Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 15. Static drain-source on resistance vs id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 16. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 17. Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 18. Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 19. Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 20. Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 21. Turn-off drain-source voltage slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 22. Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 23. Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 24. Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 25. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 26. Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 27. Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 28. Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 29. Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 30. SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 31. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 32. SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 33. Thermal fitting model of a double channel HSD in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 34. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 35. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 36. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

VNS1NV04DP-E Block diagram and pin description

Doc ID 17344 Rev 2 5/24

1 Block diagram and pin description

Figure 1. Block diagram

Figure 2. Configuration diagram (top view)

SOURCE2

OVERVOLTAGE

LINEAR

DRAIN1

SOURCE1

CLAMP

CURRENT

LIMITER

OVER

TEMPERATURE

GATE

CONTROL

DRAIN2

OVERVOLTAGE

CLAMP

LINEAR

CURRENT

LIMITER

GATE

CONTROL

OVER

TEMPERATURE

INPUT2

INPUT1

DRAIN 2

DRAIN 1

DRAIN 2

DRAIN 1

INPUT 2

SOURCE 1

SOURCE 2

INPUT 1

Electrical specifications VNS1NV04DP-E

6/24 Doc ID 17344 Rev 2

2 Electrical specifications

Figure 3. Current and voltage conventions

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may

cause permanent damage to the device. These are stress ratings only and operation of the

device at these or any other conditions above those indicated in the operating sections of

this specification is not implied. Exposure to Absolute maximum rating conditions for

extended periods may affect device reliability. Refer also to the STMicroelectronics SURE

program and other relevant quality document.

DRAIN 1

INPUT 1

SOURCE 2

IIN1

VIN1

INPUT 2

IIN2

SOURCE 1

DRAIN 2

VIN2

ID2

ID1

VDS1

RIN1

RIN2

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

VDSn Drain-source voltage (VINn = 0 V) Internally clamped V

VINn Input voltage Internally clamped V

IINn Input current +/-20 mA

RIN MINn Minimum input series impedance 330 Ω

IDn Drain current Internally limited A

IRn Reverse DC output current -3 A

VESD1 Electrostatic discharge (R = 1.5 KΩ, C = 100 pF) 4000 V

VESD2

Electrostatic discharge on output pins only

(R = 330 Ω, C = 150 pF) 16500 V

Ptot Total dissipation at Tc=25°C 4 W

TjOperating junction temperature Internally limited °C

TcCase operating temperature Internally limited °C

Tstg Storage temperature -55 to 150 °C

VNS1NV04DP-E Electrical specifications

Doc ID 17344 Rev 2 7/24

2.2 Thermal data

2.3 Electrical characteristics

Table 3. Thermal data

Symbol Parameter Max. value Unit

Rthj-lead Thermal resistance junction-lead (per channel) 30 °C/W

Rthj-amb Thermal resistance junction-ambient See Figure 31 °C/W

Table 4. Off(1)

1. -40 °C < Tj< 150 °C, unless otherwise specified.

Symbol Parameter Test conditions Min. Typ. Max. Unit

VCLAMP

Drain-source clamp

voltage VIN =0V; I

D= 0.5 A 40 45 55 V

VCLTH

Drain-source clamp

threshold voltage VIN =0V; I

D=2mA 36 V

VINTH

Input threshold

voltage VDS =V

IN; ID=1mA 0.5 2.5 V

IISS

Supply current from

input pin VDS =0V; V

IN = 5 V 100 150 µA

VINCL

Input-source clamp

voltage

IIN =1mA

IIN =-1mA

-1.0

6.8 8

-0.3

IDSS

Zero input voltage

drain current

(VIN =0V)

VDS =13V; V

IN =0V; T

j=25°C

VDS = 25V; V

IN =0V

µA

Table 5. On(1)

1. -40 °C < Tj< 150 °C, unless otherwise specified.

Symbol Parameter Test conditions Min. Typ. Max. Unit

RDS(on)

Static drain-source on

resistance

VIN =5V; I

D= 0.5 A; Tj= 25°C

VIN =5V; I

D=0.5A

250

500

mΩ

Table 6. Dynamic(1)

1. Tj = 25 °C, unless otherwise specified.

Symbol Parameter Test conditions Min. Typ. Max. Unit

gfs (1) Forward

transconductance VDD =13V; I

D=0.5A 2 S

COSS Output capacitance VDS =13V; f=1MHz; V

IN = 0 V 90 pF

Electrical specifications VNS1NV04DP-E

8/24 Doc ID 17344 Rev 2

Table 7. Switching(1)

1. Tj = 25 °C, unless otherwise specified.

Symbol Parameter Test conditions Min. Typ. Max. Unit

td(on) Turn-on delay time

VDD =15V; I

D=0.5A;

Vgen =5V; R

gen =R

IN MIN =330Ω

(see Figure 4)

70 200 ns

trRise time 170 500 ns

td(off) Turn-off delay time 350 1000 ns

tfFall time 200 600 ns

td(on) Turn-on delay time

VDD =15V; I

D=0.5A

Vgen =5V; R

gen =2.2KΩ

(see Figure 4)

0.25 1 µs

trRise time 1.3 4 µs

td(off) Turn-off delay time 1.8 5.5 µs

tfFall time 1.2 4 µs

(dI/dt)on Turn-on current slope VDD =15V; I

D=1.5A

Vgen =5V; R

gen =R

IN MIN =330Ω5A/µs

QiTotal input charge VDD =12V; I

D= 0.5 A; VIN =5V

Igen = 2.13 mA (see Figure 7)5nC

Table 8. Source Drain diode(1)

1. Tj = 25 °C, unless otherwise specified.

Symbol Parameter Test conditions Min. Typ. Max. Unit

VSD(2)

2. Pulsed: pulse duration = 300µs, duty cycle 1.5%.

Forward on voltage ISD = 0.5 A; VIN =0V - 0.8 - V

trr Reverse recovery time ISD = 0.5 A; dI/dt = 6 A/µs

VDD = 30 V; L = 200 µH

(see Figure 5)

- 205 - ns

Qrr Reverse recovery charge - 100 - nC

IRRM Reverse recovery current - 0.75 - A

Table 9. Protections(1)

1. -40 °C < Tj < 150 °C, unless otherwise specified.

Symbol Parameter Test conditions Min. Typ. Max. Unit

Ilim Drain current limit VIN =5V; V

DS =13V 1.7 3.5 A

tdlim Step response current

limit VIN =5V; V

DS =13V 2 µs

Tjsh Overtemperature

shutdown 150 175 200 °C

Tjrs Overtemperature reset 135 °C

Igf Fault sink current VIN =5V; V

DS =13V; T

j=T

jsh 10 15 20 mA

Eas Single pulse

avalanche energy

Starting Tj=25°C; V

DD =24V

VIN =5V R

gen =R

IN MIN = 330 Ω;

L=50mH

(see Figure 6 and Figure 8)

55 mJ

VNS1NV04DP-E Electrical specifications

Doc ID 17344 Rev 2 9/24

Figure 4.

Switching time test circuit for resistive load

Figure 5.

Test circuit for diode recovery times

90%

10%

gen

d(on)

d(off)

gen

L=100uH

8.5

gen

FAST

DIODE

OMNIFET

330

OMNIFET

gen

Electrical specifications VNS1NV04DP-E

10/24 Doc ID 17344 Rev 2

Figure 6. Unclamped inductive load test circuits

Figure 7. Input charge test circuit

GEN

ND8003

VIN

VNS1NV04DP-E Electrical specifications

Doc ID 17344 Rev 2 11/24

Figure 8. Unclamped inductive waveforms

Electrical specifications VNS1NV04DP-E

12/24 Doc ID 17344 Rev 2

2.4 Electrical characteristics curves

Figure 9. Source-drain diode forward

characteristics

Figure 10. Static drain-source on

resistance

Figure 11. Derating curve Figure 12. Static drain-source on

resistance vs input voltage

(part 1/2)

Figure 13. Static drain-source on

resistance vs input voltage

(part 2/2)

Figure 14. Transconductance

02468101214

Id (A)

700

750

800

850

900

950

1000

Vsd (mV)

Vin=0V

0 0.05 0.1 0.15 0.2 0.25 0.3

Id(A)

0.5

1.5

2.5

3.5

4.5

Rds(on) (ohms)

Tj=25ºC

Tj=150ºC

Tj=-40ºC

Vin=2.5V

33.544.555.566.57

Vin(V)

100

150

200

250

300

350

400

450

500

Rds(on) (mohms)

Id=0.5A

Tj=150ºC

Tj=-40ºC

Tj=25ºC

3 3.5 4 4.5 5 5.5 6 6.5

Vin(V)

100

150

200

250

300

350

400

450

500

Rds(on) (mohms)

Id=1.5A

Id=1A

Id=1.5A

Id=1A

Id=1.5A

Id=1A

Tj=25ºC

Tj=150ºC

Tj=-40ºC

0 0.25 0.5 0.75 1 1.25 1.5 1.75 2

Id(A)

0.5

1.5

2.5

3.5

4.5

5.5

Gfs (S)

Vds=13V

Tj=25ºC

Tj=150ºC

Tj=-40ºC

VNS1NV04DP-E Electrical specifications

Doc ID 17344 Rev 2 13/24

Figure 15. Static drain-source on

resistance vs id

Figure 16. Transfer characteristics

Figure 17. Turn-on current slope

(part 1/2)

Figure 18. Turn-on current slope

(part 2/2)

Figure 19. Input voltage vs input charge Figure 20. Turn-off drain source voltage

slope (part 1/2)

0 0.25 0.5 0.75 1 1.25 1.5 1.75 2

Id(A)

100

150

200

250

300

350

400

450

500

Rds(on) (mohms)

Tj=25ºC

Tj=150ºC

Tj=-40ºC

Vin=5V

Vin=3.5V

Vin=5V

Vin=3.5V

1.5

1.75

2.25

2.5

2.75

3.25

3.5

3.75

4.25

4.5

4.75

Vin(V)

0.25

0.5

0.75

1.25

1.5

1.75

2.25

Idon(A)

Vds=13.5V

Tj=150ºC

Tj=25ºC

Tj=-40ºC

0 500 1000 1500 2000 2500

Rg(ohm)

di/dt(A/us)

Vin=5V

Vdd=15V

Id=1.5A

0 500 1000 1500 2000 2500

Rg(ohm)

0.2

0.4

0.6

0.8

1.2

1.4

di/dt(A/us)

Vin=3.5V

Vdd=15V

Id=1.5A

0123456

Qg (nC)

Vin (V)

Vds=12V

Id=0.5A

0 500 1000 1500 2000 2500

Rg(ohm)

100

150

200

250

300

350

dv/dt(V/us)

Vin=5V

Vdd=15V

Id=0.5A

Electrical specifications VNS1NV04DP-E

14/24 Doc ID 17344 Rev 2

Figure 21. Turn-off drain-source voltage

slope (part 2/2)

Figure 22. Capacitance variations

Figure 23. Switching time resistive load

(part 1/2)

Figure 24. Switching time resistive load

(part 2/2)

Figure 25. Output characteristics Figure 26. Normalized on resistance vs

temperature

0 500 1000 1500 2000 2500

Rg(ohm)

100

150

200

250

300

350

dv/dt(V/us)

Vin=3.5V

Vdd=15V

Id=0.5A

0 5 10 15 20 25 30 35

Vds(V)

100

125

150

175

200

225

C(pF)

f=1MHz

Vin=0V

0250 500 750 1000 1250 1500 1750 2000 2250 2500

Rg(ohm)

0.25

0.5

0.75

1.25

1.5

1.75

t(us)

Vdd=15V

Id=0.5A

Vin=5V

td(off)

td(on)

3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25

Vin(V)

100

150

200

250

300

350

400

450

500

550

t(ns)

Vdd=15V

Id=0.5A

Rg=330ohm

td(off)

td(on)

0123456789101112

VDS(V)

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

2.2

2.4

ID(A)

Vin=3V

Vin=5.5V

Vin=3.5V

Vin=4.5V

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

0.5

0.75

1.25

1.5

1.75

2.25

Rds(on) (mOhm)

Vin=5V

Id=0.5A

VNS1NV04DP-E Electrical specifications

Doc ID 17344 Rev 2 15/24

Figure 27. Normalized input threshold

voltage vs temperature

Figure 28. Normalized current limit vs

junction temperature

Figure 29. Step response current limit

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

Vinth (V)

Vds=Vin

Id=1mA

-50 -25 0 25 50 75 100 125 150 175

Tc ( ºC )

0.5

1.5

2.5

3.5

4.5

Ilim (A)

Vin=5V

Vds=13V

5 101520253035

Vdd(V)

1.9

2.1

2.2

2.3

2.4

Tdlim(us)

Vin=5V

Rg=330ohm

Protection features VNS1NV04DP-E

16/24 Doc ID 17344 Rev 2

3 Protection features

During normal operation, the INPUT pin is electrically connected to the gate of the internal

power MOSFET through a low impedance path.

The device then behaves like a standard power MOSFET and can be used as a switch from

DC up to 50 KHz. The only difference from the user’s standpoint is that a small DC current

IISS (typ. 100 µA) flows into the INPUT pin in order to supply the internal circuitry.

The device integrates:

3.1 Overvoltage clamp protection

Internally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET

stage give this device unrivalled ruggedness and energy handling capability. This feature is

mainly important when driving inductive loads.

3.2 Linear current limiter circuit

Limits the drain current ID to Ilim whatever the INPUT pin voltage. When the current limiter is

active, the device operates in the linear region, so power dissipation may exceed the

capability of the heatsink. Both case and junction temperatures increase, and if this phase

lasts long enough, junction temperature may reach the overtemperature threshold Tjsh.

3.3 Overtemperature and short circuit protection

These are based on sensing the chip temperature and are not dependent on the input

voltage. The location of the sensing element on the chip in the power stage area ensures

fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the

range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted

when the chip temperature falls of about 15°C below shutdown temperature.

3.4 Status feedback

In the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a

diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from

a low impedance source, this current may be used in order to warn the control circuit of a

device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not

able to supply the current Igf, the INPUT pin will fall to 0V. This will not however affect the

device operation: no requirement is put on the current capability of the INPUT pin driver

except to be able to supply the normal operation drive current IISS.

Additional features of this device are ESD protection according to the Human Body model

and the ability to be driven from a TTL Logic circuit.

VNS1NV04DP-E Package and PCB thermal data

Doc ID 17344 Rev 2 17/24

4 Package and PCB thermal data

4.1 SO-8 thermal data

Figure 30. SO-8 PC board

Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB

thickness = 2 mm, Cu thickness = 35 µm, Copper areas: from minimum pad lay-out to

0.8 cm2).

Figure 31. Rthj-amb vs PCB copper area in open box free air condition

100

105

110

115

0 0,1 0,2 0,3 0,4 0,5 0,6 0,7

PCB Cu heatsink area (cm^ 2) - (refer to PCB layout)

RTH

_amb (°C/W)

Package and PCB thermal data VNS1NV04DP-E

18/24 Doc ID 17344 Rev 2

Figure 32. SO-8 thermal impedance junction ambient single pulse

Equation 1: pulse calculation formula

where δ = tP/T

Figure 33. Thermal fitting model of a double channel HSD in SO-8

0,1

100

1000

0,0001 0,001 0,01 0,1 1 10 100 1000

Time ( s)

ZTH (°C/ W)

0.3 cm

0.15 cm

0.6 cm

0.07cm

ZTHδRTH δZTHtp 1δ–()+⋅=

VNS1NV04DP-E Package and PCB thermal data

Doc ID 17344 Rev 2 19/24

Table 10. Thermal parameters

Area/island (cm2) 0.07 0.15 0.3 0.6

R1 = R7 (°C/W) 0.02

R2 = R8 (°C/W) 2

R3 = R9 (°C/W) 11

R4 = R10 (°C/W) 30

R5 = R11 (°C/W) 25

R6 = R12 (°C/W) 100 87.5 74.2 62.6

R13 = R14 (°C/W) 250

C1 = C2 = C7 = C8 (W.s/°C) 0.0005

C3 = C9 (W.s/°C) 0.02

C4 = C10 (W.s/°C) 0.035

C5 = C11 (W.s/°C) 0.2

C6 = C12 (W.s/°C) 0.4 0.51 0.65 0.95

Package and packing information VNS1NV04DP-E

20/24 Doc ID 17344 Rev 2

5 Package and packing information

5.1 ECOPACK® packages

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®

specifications, grade definitions and product status are available at: www.st.com.

ECOPACK® is an ST trademark.

5.2 SO-8 package information

Figure 34. SO-8 package dimensions

VNS1NV04DP-E Package and packing information

Doc ID 17344 Rev 2 21/24

Table 11. SO-8 mechanical data

Symbol

Millimeters

Min. Typ. Max.

A1.75

A1 0.10 0.25

A2 1.25

b 0.28 0.48

c 0.17 0.23

D(1)

1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs

shall not exceed 0.15 mm in total (both side).

4.80 4.90 5.00

E 5.80 6.00 6.20

E1(2)

2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not

exceed 0.25 mm per side.

3.80 3.90 4.00

e1.27

h 0.25 0.50

L 0.40 1.27

L1 1.04

k0° 8°

ccc 0.10

Package and packing information VNS1NV04DP-E

22/24 Doc ID 17344 Rev 2

5.3 SO-8 packing information

Figure 35. SO-8 tube shipment (no suffix)

Figure 36. SO-8 tape and reel shipment (suffix “TR”)

All dimensions are in mm.

Base Q.ty 100

Bulk Q.ty 2000

Tube length (± 0.5) 532

A3.2

C (± 0.1) 0.6

TAPE DIMENSIONS

According to Electronic Industries Association

(EIA) Standard 481 rev. A, Feb. 1986

All dimensions are in mm.

Tape width W 12

Tape Hole Spacing P0 (± 0.1) 4

Component Spacing P 8

Hole Diameter D (± 0.1/-0) 1.5

Hole Diameter D1 (min) 1.5

Hole Position F (± 0.05) 5.5

Compartment Depth K (max) 4.5

Hole Spacing P1 (± 0.1) 2

Top

cover

tape

End

Start

No componentsNo components Components

500mm min

Empty components pockets

saled with cover tape.

User direction of feed

REEL DIMENSIONS

All dimensions are in mm.

Base Q.ty 2500

Bulk Q.ty 2500

A (max) 330

B (min) 1.5

C (± 0.2) 13

F20.2

G (+ 2 / -0) 12.4

N (min) 60

T (max) 18.4

VNS1NV04DP-E Revision history

Doc ID 17344 Rev 2 23/24

6 Revision history

Table 12. Document revision history

Date Revision Changes

09-Jun-2008 1 Initial release.

02-Apr-2010 2 Changed template.

Updated Table 17: Turn-on current slope (part 1/2).

VNS1NV04DP-E

24/24 Doc ID 17344 Rev 2

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