VNS1NV04DP-E OMNIFET II fully autoprotected Power MOSFET Features Max On-state resistance(1) Current limitation (typ) RDS(ON) 250m (1) Drain-Source clamp voltage (1) ILIMH 1.7A VCLAMP 40V 1. Per each device. SO-8 Linear current limitation Thermal shutdown Short circuit protection Integrated clamp Low current drawn from input pin Diagnostic feedback through input pin ESD protection Direct access to the gate of the power mosfet (analog driving) Compatible with standard power mosfet The VNS1NV04DP-E is a device formed by two monolithic OMNIFET II chips housed in a standard SO-8 package. The OMNIFET II are designed in STMicroelectronics VIPowerTM M0-3 technology: they are intended for replacement of standard Power MOSFETs from DC up to 50KHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protects the chip in harsh environments. In compliance with the 2002/95/EC european directive Fault feedback can be detected by monitoring the voltage at the input pin. Table 1. Description Device summary Order codes Package SO-8 April 2010 Tube Tape and reel VNS1NV04DP-E VNS1NV04DPTR-E Doc ID 17344 Rev 2 1/24 www.st.com 1 Contents VNS1NV04DP-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 4 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1 Overvoltage clamp protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.2 Linear current limiter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.3 Overtemperature and short circuit protection . . . . . . . . . . . . . . . . . . . . . . 16 3.4 Status feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.1 5 6 2/24 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.1 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.2 SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.3 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Doc ID 17344 Rev 2 VNS1NV04DP-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Source Drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Doc ID 17344 Rev 2 3/24 List of figures VNS1NV04DP-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. 4/24 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static drain-source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static drain-source on resistance vs input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 12 Static drain-source on resistance vs input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 12 Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static drain-source on resistance vs id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-off drain-source voltage slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 17 SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Thermal fitting model of a double channel HSD in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . 18 SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 SO-8 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Doc ID 17344 Rev 2 VNS1NV04DP-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram DRAIN2 DRAIN1 OVERVOLTAGE CLAMP OVERVOLTAGE CLAMP INPUT1 GATE CONTROL GATE CONTROL OVER TEMPERATURE LINEAR CURRENT LIMITER LINEAR CURRENT LIMITER SOURCE1 Figure 2. INPUT2 OVER TEMPERATURE SOURCE2 Configuration diagram (top view) SOURCE 1 1 8 DRAIN 2 SOURCE 2 INPUT 2 DRAIN 1 DRAIN 1 INPUT 1 4 Doc ID 17344 Rev 2 5 DRAIN 2 5/24 Electrical specifications 2 VNS1NV04DP-E Electrical specifications Figure 3. Current and voltage conventions RIN1 IIN1 ID1 INPUT 1 VIN1 IIN2 DRAIN 1 RIN2 ID2 INPUT 2 VIN2 2.1 SOURCE 1 VDS1 DRAIN 2 VDS1 SOURCE 2 Absolute maximum ratings Stressing the device above the rating listed in the "Absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to Absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE program and other relevant quality document. Table 2. Absolute maximum ratings Symbol Value Unit VDSn Drain-source voltage (VINn = 0 V) Internally clamped V VINn Input voltage Internally clamped V IINn Input current +/-20 mA 330 Internally limited A -3 A RIN MINn Minimum input series impedance IDn Drain current IRn Reverse DC output current VESD1 Electrostatic discharge (R = 1.5 K, C = 100 pF) 4000 V VESD2 Electrostatic discharge on output pins only (R = 330 , C = 150 pF) 16500 V 4 W Ptot Total dissipation at Tc = 25 C Tj Operating junction temperature Internally limited C Tc Case operating temperature Internally limited C -55 to 150 C Tstg 6/24 Parameter Storage temperature Doc ID 17344 Rev 2 VNS1NV04DP-E 2.2 Electrical specifications Thermal data Table 3. Thermal data Symbol 2.3 Parameter Rthj-lead Thermal resistance junction-lead (per channel) Rthj-amb Thermal resistance junction-ambient Max. value Unit 30 C/W See Figure 31 C/W Electrical characteristics Table 4. Symbol Off(1) Parameter Test conditions Min. Typ. Max. Unit 45 55 V VCLAMP Drain-source clamp voltage VIN = 0 V; ID = 0.5 A 40 VCLTH Drain-source clamp threshold voltage VIN = 0 V; ID = 2 mA 36 VINTH Input threshold voltage VDS = VIN; ID = 1 mA 0.5 IISS Supply current from input pin VDS = 0 V; VIN = 5 V VINCL Input-source clamp voltage IIN = 1 mA IIN = -1 mA IDSS Zero input voltage drain current (VIN = 0V) VDS = 13 V; VIN = 0 V; Tj = 25 C VDS = 25 V; VIN = 0 V 6 -1.0 V 2.5 V 100 150 A 6.8 8 -0.3 V V 30 75 A A Max. Unit 250 500 m m Max. Unit 1. -40 C < Tj < 150 C, unless otherwise specified. Table 5. Symbol RDS(on) On(1) Parameter Test conditions Min. Typ. Static drain-source on VIN = 5 V; ID = 0.5 A; Tj = 25 C resistance VIN = 5 V; ID = 0.5 A 1. -40 C < Tj < 150 C, unless otherwise specified. Table 6. Symbol Dynamic(1) Parameter Test conditions Min. Typ. gfs (1) Forward transconductance VDD = 13 V; ID = 0.5 A 2 S COSS Output capacitance VDS = 13 V; f = 1 MHz; VIN = 0 V 90 pF 1. Tj = 25 C, unless otherwise specified. Doc ID 17344 Rev 2 7/24 Electrical specifications VNS1NV04DP-E Table 7. Switching(1) Symbol Parameter td(on) Test conditions Turn-on delay time VDD = 15 V; ID = 0.5 A; Vgen = 5 V; Rgen = RIN MIN = 330 (see Figure 4) Rise time tr td(off) tf Min. Turn-off delay time Fall time td(on) Turn-on delay time VDD = 15 V; ID = 0.5 A Vgen = 5 V; Rgen = 2.2 K (see Figure 4) Rise time tr td(off) Turn-off delay time Fall time tf (dI/dt)on Turn-on current slope Qi Total input charge Typ. Max. Unit 70 200 ns 170 500 ns 350 1000 ns 200 600 ns 0.25 1 s 1.3 4 s 1.8 5.5 s 1.2 4 s VDD = 15 V; ID = 1.5 A Vgen = 5 V; Rgen = RIN MIN = 330 5 A/s VDD = 12 V; ID = 0.5 A; VIN = 5 V Igen = 2.13 mA (see Figure 7) 5 nC 1. Tj = 25 C, unless otherwise specified. Table 8. Symbol VSD (2) trr Qrr IRRM Source Drain diode(1) Parameter Test conditions Forward on voltage ISD = 0.5 A; VIN = 0 V Reverse recovery time ISD = 0.5 A; dI/dt = 6 A/s Reverse recovery charge VDD = 30 V; L = 200 H Reverse recovery current (see Figure 5) Min. Typ. Max. Unit - 0.8 - V - 205 - ns - 100 - nC - 0.75 - A Min. Typ. 1. Tj = 25 C, unless otherwise specified. 2. Pulsed: pulse duration = 300s, duty cycle 1.5%. Table 9. Protections(1) Symbol Parameter Test conditions Ilim Drain current limit tdlim Step response current VIN = 5 V; VDS = 13 V limit Tjsh Overtemperature shutdown 150 Tjrs Overtemperature reset 135 Igf Fault sink current VIN = 5 V; VDS = 13 V; Tj = Tjsh 10 Eas Single pulse avalanche energy Starting Tj = 25 C; VDD = 24 V VIN = 5 V Rgen = RIN MIN = 330 ; L = 50 mH (see Figure 6 and Figure 8) 55 VIN = 5 V; VDS = 13 V 1. -40 C < Tj < 150 C, unless otherwise specified. 8/24 Doc ID 17344 Rev 2 1.7 Max. Unit 3.5 2 175 A s 200 C C 15 20 mA mJ VNS1NV04DP-E Figure 4. Electrical specifications Switching time test circuit for resistive load VD Rgen Vgen ID 90% tr tf 10% t td(on) Vgen td(off) t Figure 5. Test circuit for diode recovery times A A D I FAST DIODE OMNIFET S L=100uH B B 330 D Rgen VDD I Vgen OMNIFET S 8.5 Doc ID 17344 Rev 2 9/24 Electrical specifications Figure 6. VNS1NV04DP-E Unclamped inductive load test circuits RGEN VIN PW Figure 7. Input charge test circuit VIN GEN ND8003 10/24 Doc ID 17344 Rev 2 VNS1NV04DP-E Figure 8. Electrical specifications Unclamped inductive waveforms Doc ID 17344 Rev 2 11/24 Electrical specifications 2.4 VNS1NV04DP-E Electrical characteristics curves Figure 9. Source-drain diode forward characteristics Figure 10. Static drain-source on resistance Vsd (mV) Rds(on) (ohms) 1000 4.5 Tj=-40C 4 950 Vin=2.5V 3.5 Vin=0V 900 3 2.5 850 2 800 1.5 Tj=25C 1 750 Tj=150C 0.5 700 0 0 2 4 6 8 10 12 14 0 0.05 0.1 Id (A) Figure 11. 0.15 0.2 0.25 0.3 Id(A) Derating curve Figure 12. Static drain-source on resistance vs input voltage (part 1/2) Rds(on) (mohms) 500 450 Id=0.5A 400 Tj=150C 350 300 250 200 Tj=25C 150 Tj=-40C 100 50 0 3 3.5 4 4.5 5 5.5 6 6.5 7 Vin(V) Figure 13. Static drain-source on resistance vs input voltage (part 2/2) Figure 14. Transconductance Rds(on) (mohms) Gfs (S) 500 450 6 Tj=150C 5.5 400 350 Tj=-40C Vds=13V 5 Id=1.5A Id=1A Tj=25C 4.5 4 300 Tj=150C 3.5 Tj=25C 250 3 200 Id=1.5A Id=1A Tj=-40C 150 2.5 2 Id=1.5A Id=1A 100 1.5 1 50 0.5 0 3 3.5 4 4.5 5 5.5 6 6.5 0 0 Vin(V) 0.25 0.5 0.75 1 Id(A) 12/24 Doc ID 17344 Rev 2 1.25 1.5 1.75 2 VNS1NV04DP-E Electrical specifications Figure 15. Static drain-source on resistance vs id Figure 16. Transfer characteristics Rds(on) (mohms) Idon(A) 500 2.25 Vin=3.5V 450 Tj=25C 2 Tj=150C 400 Vds=13.5V 1.75 Vin=5V 350 1.5 300 1.25 250 Vin=3.5V 1 Vin=5V Vin=3.5V 0.75 Tj=150C Tj=25C 200 150 Tj=-40C 0.5 Tj=-40C Vin=5V 100 0.25 50 0 1.5 0 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 1.75 2 2.5 2.25 3 2.75 4 4.5 3.75 4.25 5 4.75 Vin(V) Id(A) Figure 17. Turn-on current slope (part 1/2) 3.5 3.25 Figure 18. Turn-on current slope (part 2/2) di/dt(A/us) di/dt(A/us) 1.4 6 1.2 5 Vin=5V Vdd=15V Id=1.5A 4 Vin=3.5V Vdd=15V Id=1.5A 1 0.8 3 0.6 2 0.4 1 0.2 0 0 500 1000 1500 2000 0 2500 500 1000 1500 2000 2500 Rg(ohm) Rg(ohm) Figure 19. Input voltage vs input charge Figure 20. Turn-off drain source voltage slope (part 1/2) Vin (V) dv/dt(V/us) 6 350 300 5 Vds=12V Id=0.5A Vin=5V Vdd=15V Id=0.5A 250 4 200 3 150 2 100 1 50 0 0 0 1 2 3 4 5 6 Qg (nC) 0 500 1000 1500 2000 2500 Rg(ohm) Doc ID 17344 Rev 2 13/24 Electrical specifications VNS1NV04DP-E Figure 21. Turn-off drain-source voltage Figure 22. Capacitance variations slope (part 2/2) dv/dt(V/us) C(pF) 350 225 200 300 Vin=3.5V Vdd=15V Id=0.5A 250 f=1MHz Vin=0V 175 200 150 150 125 100 100 50 75 50 0 0 500 1000 1500 2000 0 2500 5 10 15 20 25 30 35 Vds(V) Rg(ohm) Figure 23. Switching time resistive load Figure 24. Switching time resistive load (part 1/2) (part 2/2) t(ns) t(us) 550 2 500 1.75 td(off) Vdd=15V Id=0.5A Vin=5V 1.5 Vdd=15V Id=0.5A Rg=330ohm tr 450 400 tr 1.25 350 1 td(off) 300 tf 250 0.75 tf 200 0.5 150 td(on) 0.25 td(on) 100 50 0 0 250 0 750 1000 1250 1500 1750 2000 2250 2500 500 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 Vin(V) Rg(ohm) Figure 25. Output characteristics Figure 26. Normalized on resistance vs temperature Rds(on) (mOhm) ID(A) 2.25 2.4 2.2 Vin=5.5V 2 Vin=5V Id=0.5A Vin=4.5V 2 Vin=3.5V 1.8 1.75 1.6 1.5 1.4 1.2 1.25 1 0.8 1 0.6 0.4 0.75 Vin=3V 0.2 0.5 0 0 1 2 3 4 5 6 7 8 9 10 11 12 14/24 -50 -25 0 25 50 75 Tc (C) VDS(V) Doc ID 17344 Rev 2 100 125 150 175 VNS1NV04DP-E Electrical specifications Figure 27. Normalized input threshold voltage vs temperature Figure 28. Normalized current limit vs junction temperature Vinth (V) Ilim (A) 2 5 1.8 4.5 Vds=Vin Id=1mA 1.6 Vin=5V Vds=13V 4 1.4 3.5 1.2 3 1 2.5 0.8 2 0.6 1.5 0.4 1 0.2 0.5 0 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) -50 -25 0 25 50 75 100 125 150 175 Tc (C) Figure 29. Step response current limit Tdlim(us) 2.4 2.3 Vin=5V Rg=330ohm 2.2 2.1 2 1.9 5 10 15 20 25 30 35 Vdd(V) Doc ID 17344 Rev 2 15/24 Protection features 3 VNS1NV04DP-E Protection features During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path. The device then behaves like a standard power MOSFET and can be used as a switch from DC up to 50 KHz. The only difference from the user's standpoint is that a small DC current IISS (typ. 100 A) flows into the INPUT pin in order to supply the internal circuitry. The device integrates: 3.1 Overvoltage clamp protection Internally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. 3.2 Linear current limiter circuit Limits the drain current ID to Ilim whatever the INPUT pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. 3.3 Overtemperature and short circuit protection These are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the range 150 to 190 C, a typical value being 170 C. The device is automatically restarted when the chip temperature falls of about 15C below shutdown temperature. 3.4 Status feedback In the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not able to supply the current Igf, the INPUT pin will fall to 0V. This will not however affect the device operation: no requirement is put on the current capability of the INPUT pin driver except to be able to supply the normal operation drive current IISS. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit. 16/24 Doc ID 17344 Rev 2 VNS1NV04DP-E Package and PCB thermal data 4 Package and PCB thermal data 4.1 SO-8 thermal data Figure 30. SO-8 PC board Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness = 35 m, Copper areas: from minimum pad lay-out to 0.8 cm2). Figure 31. Rthj-amb vs PCB copper area in open box free air condition RTHJ_amb (C/W) 115 110 105 100 95 90 85 80 0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 PCB Cu heat sink area ( cm^ 2) - ( refer t o PCB layout ) Doc ID 17344 Rev 2 17/24 Package and PCB thermal data VNS1NV04DP-E Figure 32. SO-8 thermal impedance junction ambient single pulse ZTH ( C/ W) 1000 0.07cm2 0.15 cm2 100 0.3 cm2 0.6 cm2 10 1 0,1 0,0001 0,001 0,01 0,1 1 Time ( s) 10 100 Equation 1: pulse calculation formula Z TH = R TH +Z THtp (1 - ) where = tP/T Figure 33. Thermal fitting model of a double channel HSD in SO-8 18/24 Doc ID 17344 Rev 2 1000 VNS1NV04DP-E Package and PCB thermal data Table 10. Thermal parameters Area/island (cm2) 0.07 R1 = R7 (C/W) 0.02 R2 = R8 (C/W) 2 R3 = R9 (C/W) 11 R4 = R10 (C/W) 30 R5 = R11 (C/W) 25 R6 = R12 (C/W) 100 R13 = R14 (C/W) 250 C1 = C2 = C7 = C8 (W.s/C) 0.0005 C3 = C9 (W.s/C) 0.02 C4 = C10 (W.s/C) 0.035 C5 = C11 (W.s/C) 0.2 C6 = C12 (W.s/C) 0.4 Doc ID 17344 Rev 2 0.15 0.3 0.6 87.5 74.2 62.6 0.51 0.65 0.95 19/24 Package and packing information VNS1NV04DP-E 5 Package and packing information 5.1 ECOPACK(R) packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 5.2 SO-8 package information Figure 34. SO-8 package dimensions 20/24 Doc ID 17344 Rev 2 VNS1NV04DP-E Package and packing information Table 11. SO-8 mechanical data Symbol Millimeters Min. Typ. A Max. 1.75 A1 0.10 A2 1.25 b 0.28 0.48 c 0.17 0.23 D(1) 4.80 4.90 5.00 E 5.80 6.00 6.20 E1(2) 3.80 3.90 4.00 e 0.25 1.27 h 0.25 0.50 L 0.40 1.27 L1 k 1.04 0 ccc 8 0.10 1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs shall not exceed 0.15 mm in total (both side). 2. Dimension "E1" does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25 mm per side. Doc ID 17344 Rev 2 21/24 Package and packing information 5.3 VNS1NV04DP-E SO-8 packing information Figure 35. SO-8 tube shipment (no suffix) B Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) C A 100 2000 532 3.2 6 0.6 All dimensions are in mm. Figure 36. SO-8 tape and reel shipment (suffix "TR") REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 12 4 8 1.5 1.5 5.5 4.5 2 All dimensions are in mm. End Start Top cover tape No components Components 500mm min Empty components pockets saled with cover tape. User direction of feed 22/24 Doc ID 17344 Rev 2 No components 500mm min VNS1NV04DP-E 6 Revision history Revision history Table 12. Document revision history Date Revision Changes 09-Jun-2008 1 Initial release. 02-Apr-2010 2 Changed template. Updated Table 17: Turn-on current slope (part 1/2). Doc ID 17344 Rev 2 23/24 VNS1NV04DP-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2010 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 24/24 Doc ID 17344 Rev 2