19-0951; Rev 2; 9/96 MAALM Low Power, 3% Digit A/D Converter General Description The Maxim ICL7136 is a monolithic analog to digital con- verter with very high input impedance. On-board active components include segment drivers, segment decod- ers, voltage reference and a clock circuit. The ICL7136 diractly drives a non-multiplexed liquid crystal (LCD) dis- play, requiring no external display drive circuitry. Signifi- cantly reduced power consumption makes the ICL7136 a superior device, especially for portable systems. Versatility and accuracy are inherent features of this con- verter. The dual-slope conversion technique autornatical- ly rejects interferance signals common in industrial envi- ronments. The true differential input and reference are particularly useful when making ratiometric measure- ments (ohms or bridge transducers), and the zero-inte- grator phase in Maxims 1CL7136 eliminates overrange hangover and hysteresis effects. Finally, this device of- fers high accuracy by lowering rollover error to less than one count and zero reading drift to less than inV/*C. Applications These devices can be used in a wide range of digital panel meter applications. Most applications, however, in- volve the measurement and display of analog data: Pressure Conductance Voltage Current Resistance Speed ; Temperature Material Thickness Pin Configurations Top View Vv osc 1 01 OSC 2 ci OSC 3 vs BI TEST at REF Hi Fi REF LO Gi REF Ei AAEM Crer o2 IL713E EB} COMMON ee mp 10S 43 a vz F2 OF a) BUFF 2 iNT BS bi TENS too's BE catren ) E3 A3 100'S 1000S-AB4 G3 POL BP (MINUS SIGN) DIP Pin Configurations continued on last page. Features # improved Second Source! (see 3rd page for Maxim Advantage). + Power Dissipation Guaranteed Less than imW 9V Battery Life 3000 Hours Typical Guaranteed First Reading Recovery from Overrange + Zero input Gives Zero Reading # Drives LCD Displays Directly * Low Noise (15yVp-p) Without Hysteresis or Overrange Hangover * True Differential Reference and Input # Monolithic, Low-Power CMOS Design Ordering information PART TEMP. RANGE PIN-PACKAGE ICL7136CPL OC to +70C 40 Plastic DIP ICL7136CJL OCto+70C 40 CERDIP ICL7136CMH OC to +70C 3=944 MQFP ICL7136CQH QC to +70C }3=6444 PLCC ICL7136C/D OC to +70C~- Dice Typical Operating Circuit Leb DISPLAY A sais I ) dN FLAG J AAA. Lif ~=g!i TO ANALOG COMMON {P32} FULL SCALE VREF (NPUT 2.000 V 1,000 V 200.0 mV 100.0 mV (Detailed Circuit DiagramFigures 1 & 2) 9ELLTON The Maxim Advantage signifies an upgraded quality level. At no additional cost we offer a second-source device that is subject to the following: guaranteed performance over temperature along with tighter test specifications on many key parameters; and device enhancements, when needed, that result in improved performance without changing the functionality. PAAXIMA For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769. Maxim Integrated Products 1FIO ious Cewwer, 2 Dielt A/D Gonverter ABSOLUTE MAXIMUM RATINGS Supply Voltage (V+ tO V-) oo. ccccesssscsssescesecnseseessssssesessssenseres 15V 40 Lead CERDIP (derate 20.00mW/C above +70C)....... 14100mWw Analog Input Voltage (either input)(Note 1)... Ve to V- 44 Lead PLCC (deraie 13.33 mnW/C above +70C).......... Reference input Voltage (either input)... V+ to V- 44 Lead MOFP (derate 3.09mWPC above +70C).. CHOCK INDUt eee cece ecececeeteceneeaesaaensarsaccesenesseeses TEST to V+ Operating Temperature Range o00.... eee OC to +70C Power Dissipation (Ta = +70C)Note 2) Storage Temperature Range........... .-B5CS to +160C 40 Lead Plastic DIP (derate 11.11mW/C above +70C)....... 61 imw Lead Temperature (soldering, 60sec) .......0 00 eee +300C Rete 1: input voltages may exneed the supply voltages, provided the input current Is lenited to + 100zA. Note 2: Dissipation rating aaswnes device le mounted with all leade soldered to printed olroult board. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions fer extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (now 3.7 PARAMETER conarmens ot TvP MAN were Zero input Reading Ving @ 0.0V - 000.0 2000.0 +0000 Digital Reading Full-Scaie = 200.6mV . Ratiometric Reading Val = Vege, Vege = 10m 900 esav1000 wv. c tal Reading Roll-Over Error (Difference in Vin = +-Viq = 200.0mV ~1 02 x) ~ nts reading for equal posigive and gh negative reading near full-scale) Pd Linearity (Max. deviation from Full-Scale = 200mV =I : <2 & Counts best straight line fit) oF Full-Scate = 2.000 se eg? Common-Mode Rejection Ratio Vous @ 2 1, Viggo OV ~ On avy (Note 4) Full-Scale = 200.0mV aCe R34 Helse (Pk-Pk value not excesded Vin = OV, Full-Scale = 200.0mV ae e* 18 av 88% of time) ser ast Leakage Current @ Input Vig @ OV < <2 we 1 10 pA Zero Reading Oritt Vege 2 OV, OC es ge 0.2 1 AWG Scale Factor Temperature Vong at - 1 5 pomrc Coefficient (e- ew G Supply Current (Does not ss or 70 400 pa include COMMON current) os & Anateg COMMON Volte- S Common and 28 3.0 3.2 Vv reapect to posiive~ RNa o Eupply Temp. Goeff. ~ oe 9 between Common and 150 pprmrc (With rege oO _/[ Positive Supply aa v* toV =@V 4 5 8 Vv ative Voltege V* tov7 =8V 4 5 6 v Power Dissipation Capacitance ve Clock Frequency 4 pF Mote 3; Uniess othernviee noted, specifications apply at Ta= 25C, forock = 16kHz and ara tested in the circuit of Figure 1. Note 4: Refer to Differential input discussion. Note &: Backplane drive is in phase with segment drive for off segment, 186 out of phase for on segment. Frequency is 20 times conversion rate. Average DC component is leas than SOmvV. Mote 6: 48krz ozciliator, gure 2, increases cusvent by 20yA (lyp). Note 7: Extra capacitance of CERDIP peckage changes oscillator resistor value to 470kM or 150k (1 reading/eec or 3 readings/sec). The electrical characteristics above are a reproduction of a portion of Intersi's copyrighted (1863/1984) ata book. This information does not consiftute any representation by Maxim that intersis products wil perlorm in accordance with theee specifications. The Electical Characteristics Table" along with the descriptive excerpts rom the original manufacturer's data sheet have besn included in this data sheet solely for comparative purposes. ; FA ABNMAMAXKIIM Low Power, 3% Digit A/D Converter @ Low Noise @ Key Parameters Guaranteed over Temperature @ Guaranteed Overload Recovery Time @ Negligible Hysteresis @ Significantly Improved ESD Protection (Note 9) @ Increased Maximum Rating for Input Current (Note 10) @ Maxim Quality and Reliability ABSOLUTE MAXIMUM RATINGS: This device conforms to the Absolute Maximum Ratings on adjacent page. ELECTRICAL CHARACTERISTICS: Specifications below satisfy or exceed all tested parameters on adjacent page. (Note 13) (V+ = OV; Ta = 25C; fcLock = 16kHZz; test circuit - Figure 1; unless noted) CHARACTERISTICS CONDITIONS MIN TYP MAX UNITS Zero Input Reading VIN = 0.0V, Full Scale = 200.0mV Ta = 25C (Note 8) 000.0 +000.0 + 000.0 Digital O < Ta < +70C (Note 12) 000.0 +000.0 + 000.0 Reading Ratiometric Reading Vin = Vref Vraer = 100mV Ta = 25C (Note 8) 999 999/1000 1000 Digital 0 < Ta < +70C (Note 12) 906 999/1000 1001 Reading Rollover Error (Difference in Vin = _+Vin ~200.0mv reading for equal positive and Ta = 25C (Note 8) -1 +.2 +1 Counts negative reading near Full Scale) 0 < Ta < +70C (Note 12) +.2 Linearity (Max. deviation from Full Scale = 200.0mV -1 +.2 +1 Counts best straight line fit) or full scale = 2.000V Common Mode Rejection Ratio Vom = 1V, Vin = OV 5 V/V Full Scale = 200.0mV Noise (Pk-Pk value not exceeded Vin = OV 10 v 95% of time) Full Scale = 200.0mV B Input Leakage Current Vin=90 Ta = 25C (Note 8) 1 10 pA O < Ta < +70C 200 Zero Reading Drift Vin = 0 0 < Ta < +70C (Note 8) 0.2 1 pV/C Scale Factor Temperature Vin = 199.0mV Coefficient Oo < Ta < +70C 1 5 ppm/c (Ext. Ref. Oppm/C) (Note 8) V+ Supply Current Vin = 0 Ta = 25C 60 100 pA 0 < Ta < +70C 120 Analog Common Voltage (with 250kN between Common & 2.6 28 3.2 Vv respect to Pos. Supply) Pos. Supply Temp. Coeff. of Analog Common 250k between Common & 75 ppm/C (with respect to Pos. Supply) Pos. Supply Pk-Pk Segment Drive Voltage Vt toV- = 9V 4 5 6 Vv Pk-Pk Backplane Drive Voltage Test Pin Voltage With respect to V+ 4 5 6 Vv Overload Recovery Time Vin changing from + 10V 0 1 Measurement (Note 11) to OV Cycles Note & Test condition is V|,y applied between pins IN-H! and IN-LO through a 1MM series resistor as shown in Figure 1. Note 9: All pins are designed to withstand electrostatic discharge (ESD) levels in excess of 2000V. (Test circuit per Mil Std 683, Method 3015.1) Note 10: Input voltages may exceed the supply voltage provided the input current is limited to + 1mA (This revises Note 1 on adjacent page). Note 11: Number of measurement cycles for display to give accurate reading. Note 12: 1M0 resistor is removed from circuits in Figure 1. Note 13: MOFP tested at 25C only. MAXI/VI 9ELZTOIICL7136 how Power, 3% Digit A/D Converter On uF Keio) os ra ae Display Cher Ca 7. a" 1m gy fer fe * OW one 2-19 | SEGMENT t ANALOG 0.01 uF 22-25 LORIVE ~ ae -o Tx IWLO POL Zz | 21 BACKPLANE | 2 ee ORIVE 32} common 28] sure 20> xe 3 180 ko > 2s) oe FV an ae VREF 0.47 uP REF Ht PS 10K0 Tz > Vv + Oe wt REF L ve JOSC2 OSCq OSC. 39138 cosc Pas, MAAXKIAA ee ICL7 136 Rosc ~=@q To anaLoa COMMON (P32) Beonn |S bOoF FULL SCALE VREF INPUT 200.0 mv 100.0 mV 0.1 RF Lco a cd Fy Display 4 Cher Caer em ve ee ee t eee +O ae IN HI 2418 SEGMENT t ANALOG aso ae oot ne 2228 = FULU SCALE VREF INPUT 200.0 mv 100.0 mv Figure 1. Maxim ICL7196 Typical Operating Gircutt Clock Frequency 16kriz (1 reading/sec) Analog Section Figure 3 shows the Block Diagram of the Analog Section for the |ICL7136. Each measurement cycle is divided into four phases: 1. Auto-Zero (A-Z) 2. Signal Integrate (INT) 3. Reference De-Integrate (Dl) 4. Zero integrator (2!) Auto-Zero Phase Three events occur during auto-zero. The inputs, IN-HI and iN-LO, are disconnected from the pins and internally shorted to analog common. The reference capacitor is charged to the reference voltage. And lastly, a feedback loop is closed around the system to charge the auto-zero capacitor CAZ to compensate for offset voltages in the . comparator, buffer amplifier and integrator. The inherent noise of the system determines the A-Z accuracy. Signal integrate Phase The internal input high (IN-Hi) and input low (IN-LO) are connected to the external pins, the internal short is re- moved and the auto-zero loop is opened. The converter then integrates the differential voltage between IN-HI and IN-LO for a fixed time. This differential voltage can be within a wide common-mode range (within one volt of either supply). If, however, the input signal has no return with respect to the converter power supply, IN-LO can be tied to analog common to establish the correct common- mode voltage. The polarity of the integrated signal is de- termined at the end of this phase. Figure 2. Maxim (CL7136 Typical Operating Circuit Clock Frequency 48k}z (3 readings/sec) Reference De-integrate IN-HI is connected across the previously charged refer- ence capacitor and IN-LO is internally connected to ana- log common. Circuitry within the chip ensures that the capacitor will be connected with the correct polarity to cause the integrator output to return to zero. The input signal determines the time required for the output to re- turn to zero. The digital reading displayed is: 1000 x VIN. VREF Zero integrator Phase Input low is shorted to analog COMMON and the refer- ence capacitor is charged to the reference voltage. A feedback loop is closed around the system to input high, causing the integrator output to return to zero. This phase normally lasts between 11 and 140 clock pulses but is extended to 740 clock pulses after a heavy over range conversion. Differential Reference The reference voltage can be generated anywhere within the power supply voltage of the converter. The main source of common-mode error is a roll-over voltage. This is caused by the reference capacitor losing or gaining charge to stray capacitance on its nodes. The reference capacitor can gain charge (increase voltage) if there is a large common-mode voltage. This is the result of a posi- tive signal de-integration. In contrast, the reference ca- pacitor will lose charge (decrease voltage) when de-inte- grating a negative input signal. Rollover error is caused by this difference in reference for positive or negative input voltages. This error can be held to less than half a count for the worst-case condition by selecting a refer- ence capacitor that is large enough in comparison to the stray capacitance. (See component value selection.) MAAXIMMLow Power, 3% Digit A/D Converter Car -_e --Ste -- Vy 1 i) \ a Vie a | 1 are betta 1 vw ad en your ea een) C7138 |? ner oe 12 ence COMMAON Figure 3. Analog Section of 7196 Differential input Differential voltages anywhere within the common- mode range of the input amplifier can be accepted by the input (specifically from 1V below the positive supply to 1.5V above the negative supply). The system has a CMRR of 86dB (typ) in this range. Care must be exercised, however, to ensure that the integrator output does not saturate, since the in- tegrator follows the common-mode voltage. A large positive common-mode voltage with a near full-scale negative differential input voltage is a worst-case condition. When most of the integratoreutput swing has been used up by the positive common-mode voltage, the negative input signal drives the inte- grator more positive. The integrator swing can be re- duced to less than the recommended 2V full-scale swing with no loss of accuracy in these critical appli- cations. The integrator output can swing within 0.3V of either supply without loss of linearity. Analog Common The primary purpose of this pin is to set the common- mode voltage for battery operation. This is useful for any system where the input signals are floating with re: to the power supply. A voltage of approximately 2.8V less than the positive supply is set by this pin. The Analog Common has some of the attributes of a reference volt- age. If the total supply voltage is large enough to cause the zener to regulate (>7V), the common voltage will have a low output impedance (approximately 159), a temperature coefficient of typically 80 ppm/C and a iow voltage coefficient (.001%). During auto-zero and reference integrate the internal in- put low is connected to Analog Common. If iN-LO is dif- ferent from Analog-Common, a common-mode voltage exists in the system and is taken care of by the excellent CMRR of the converter. In some applications, however, IN-LO will be set at a fixed known voltage (e.g., power supply common). Whenever possible Analog Common should be tied to the same point, thus removing the com- mon-mode voltage from the converter. The same holds true for the reference voltage. If convenient, the refer- ence should be referenced to analog common as shown in Figure 4B. This will remove the common-mode voltage from the reference system. MAXIMA Figure 4. Using an External Fleference Analog common is internally tied to an N-channel FET that can sink 500 A or more of current. This will hold the analog common voltage 2.8V below the positive supply (when a source is trying to pull the common line positive). There is only 1 2A of source current, however, so com- mon may easily be tied to a more negative voltage, thus over-riding the internal reference. Test Two functions are performed by the test pin. The first is using this pin as the negative supply on the 7136. This Is useful for externally generated segment drivers or any other annunciators the user may want to include on the LCD. This pin is coupled to the internally generated digi- tal supply through a 5002 resistor. This application is illustrated in Figures 5 & 6. A lamp test is the second function. All segments will be turned on and the display should read 1888, when TEST is pulled high (V +). Caution: in the lamp test mode, the segments have a constant de voltage (no square wave). This can burn the LCD (display) if left in this mode for several minutes. $ 4 ' it : g g f ----4 mo 'OLCO DECAL vom i | Ly i] is TOLGD BACKPLANE Figure 5. Simple inverter for Fixed Decimal Point Figure 6. Exchssive OR Gate for Decimal Point Drive GELLTHICL7136 Lew Power, 3% Digit A/D Converter TO TEST CIN - I BACKPLANE eee eee ee ee ee eee -< - crear >I ! { \ | LCD PHASE OF \ ' ' i TYPICAL SEGMENT OUTPUT 5 ea ' vr DECOOE oe 1 ' OSma 1 ! 1 OUTPUT ' | LaTcw | i aaa ' ' 1 INTERNAL DIGITAL GROUND ' Het ! ' TO SWITCH ' FROM COMPARATOR OUTPUT oman a! ait, ov cLocK >. viet { LOGIC CONTROL Ed { } Anne rest Vey =1 Ps TH P ' WTERWAL DIGITAL GROUNO al. osc 1) 40 70 7" CRYSTAL O8C 2 Oec 3 EXTEANAL Gari aTOR eiT96 Figure 7. 1CL7136 Digital Section Digital Section The digital section for the ICL7136 is illustrated in Figure 7. In Figure 7, an internal digital ground is generated from a 6V zener diode and a large P channel source follower. This supply is made stiff in effort to absorb the large capacitive currrents when the back plane (BP) voltage is switched. The BP frequency is calculated by dividing the clock frequency by 800. For example, with a clock fre- quency of 48kHz (3 readings per second), the backplane will be a 60Hz square wave with a nominal amplitude of 5V. The segments are driven at the same frequency and amplitude. Note that these are out-of-phase when the BP is On and in-phase when OFF. Negligible de voltage ex- ists across the segments in either case. The polarity indication is on for negative analog inputs, for the ICL7136. If desired IN-HI and IN-LO can be re- versed giving a on for positive analog inputs. System Timing The clocking circuitry for the |CL7136 is illustrated in Fig- ure 7. Three approaches can be used: 1. A crystal between pins 39 and 40. 2. An external oscillator connected to pin 40. 3. An RC oscillator using all three pins. The decade counters are driven by the clock frequency which is divided by four. This frequency is then further divided to form the four convert-cycle phases, namely: signal integrate (1000 counts), reference de-integrate (0 to 2000 counts), auto-zero (260 to 2989 counts) and zero integrator (11 to 740). The signal integration should be a multiple of 6OHz to achieve a maximum rejection of 60Hz pickup. Oscillator frequencies of 3314kHz, 40kHz, 48kHz, 60kHz, 80kHz, 120kHz, 240kHz, etc., should be selected. Similarly, for 50Hz rejection, oscillator frequencies of 200kHz, 100kHz, 6624kHz, 50kHz, 40kHz, etc., are appropriate. Note that 40kHz (2.5 readings/second) will reject both 50 and 60Hz (also 400 and 440Hz). Auto-zero receives the unused portion of reference deintegrate for signals less than full-scale. A complete measurement cycle is 4,000 counts (16,000 clock puls- 9s), independent of input voltage. As an example, an os- cillator frequency of 16kHz would be used to obtain one reading per second. PAAXIMMALow Power, 3% Digit A/D Converter Component Value Selection Auto-Zero Capacitor The noise of the system is influenced by the auto-zero capacitor. For a 2V scale, a 0.1.F capacitor is adequate. A 0.47pF capacitor is recommended for the 200mvV full scale where noise rejection is very important. Due to the ZI phase, noise can be reduced by using a larger auto- zero capacitor without causing hysteresis or overrange hangover problems. Reference Capacitor For most applications, a 0.1.F capacitor is acceptable. However, a large value is needed to prevent roil over error where a large common-mode voitage exists (i.., the REF-LO pin is not at analog common) and a 200mV scale is used. Generally, the roll over error will be held half a count by using a 1.0uF capacitor. Integrating Capacitor To ensure that the integrator will not saturate (approxi- mately 0.3V from either supply), an appropriate integrat- ing capacitor must be selected. A nominal + 2V full-scale integrator swing is acceptable when the analog common is used as a reference. The nominal value for CINT is 0.15yF at one reading per second. (16kHz clock). This value should be changed in inverse proportion to main- tain the same output swing if a different oscillator fre- quency is used. The integrating capacitor must have low dielectric ab- sorption to minimize linearity errors. Polypropylene ca- pacitors are recommended for this application. Integrating Resistor The integrator and the buffer amplifier both have a class A output stage with 62A of quiescent current and can supply 1A of drive current with negligible non-linearity. ye! ting resistor should be large enough to keep in the linear region over the entire input voltage range. The resistor value, however, should be low qnought that undue leakage requirements are not placed on the PC boards. For a 200mvV scale, a 180k0 resistor is recommended; (2V scale/1.8MEGQ). Reference Voltage An analog input voltage of Vin, equal to 2 (Vre_r) is re- quired to generate full scale output of 2000 counts. Thus, for 2V and 200mV scales, Vrer should equal 1V and 100mV r ly. However, there will exist a scale factor other than the unity between the input voltage and the digital reading in many applications where the A/D is connected to a transducer. As an example, the designer may like to have a full scale reading in a weighing system when the voitage from the transducer is 0.682V. The designer should use the input voltage directly and select Vref at 0.341V instead of di- viding the input down to 200mV. A suitable value of the integrating resistor would be 330k0.. This provides for a slightly quieter system and avoide a divider network on the input. Another adv: of this system occurs when the digital reading of zero ts desired for Vij * zero. Ex- set rating can be conveniently generated. Oscitator Components A 50pF capacitor is recommended for all ranges of fre- quency and the resistor is selected from the equation f =~ 0.45/RC. For 48kHz clock (3 readings/second), R = 180k, for 16kHz, R = 560kN. Typical Applications TO DISPLAY TO BACKPLANE J 1 oT" tt 50 pF SET VRer 100.0 mV a 6 a JOOOUC 7. WOka 27ko Rer = 0.1 uF zB TO DISPLAY TO BACKPLANE 2 Figure 8. Recommended Component Values for 2,000V Full-Scale, 3 Read- ings/Sec. For f reading/sec, change CINT, ROSC to values of Figure 7, MAXIMA Figure 9. 7136 Operated from. Single +5V Supply. An extemal reference must be used in this application, since the voltage between V+ and V is insufficient for correct operation of the intemal reference. GELLTHICL7136 Lew Power, 3% Digit A/B Converter Wad TO PNT TO PWT osc } . osc 4 tard 5 NPN osc osc Ww ILICON ose 3 osc 3 35-1 S MPS 3704 TEST Psu q OR SIMILAR pers , ee Ma | S100ka q caer 0.1 uF =z cher 0.1 uF 200 kp 472 ka COMMON aS COMMON ay Ht 3 HI \ WLO q IN LO A-z , A-Z ke BUFF > BUFF Oo ov INT > INT z vB 3 v- ADJUST G2 : | G2 ASB {TO OSPLay , ASB {TO DISPLAY Py = CG 3 = 3 BP i To BACKPLANE er Pe TO BACKPLANE 21 * Values depend on clock frequency. See Figure 1 & 2. * Values depend on clock frequency. See Figure 1 & 2. Figure 10. 7136 Measuring Ratiometric Values of Quad Load Cel, The reeie- tor values within the bridge are determined by the desired sensitivity. Pin Configurations (continued) LO MAXLAA 1017136 Al Ai G1 1 D2 c2 B2 A Fa &2 MQFP TOP VIEW _ -ue2eemez zaoas283288 SMe TT Te fe] fe] ft] [ol e Ay [ 39] REF LO Gi [3] 38] CtREF [3] 37) CREF 02 [0] 36] COMMON c2 Gi MAAXLAN 35] tN HI ne. Fi IGL7136 aa] nc. 62 C3] [33] IN LO 2 Gy [22] Az Fe G5] 31] BUFF 2 [6] [30] iNT os G7 [23] v- 1 [19] eo} fer} [22] [2a [zal kes] [zs [zz] feo geagdg 2 8288 ss PLCC TOP VIEW (TENS} 3 03 Figure 11. 7136 used as a Dighal Centigrade Thermometer. A silicon diode- connected transistor has a temperature coefiicient of about 2mV/"C. Cak- bration is achieved by placing the sensing transistor in ice water and adjusting the zeroing potentiometer for a 000.0 reading. The sensor should then be Placed in boling water and the scale-factor potentiometer adjusted for a 100.0 reading. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 8 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 1996 Maxim Integrated Products Printed USA ANAXVAA is a registered trademark of Maxim Integrated Products.