This is information on a product in full production.
February 2016 DocID023659 Rev 3 1/31
VN5T016AH-E
Single channel high-side driver with analog current sense
for 24 V automotive applications
Datasheet
production data
Features
General
Very low stand-by current
3.0 V CMOS compatible input
Optimized electromagnetic emission
Very low electromagnetic susceptibility
Compliant with European directive
2002/95/EC
Fault reset standby pin (FR_Stby)
Diagnostic functions
Proportional load current sense
Current sense precision for wide range
currents
Off-state open load detection
Output short to V
CC
detection
Overload and short to ground latch-off
Therm al sh utdown latc h-off
Very low current sense leakage
Protections
Undervoltage shutdown
Overvoltage clamp
Load current limitation
Self limiting of fast thermal transients
Protection against loss of ground and loss
of V
CC
Therm al sh utdow n
Reverse battery protected with self switch
of the PowerMO S
Electros tatic disc harge protection
Applications
All types of resistive, inductive and capacitive
loads
Description
The VN5T016AH-E is a device made using
STMicroelectronics
®
VIPower
®
technology,
intended for driving resistive or inductive loads
with one side connected to ground. Active V
CC
pin voltage clamp protects the device against low
energy spikes. This device integrates an analog
current sense which delivers a current
proportional to the load current. Fault conditions
such as overload, overtemperature or short to
V
CC
are reported via the current sense pin.
Output current limitation protects the device in
overload condition. The device latches off in case
of overload or thermal shutdown.
The device is reset by a low level pass on the fault
reset standby pin.
A permanent low level on the inputs and fault
reset standby pin disables all outputs and sets the
device in standby mode.
Max transient supply voltage V
CC
58V
Ope rati ng voltage range V
CC
8 to 36V
Typ ON-state resistance R
ON
16 m
Current limitation (typ) I
LIM
60 A
OFF-state supply current I
S
2 µA
(1)
1. Typical value with all loads connected.
HPAK
www.st.com
Contents VN5T016AH-E
2/31 DocID023659 Rev 3
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Elect rical char acteristi cs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.2 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3 Maximum demagnetization energy (V
CC
= 24 V) . . . . . . . . . . . . . . . . . . . 22
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.1 HPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.1 HPAK mechanical dat a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.2 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
DocID023659 Rev 3 3/31
VN5T016AH-E List of tables
3
List of tables
Table 1. Pin function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (V
CC
=24V; T
j
= 25 °C). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9. Current sense (8 V < V
CC
< 36 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 10. Open-load detection (FR_Stby = 5 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 16. HPAK mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 17. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
List of figures VN5T016AH-E
4/31 DocID023659 Rev 3
List of figures
Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. T
reset
definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. T
stby
definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Output stuck to V
CC
detection delay time at FR
STBY
activation . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Open-load off-state delay timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Delay response time between rising edge of output current and rising edge of
current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Output voltage drop limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 12. Device behavior in overload condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 13. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 14. High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 16. Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 17. Input high level voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 18. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. On-state resistance vs T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 20. On-state resistance vs V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 21. I
LIMH
vs T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 22. Turn-on voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 23. Turn-off voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 24. Application schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 25. Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 26. HPAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 27. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 23
Figure 28. HPAK thermal impedance junction ambient single pulse (one channel ON) . . . . . . . . . . . 24
Figure 29. Thermal fitting model of a double channel HSD in HPAK. . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 30. HPAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 31. HPAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 32. HPAK tape and reel (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
DocID023659 Rev 3 5/31
VN5T016AH-E Block diagram and pin description
30
1 Block diagram and pin description
Figure 1. Block diagram
Table 1. Pin function
Name Function
V
CC
Battery connec ti on
OUT Power output
GND Ground connection
IN Voltage controlled input pin with hysteresis, CMOS compatible. It controls output
switch state
CS Analog current sense pin, it delivers a current proportional to the load current
FR_Stby In case of latch-off for overtemperature/overcurrent condition, a low pulse on the
FR_Stby pin is needed to reset the channel.
The device enters in standby mode if all inputs and the FR_Stby pin are low.
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Block diagram and pin description VN5T016AH-E
6/31 DocID023659 Rev 3
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection /
pin Current Sense N.C. Output Input FR_Stby
Floating Not allowed X
(1)
1. X: do not care.
XX X
To ground Through 10 k
resistor XNot allowed
Through 10 k
resistor Through 10 k
resistor
).
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DocID023659 Rev 3 7/31
VN5T016AH-E Electrical specifications
30
2 Electrical specifications
Fig ure 3. Cu rrent and voltage conventions
2.1 Absolute maximum ratings
Stressing the device above the ratings listed in Table 3 may cause permanent damage to
the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not
implied. Exposure to the conditions reported in this section for extended periods may affect
device reliability.
I
S
I
GND
V
CC
V
CC
OUTPUT I
OUT
CURRENT I
SENSE
INPUT
I
IN
GND
I
FR_Stby
V
FR_Stby
V
IN
SENSE V
SENSE
V
OUT
V
F
FR_Stby
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
CC
DC supply voltage 58 V
-V
CC
Reverse DC supply voltage -32 V
I
OUT
DC output current Internally limited A
-I
OUT
Reverse DC output current 30 A
I
IN
DC input current -1 to 10 mA
I
FR_Stby
Fault reset standby DC input current -1 to 1.5 mA
V
CSENSE
Current sense maximum voltage V
CC
- 58 to +V
CC
V
E
MAX
Maximum switching energy
(L = 10 mH; V
bat
=32V; T
jstart
= 150°C; I
OUT
=5.9A) 390 mJ
L
SMAX
Maximum stray inductance in short circuit condition
(V
bat
=32V; R
L
= 300 m; T
jstart
= 150°C; I
OUT
=I
limH_max
)40 µH
Electrical specifications VN5T016AH-E
8/31 DocID023659 Rev 3
2.2 Thermal data
V
ESD
Electrostatic discharge
(Human Body Model: R = 1.5 k; C = 100 pF)
INPUT
CURRENT SENSE
FAULT RESET STANDBY PIN
OUTPUT
–V
CC
4000
2000
4000
5000
5000
V
V
V
V
V
V
ESD
Charge device model (CDM-AEC-Q100-011) 750 V
T
j
Junction operating temperature -40 to 150 °C
T
stg
Storage temperature -55 to 150 °C
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Table 4. Thermal data
Symbol Parameter Value Unit
R
thj-case
Thermal resistance jun cti on -cas e (ma x.) 1.5 °C/W
R
thj-amb
Thermal resistance junction-ambient (max.) See Figure 27 °C/W
DocID023659 Rev 3 9/31
VN5T016AH-E Electrical specifications
30
2.3 Electrical characteristics
8V<V
CC
< 36 V; -40°C < T
j
< 150°C, unless otherwise specified.
Table 5. Power section
Symbol Paramete r Test conditions Min. Typ. Max. Unit
V
CC
Operating supply voltage 8 24 36 V
V
USD
Undervoltage shutdown 3.5 5 V
V
USDhyst
Undervoltage shutdown
hysteresis 0.5 V
R
ON
On-st ate resis t anc e
I
OUT
= 5 A; T
j
=25°C;
8V<V
CC
<36V 16 m
I
OUT
= 5 A; T
j
= 150°C;
8V<V
CC
<36V 32
R
ON REV
Reverse battery ON-
state resistance V
CC
=-24V; I
OUT
=-5A;
T
j
=25°C 16 m
V
clamp
Clamp voltage I
S
= 20 mA 58 64 70 V
I
S
Supply current
Off-state; V
CC
=24V; T
j
=25°C;
V
IN
=V
OUT
=V
SENSE
=0V 2
(1)
1. PowerMOS leakage included.
A
On-state; V
CC
=24V; V
IN
=5V;
I
OUT
=0A 2.5 5 mA
I
L(off1)
Off-state o utput current
V
IN
=V
OUT
=0V; V
CC
=24V;
T
j
=25°C 00.013 µA
V
IN
=V
OUT
=0V; V
CC
=24V;
T
j
= 125°C 05
Table 6. Switching (V
CC
=24V; T
j
=2C)
Symbol Parameter Test conditions Min . Typ. Max. Unit
t
d(on)
Turn-on del ay time R
L
= 4.8 —55—µs
t
d(off)
Turn-off delay time R
L
= 4.8 —53—µs
dV
OUT
/dt
(on)
Turn-on vol t ag e slo pe R
L
= 4.8 0.59 V/µs
dV
OUT
/dt
(off)
Turn-off voltage slope R
L
= 4.8 0.54 V/µs
W
ON
Switching energy losses
during t
won
R
L
= 4.8 —2.35— mJ
W
OFF
Switching energy losses
during t
woff
R
L
= 4.8 —1.05— mJ
Electrical specifications VN5T016AH-E
10/31 DocID023659 Rev 3
Figure 4. T
reset
definition
Table 7. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IL
Input low level voltage 0.9 V
I
IL
Low level input current V
IN
= 0.9 V 1 µA
V
IH
Input high level voltage 2.1 V
I
IH
High level input current V
IN
= 2.1 V 10 µA
V
I(hyst)
Input hysteresis voltage 0.25 V
V
ICL
Input cl amp voltage I
IN
= 1 mA 5.5 7 V
I
IN
= -1 mA -0.7
V
FR_Stby_L
Fault reset standby low
level voltage 0.9 V
I
FR_Stby_L
Low level fault reset
sta nd b y cu rr ent V
FR_Stby
= 0.9 V 1 µA
V
FR_Stby_H
Fault reset standby high
level voltage 2.1 V
I
FR_Stby_H
High level fault reset
sta nd b y cu rr ent V
FR_Stby
= 2.1 V 10 µA
V
FR_Stby
(hyst)
Fault reset standby
hysteresis voltage 0.25 V
V
FR_Stby_CL
Fault reset standby
clamp voltage I
FR_Stby
= 15 mA (10 ms) 11 15 V
I
FR_Stby
= -1 mA -0.7
t
reset
Overload latch-off reset
time See Figure 4 224µs
t
stby
Standby delay See Figure 5 120 1200 µs
FR_STBY
IN
OUTPUT
CS
Overload
Channel
T_reset
FR_STBY
IN
OUTPUT
CS
Overload
Channel
T_reset
DocID023659 Rev 3 11/31
VN5T016AH-E Electrical specifications
30
Figure 5. T
stby
definition
Table 8. Protections and diagnostics
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
limH
DC short circuit current V
CC
= 24V 436086A
5V<V
CC
<36V 86 A
I
limL
Short circuit current
during thermal cycling V
CC
=24V; T
R
<T
j
<T
TSD
15 A
T
TSD
Shutdown temperature 150 175 200 °C
T
R
Reset temper atur e T
RS
+1 T
RS
+5 °C
T
RS
Thermal reset of status 135 °C
T
HYST
Thermal hy ste res is
(T
TSD
-T
R
)C
V
DEMAG
Turn-off outp ut voltage
clamp I
OUT
= 5 A; V
IN
= 0 V;
L=6mH V
CC
-58 V
CC
-64 V
CC
-70 V
V
ON
Output voltage drop
limitation I
OUT
= 500 mA;
T
j
= -40°C to 150°C 25 mV
Table 9. Current sense (8 V < V
CC
<36V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
dK
LED
/K
LED(TOT)
(1)
Current se nse ratio
drift
I
OUT
= 12 mA to 100 mA;
I
CAL
= 50 mA; V
SENSE
=0.5V;
T
j
= -40°C to 150°C -50 50 %
K
0
I
OUT
/I
SENSE
I
OUT
= 100 mA; V
SENSE
=0.5V;
T
j
= -40°C to 150°C 1333 5600 11884
dK
0
/K
0(1)
Current se nse ratio
drift I
OUT
=100mA; V
SENSE
=0.5V;
T
j
= -40°C to 150°C -21 32 %
K
1
I
OUT
/I
SENSE
I
OUT
= 0.6 A; V
SENSE
=1V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 2418
3139 5300 9264
7981
dK
1
/K
1(1)
Current se nse ratio
drift I
OUT
= 0.6 A; V
SENSE
=1V;
T
j
= -40°C to 150°C -21 23 %
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Electrical specifications VN5T016AH-E
12/31 DocID023659 Rev 3
K
2
I
OUT
/I
SENSE
I
OUT
= 1.6 A; V
SENSE
=1V;
T
j
= -40°C to 150°C
T
j
= 25 °C to 150 °C 2928
3072 4700 7568
6693
dK
2
/K
2(1)
Current se nse ratio
drift I
OUT
= 1.6 A; V
SENSE
=1V;
T
j
= -40°C to 150°C -26 21 %
K
3
I
OUT
/I
SENSE
I
OUT
= 2.4 A; V
SENSE
=2V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 2912
3007 4400 7048
6039
dK
3
/K
3(1)
Current se nse ratio
drift I
OUT
= 2.4 A; V
SENSE
=2V;
T
j
= -40°C to 150°C -19 24 %
K
4
I
OUT
/I
SENSE
I
OUT
= 3 A; V
SENSE
=4V;
T
j
= -40°C to 150°C
T
j
= 25 °C to.150 °C 2843
3142 4300 6686
5634
dK
4
/K
4(1)
Current se nse ratio
drift I
OUT
= 3 A; V
SENSE
= 4 V ;
T
j
= -40°C to 150°C -16 22 %
K
5
I
OUT
/I
SENSE
I
OUT
= 4.2 A; V
SENSE
= 4 V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 3034
3402 4250 5977
5276
dK
5
/K
5(1)
Current se nse ratio
drift I
OUT
= 4.2 A; V
SENSE
=4V;
T
j
= -40°C to 150°C -13 16 %
K
6
I
OUT
/I
SENSE
I
OUT
=20A; V
SENSE
= 4 V;
T
j
= -40°C to 150°C 3942 4240 4748
dK
6
/K
6(1)
Current se nse ratio
drift I
OUT
=20A; V
SENSE
=4V;
T
j
= -40°C to 150°C -5 5 %
dK/K
bulb1(TOT)(1)
Current se nse ratio
drift
I
OUT
= 1.6 A to 4.2 A;
I
OUTCAL
= 3 A; V
SENSE
=4V;
T
j
= -40°C to 150°C -17 40 %
dK/K
bulb2(TOT)(1)
Current se nse ratio
drift
I
OUT
= 0.6 A to 2.4 A;
I
OUTCAL
= 1.2 A; V
SENSE
=2V;
T
j
= -40°C to 150°C -31 33 %
I
SENSE0
Analog sense
leakage current
I
OUT
= 0 A; V
SENSE
= 0 V;
V
IN
=0V; T
j
= -40°C to 150°C 01
µA
I
OUT
= 0 A; V
SENSE
= 0 V;
V
IN
=5V; T
j
= -40°C to 150°C 02
V
SENSE
Max analog sense
output voltage I
OUT
= 20 A; R
SENSE
= 3.9 k5V
V
SENSEH
Analog sense
output voltage in
fault condi tion
(2)
V
CC
=24V; R
SENSE
= 3.9 k8V
I
SENSEH
Analog sense
output current in
fault condi tion
(2)
V
CC
= 24 V; V
SENSE
= 5 V 9 12 mA
Table 9. Current sense (8 V < V
CC
< 36 V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
DocID023659 Rev 3 13/31
VN5T016AH-E Electrical specifications
30
t
DSENSE2H
Delay r es pon se
time from rising
edge of INPUT pin
V
SENSE
<4V;
0.5 A < I
OUT
<20A;
I
SENSE
=90% of I
SENSE
max
(see Figure 7)
300 600 µs
Δt
DSEN
SE
2H
Delay r es pon se
time between rising
edge of output
current and rising
edge of current
sense
V
SENSE
<4V;
I
SENSE
=90% of I
SENSEMAX
;
I
OUT
=90% of I
OUTMAX
;
I
OUTMAX
= 5 A (see Figure 10)
450 µs
t
DSENSE2L
Delay r es pon se
time from falli ng
edge of INPUT pin
V
SENSE
<4V;
0.5 A < I
OUT
<20A;
I
SENSE
=10% of I
SENSE
max
(see Figure 7)
320µs
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, overtemperature and open load in OFF-state condition.
Table 10. Open-load detection (FR_Stby = 5 V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
OL
Openload off-state
voltage detection
threshold V
IN
= 0 V; 8 V < V
CC
<36 V 2 4 V
t
DSTKON
Output short circuit to
V
CC
detecti on del ay at
turn-off See Figure 8 180 1800 µs
I
L(off2)
Of f-state ou tput curren t
at V
OUT
= 4 V V
IN
=0V; V
SENSE
=0V;
V
OUT
rising from 0 V to 4 V -120 0 µA
t
d_vol
Delay response from
output rising edge to
V
SENSE
rising edge in
openload
V
OUT
=4V; V
IN
=0V;
V
SENSE
=90% of V
SENSEH
;
R
SENSE
= 3.9 k
20 µs
t
DFRSTK_ON
Output short circuit to
V
CC
detecti on del ay at
FRSTBY activation
See Figure 8;
Input
1,2
=low 50 µs
Table 9. Current sense (8 V < V
CC
< 36 V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Electrical specifications VN5T016AH-E
14/31 DocID023659 Rev 3
Figure 6. Output stuck to V
CC
detection delay time at FR
STBY
activation
Figure 7. Current sense delay characteristics
Figure 8. Open-load off-state dela y timing
1. With FR_Stby = 5 V.
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DocID023659 Rev 3 15/31
VN5T016AH-E Electrical specifications
30
Figure 9. Switching characteristics
Figure 10. Delay response time between rising edge of output c urrent and rising edge
of current sense
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Electrical specifications VN5T016AH-E
16/31 DocID023659 Rev 3
Figure 11. Output voltage drop limitation
Figure 12. Device behavior in overload condition
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DocID023659 Rev 3 17/31
VN5T016AH-E Electrical specifications
30
Table 11. Truth table
Conditions Fault reset standby Input Output Sense
Standby L L X 0
Normal operati on X
XL
HL
H0
Nominal
Overload X
XL
HL
H0
> Nominal
Overtemperature / short to
ground
X
L
H
L
H
H
L
Cycling
Latched
0
V
SENSEH
V
SENSEH
Undervoltage X X L 0
Short to V
BAT
L
H
X
L
L
H
H
H
H
0
V
SENSEH
< Nominal
Open load off- state ( with
pull-up)
L
H
X
L
L
H
H
H
H
0
V
SENSEH
0
Negative output voltage
clamp X L Negative 0
Electrical specifications VN5T016AH-E
18/31 DocID023659 Rev 3
Table 12. Electrical transient requirements (part 1)
ISO 7637-2:
2004(E)
Test pulse
Test levels
(1)
1. The above test levels must be considered referred to V
CC
= 24.5V except for pulse 5b
Number of
pulses or
test times
Burst cycle/p ulse
repetition time Delays and
impedance
III IV
1 - 450 V - 600 V 5000
pulses 0.5 s 5 s 1 ms, 50
2a + 37 V + 50 V 5000
pulses 0.2 s 5 s 50 µs, 2
3a - 150 V - 200 V 1h 90 ms 100 ms 0.1 µs, 50
3b + 150 V + 200 V 1h 90 ms 100 ms 0.1 µs, 50
4 - 12 V - 16 V 1 pulse 100 ms, 0.01
5b
(2)
2. Valid in case of external load dump clamp: 58V maximum referred to ground.
+ 123 V + 174 V 1 pulse 350 ms, 1
Table 13. Electrical transient requirements (part 2)
ISO 7637-2:
2004(E)
Test pulse
Test level result s
III IV
1C C
(1)
1. With R
load
< 24 Ω.
2a C C
3a C C
3b
(2)
2. Without capacitor betweeen V
CC
and GND.
EE
3b
(3)
3. With 10 nF between V
CC
and GND.
CC
4C C
5b
(4)
4. External load dump clamp, 58 V maximum, referred to ground.
CC
Table 14. Electrical transient requirements (part 3)
Class Contents
C All functions of the device are performed as designed after exposure to disturbance.
EOne or m ore funct ions of th e device are not pe rformed as de signed a fter exposure to
disturba nce and canno t be returne d to proper opera tion with out repla cing th e devic e.
DocID023659 Rev 3 19/31
VN5T016AH-E Electrical specifications
30
2.4 Electrical characteristics curves
Figure 13. Off-state output current Figure 14. High level input current
Figure 15. Input clamp voltage Figure 16. Input low level volt age
Figure 17. Input high level voltage Figure 18. Input hysteresis voltage
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Electrical specifications VN5T016AH-E
20/31 DocID023659 Rev 3
Figure 19. On-state resistance vs T
case
Figure 20. On-state resistance vs V
CC
Figure 21. I
LIMH
vs T
case
Figure 22. Turn-on voltage slope
Figure 23. Turn-off voltage slope
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DocID023659 Rev 3 21/31
VN5T016AH-E Application information
30
3 Application information
Figure 24. Application schematic
3.1 Load dump protection
D
ld
is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
V
CC
max DC rating. The same applies if the device is subject to transients on the V
CC
line
that are greater than the ones shown in the ISO 7637-2 2004 (E) table.
3.2 MCU I/Os protection
When negative transients are present on the V
CC
line, the control pins is pulled negative. ST
suggests to insert a resistor (R
prot
) in line to prevent the microcontroller I/O pins from
latching-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of
microcontroller I/Os.
Equation 1
-V
CCpeak
/ I
latchup
R
prot
(V
OHμC
- V
IH
) / I
IHmax
Calculation example:
For V
CCpeak
= -600 V and I
latchup
20 mA; V
OHμC
4.5 V
30 k R
prot
190 k.
Recommended value: R
prot
= 56 k
6
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Application information VN5T016AH-E
22/31 DocID023659 Rev 3
3.3 Maximum demagnetization energy (V
CC
=24V)
Figure 25. Maximum turn-off current versus inductance
1. Values are generated with R
L
=0
Ω
. In case of repetitive pulses, T
jstart
(at the beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
C: T
jstart
= 125°C repetitive pulse
A: T
jstart
= 150°C single pulse
B: T
jstart
= 100°C repetitive pulse
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DocID023659 Rev 3 23/31
VN5T016AH-E Package and PCB thermal data
30
4 Package and PCB thermal data
4.1 HPAK thermal data
Figure 26. HPAK PC board
1. Layout condition of R
th
and Z
th
measurements (Board finish thickness 1.6 mm +/- 10%; Board double layer;
Board dimension 78x86; Board Material FR4; Cu thickness 0.070mm (front and back side); Thermal vias
separation 1.2 mm; Thermal via diameter 0.3 mm +/- 0.08 mm; Cu thickness on vias 0.025 mm; Footprint
dimension 6.4 mm x 7 mm).
Figure 27. R
thj-amb
vs PCB copper area in open box free air condition (one channel
ON)
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
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

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57+MDPE
57+MDPE
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Package and PCB thermal data VN5T016AH-E
24/31 DocID023659 Rev 3
Figure 28. HPAK thermal impedance junction ambient single pulse (one channel ON)
Figure 29. Thermal fitting model of a double channel HSD in HPAK
1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
Equation 2: pulse calculation formula
where δ = t
P
/T
'!0'#&4



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=7+&:
7LPHV
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&X FP
&X IRRWSULQW
'!0'#&4
ZTHδRTH δZTHtp 1δ()+=
DocID023659 Rev 3 25/31
VN5T016AH-E Package and PCB thermal data
30
Table 15. The rmal parameters
Area/island (cm
2
)Footprint48
R1 (°C/W) 0.1
R2 (°C/W) 0.5
R3 (°C/W) 2
R4 (°C/W) 8
R5 (°C/W) 28 22 14
R6 (°C/W) 31 25 18
C1 (W.s/°C) 0.01
C2 (W.s/°C) 0.05
C3 (W.s/°C) 0.2
C4 (W.s/°C) 0.4
C5 (W.s/°C) 0.8 1.4 3
C6 (W.s/°C) 3 6 9
Package information VN5T016AH-E
26/31 DocID023659 Rev 3
5 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
5.1 HPAK mechanical data
Figure 30. HPAK package dimensions
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DocID023659 Rev 3 27/31
VN5T016AH-E Package information
30
Table 16. HPAK mechanical data
Ref. dim Data book mm
Min. Typ. Max.
A 2.20 2.40
A1 0.90 1.10
A2 0.03 0.23
b 0.40 0.60
b1 0.45 0.65
b4 5.20 5.40
c 0.45 0.60
c2 0.48 0.60
D 6.00 6.20
D1 4.95 5.10 5.25
E 6.40 6.60
E1 5.00 5.20 5.40
e0.85
e1 1.60 1.80
e2 3.30 3.50
e3 5.00 5.20
H 9.35 10.10
L 1.00 1.50
(L1) 2.60 2.80 3.00
L2 0.60 0.80 1.00
L4 0.50 1.00
R0.20
V2
Package information VN5T016AH-E
28/31 DocID023659 Rev 3
5.2 Packing information
The devices can be packed in tube or tape and reel shipments (see Table 17: Device
summary).
Figure 31. HPAK
tube shipment (no suffix)
Figure 32. HPAK tape and reel (suffix “TR”)
All dimensions are in mm.
Base q.ty 75
Bulk q.ty 3000
Tube length (± 0. 5 ) 532
A6
B21.3
C (± 0.1) 0.6
A
C
B
All dimensions are in mm.
Base q.ty 2500
Bulk q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 16.4
N (min) 60
T (max) 22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
All dimensions are in mm.
Tape width W 16
Tape hole spacing P0 (± 0.1) 4
Component spacing P 8
Hole diameter D (± 0.1 /-0) 1.5
Hole diameter D1 (min) 1.5
Hole position F (± 0.05) 7.5
Compartment depth K (max) 2.75
Hole spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User dire ctio n o f feed
REEL DIMENSIONS
DocID023659 Rev 3 29/31
VN5T016AH-E Order codes
30
6 Order codes
Table 17. Device summary
Package Order codes
Tube Tape and reel
HPAK VN5T016AH-E VN5T016AHTR-E
Revision history VN5T016AH-E
30/31 DocID023659 Rev 3
7 Revision history
Table 18. Document revision history
Date Revision Changes
01-Oct-2012 1 Initial release.
17-Sep-2013 2 Updated disclaimer.
24-Feb-2016 3 Table 4: Thermal data:
–R
thj-case
: updated valu e
Updated Section 5.1: HPAK mechanical data
DocID023659 Rev 3 31/31
VN5T016AH-E
31
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