MD1715K6-G-M935 - Microchip Technology

 2018 Microchip Technology Inc. DS20005921A-page 1

MD1715

Features

• Advanced CMOS Technology

• ±4.75 to 12.9V Gate Drive Voltage

• 2A Output Source and Sink Current

• 6.5 ns Rise and Fall Time with 1 nF Load

• 10 ns Propagation Delay

• ±2 ns Matched Delay Times

• 12 Matched Channels

• 1.8V to 3.3V CMOS Logic Interface

• Smart Logic Threshold

• Low-inductance Package

Applications

• Medical Ultrasound Imaging

• Piezoelectric Transducer Drivers

• Metal Flaw Detection

• Non-destructive Testing (NDT)

General Description

The MD1715, paired with Microchip’s TC8020, forms a

2-channel five-level high-voltage high-speed transmit

pulser chip set. The chip set is designed for medical

ultrasound imaging applications but can also be used

for metal flaw detection, NDT and piezoelectric

transducer drivers.

The MD1715 is a 2-channel logic controller circuit with

12 low-impedance MOSFET gate drivers. There are

two sets of control logic inputs—one for Channel A and

one for Channel B. Each channel consists of three pairs

of MOSFET gate drivers. These drivers are designed to

match the drive requirements of Microchip’s TC8020.

The TC8020 is the output stage of the pulser, with six

pairs of MOSFETs. Each pair consists of a P-channel

and an N-channel MOSFET. They are designed to

have the same impedance and can provide typical

peak currents of ±3.5A at 200V.

Package Type

See Table 2-1 for pin information.

40-lead QFN

(Top view)

2-Channel 5-Level High-Speed Ultrasound Driver IC

VDD2

GN2

VSS

VDD1

High Speed

Gate Buffers

SP1

DP1

100Ω

DN1

SP2

SN2

DP2

DN2

DP3

DN3

OP1 GP1

ON1 GN1

Control

Logic

and

Level

Translation

VLL/EN

SEL

POS

NEG

GND

OP2 GP2

ON2

OP3 GP3

GN3

ON3

SN3

SP3

VPP2

VNN2

VNN1

MD1715

1 OF 2-CH TC8020

6 of 12-FETs

VPP1

VDD1 VDD2

-12V

VSS

AVSS

-12V

GND

+12V +12V

AVDD

+12V

PAD PAD

VDD2

VDD1

High Speed

Gate Buffers

SN1

MD1715

DS20005921A-page 2  2018 Microchip Technology Inc.

Functional Block Diagram

 2018 Microchip Technology Inc. DS20005921A-page 3

MD1715

Typical Application Circuit

10nF

TX(B)

TX(A)

TC8020

MD1715

AVDD

SELA

POSA

NEGA

POSB

NEGB

SELB

OP1A

ON1A

OP2A

ON2A

OP3A

ON3A

OP1B

ON1B

OP2B

ON2B

OP3B

ON3B

GP1

GN1

GP2

GN2

GP3

GN3

GP4

GN4

GP5

GN5

GP6

GN6

AGND

VLL/EN

+12V

GND AVSS(SUB) VSS

1.8 to 3.3V

CMOS

Input Logic

VDD1 VDD2

-12V

+12V +12V

+3.3V

-12V

VPP2

SP2

VPP1

SP1

SP3 SP4

SP5

SP6

SN3 SN2 SN1

VNN1

VNN2

SN5 SN4

SN6

PAD

DP1

DN1

DP2

DN2

DP3

DN3

DP4

DN4

DP5

DN5

DP6

DN6

MD1715

DS20005921A-page 4  2018 Microchip Technology Inc.

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings†

GND and AGND, Ground .......................................................................................................................................... 0V

Logic Input Pin, VLL ................................................................................................................................ –0.5V to +5.5V

Positive Gate Drive Supply, AVDD, VDD1, VDD2 ................................................................................... –0.5V to +14.5V

Negative Gate Drive Supply, AVSS, VSS ............................................................................................... –14.5V to +0.5V

Operating Junction Temperature, TJ ....................................................................................................... 0°C to +125°C

Storage Temperature, TS ..................................................................................................................... –65°C to +150°C

Power Dissipation:

40-lead QFN (Note 1) ................................................................................................................................. 1.3W

† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only, and functional operation of the device at those or any other conditions above those

indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for

extended periods may affect device reliability.

Note 1:



OPERATING SUPPLY VOLTAGES AND CURRENTS

Electrical Specifications for Operating Supply Currents: Over operating conditions unless otherwise specified,

VLL = 3.3V, AVDD = VDD1 = VDD2 = +12V, AVSS = VSS = –12V, TA = 25°C

Parameter Sym. Min. Typ. Max. Unit Conditions

Logic Supply VLL 1.8 3.3 3.6 V

Positive Analog Supply AVDD 8 — 12.9 VAVDD ≥ (VDD1 or VDD2)

Positive Gate Drive Supply VDD2, VDD14.75 —12.9 V

Negative Gate Drive Supply AVSS, VSS –12.9 —–4.75 V

Logic Reference Current IVLL —10 —µA VLL = 3.3V

AVDD Power-down Current IAVDDQ —0.4 —mA EN = 0, all inputs low

VSS Power-down Current IVSSQ —0.1 —mA

VDD1 Power-down Current IVDD1Q —10 25 µA EN = 0, all inputs low

VDD2 Power-down Current IVDD2Q —10 25 µA

AVDD Power-up Current IAVDDEN — 2 3 mA EN = 1, all inputs low

VSS Power-up Current IVSSEN —0.7 1mA

VDD1 Power-up Current IVDD1EN —10 —µA EN = 1, all inputs low

VDD2 Power-up Current IVDD2EN —10 —µA

AVDD CW 5 MHz Current IAVDDCW —10 —mA A and B Channels on

at 5 MHz, no load,

VDD1 = 12V, VDD2 = 5V

VSS CW 5 MHz Current IVSSCW — 5 — mA

VDD1 CW 5 MHz Current IVDD1CW —25 —mA

A and B Channels on

at 5 MHz, no load,

VDD1 = 5V, VDD2 = 12V

VDD2 CW 5 MHz Current IVDD2CW —25 —mA

A and B Channels on

at 5 MHz, no load,

VDD1 = 12V, VDD2 = 5V

1 oz. four-layer 3 inches x 4 inches PCB

DC ELECTRICAL CHARACTERISTICS

Parameter Sym. Min. Typ. Max. Unit Conditions

P-CHANNEL AND N-CHANNEL GATE DRIVER OUTPUTS

Output Sink Resistance P-Channel RSINK

— 5 6 ΩISINK = 100 mA

N-Channel — 5 6 ΩISINK = 100 mA

Output Source Resistance P-Channel RSOURCE

— 5 6 ΩISOURCE = 100 mA

N-Channel — 5 6 ΩISOURCE = 100 mA

Peak Output Sink Current P-Channel ISINK

1.7 2 — A

N-Channel 1.7 2 — A

Peak Output Source Current P-Channel ISOURCE

1.7 2 — A

N-Channel 1.7 2 — A

LOGIC INPUTS

Chip Disable Low Voltage VENL 0 — 0.3 VVLL/EN is a dual function

Input Logic High Voltage VIH 0.8 VLL — VLL V

Input Logic Low Voltage VIL 0 — 0.2 VLL V

Input Logic High Current IIH — — 1 µA

Input Logic Low Current IIL –1 — — µA

AC ELECTRICAL CHARACTERISTICS

Electrical Specifications: Over operating conditions unless otherwise specified, VLL = 3.3V,

AVDD = VDD1 = VDD2 = +12V, AVSS = VSS = –12V, TA = 25°C

Parameter Sym. Min. Typ. Max. Unit Conditions

Input Rise and Fall Time tirf — — 10 ns Logic input edge speed

requirement

Output Rise Time tr—6.5 —ns

1 nF load, input signal

rise/fall time 2 ns (Timing

Waveforms)

Output Fall Time tf—6.5 —ns

Output Rise Delay tdr —10 —ns

Output Fall Delay tdf —10 —ns

Rise and Fall Time Matching |tr–tf| — 1 — — For each channel

Propagation Delay Matching |tdr–tdf| — 1 — —

Delay Time Matching tdm —±2 —ns Channel to channel and

device to device

Output Jitter ∆tj—20 —ps VDD = 10V

IC Enable Time tEN_ON —25 50 μs

IC Disable Time tEN_OFF —0.5 2μs

Second Harmonic Distortion HD2 –40 — — dB

 2018 Microchip Technology Inc. DS20005921A-page 5

MD1715

DS20005921A-page 6  2018 Microchip Technology Inc.

TEMPERATURE SPECIFICATIONS

Parameter Sym. Min. Typ. Max. Unit Conditions

TEMPERATURE RANGE

Operating Junction Temperature TJ–0 —+125 °C

Storage Temperature TS–65 —+150 °C

PACKAGE THERMAL RESISTANCE

40-lead QFN JA —24 —°C/W

tdf

50%

10%

50%

Input

Output

tdr

VDD

trtf

90%

 2018 Microchip Technology Inc. DS20005921A-page 7

MD1715

Timing Waveforms

MD1715

DS20005921A-page 8  2018 Microchip Technology Inc.

2.0 PIN DESCRIPTION

The details on the pins of MD1715 are listed on

Table 2-1. See Package Type for the location of pins.

TABLE 2-1: PIN FUNCTION TABLE

Pin Number Pin Name Description

1SELA SEL input logic control for Channel A. See Tab l e 3-1.

2POSA POS input logic control for Channel A. See Ta b le 3-1.

3NEGA NEG input logic control for Channel A. See Ta b l e 3-1.

4VLL/EN Logic High reference voltage and chip enable input

5AVDD Positive supply voltage of analog circuitry. AVDD should be at the same or higher

potential than the highest voltages of VDD1 or VDD2.

6AGND Digital ground

7AVSS Negative supply voltage of analog circuitry and connection of IC substrate.

Should be at the same potential as VSS.

8SELB SEL input logic control for Channel B. See Tab l e 3-2.

9POSB POS input logic control for Channel B. See Ta b le 3-2.

10 NEGB NEG input logic control for Channel B. See Ta b l e 3-2.

11 VDD2 Positive supply voltage of the gate drivers for the output stages OP1 and ON1 in

Channel A and Channel B. VDD2 can be at a different voltage than VDD1.

12 OP1B First output P-channel gate driver for Channel B

13 VDD1

Positive supply voltage of the gate drivers for the output stages OP2, ON2 and

ON3 in Channel A and Channel B. VDD1 can be at a different voltage than

VDD2.

14 GND Power ground

15 OP2B Second output P-channel gate driver for Channel B

16 VDD2 Positive supply voltage of the gate drivers for the output stages OP1 and ON1 in

Channel A and Channel B. VDD2 can be at a different voltage than VDD1.

17 ON1B First output N-channel gate driver for Channel B

18 GND Power ground

19 VDD1

Positive supply voltage of the gate drivers for the output stages OP2, ON2 and

ON3 in Channel A and Channel B. VDD1 can be at a different voltage than

VDD2.

20 ON2B Second output N-channel gate driver for Channel B

21 GND Power ground

22 ON3B Damping output N-channel gate driver for Channel B

23 VSS Negative supply voltage for the gate drive of OP3. Should be the same voltage as

AVSS.

24 OP3B Damping output P-channel gate driver for Channel B

25 GND Power ground

26 VSS Negative supply voltage for gate drive of OP3. Should be the same voltage as

AVSS.

27 OP3A Damping output P-channel gate driver for Channel A

28 GND Power ground

 2018 Microchip Technology Inc. DS20005921A-page 9

MD1715

29 GND Power ground

30 ON3A Damping output N-channel gate driver for Channel A

31 ON2A Second output N-channel gate driver for Channel A

32 VDD1

Positive supply voltage of the gate drivers for the output stages OP2, ON2 and

ON3 in Channel A and Channel B. VDD1 can be at a different voltage than

VDD2.

33 GND Power ground

34 ON1A First output N-channel gate driver for Channel A

35 VDD2 Positive supply voltage of the gate drivers for the output stages OP1 and ON1 in

Channel A and Channel B. VDD2 can be at a different voltage than VDD1.

36 OP2A Second output P-channel gate driver for Channel A

37 GND Power ground

38 VDD1

Positive supply voltage of the gate drivers for the output stages OP2, ON2 and

ON3 in Channel A and Channel B. VDD1 can be at a different voltage than

VDD2.

39 OP1A First output P-channel gate driver for Channel A

40 VDD2 Positive supply voltage of the gate drivers for the output stages OP1 and ON1 in

Channel A and Channel B. VDD2 can be at a different voltage than VDD1.

Center Pad Thermal Pad IC substrate, must connect to AVSS externally

TABLE 2-1: PIN FUNCTION TABLE (CONTINUED)

Pin Number Pin Name Description

MD1715

DS20005921A-page 10  2018 Microchip Technology Inc.

3.0 FUNCTIONAL DESCRIPTION

TC8020

GN1

GN2

GN3

GP3

SN3

SN6

GP6

GN6

GN5

GN4

GP5

GP4

SN5

SN4

VSUB

SP4

SP5

DN1

DP1

DN2

DP2

DN3

DP3

SP3

SP6

DN6

DP6

DN5

DP5

DN4

DP4

GP2

GP1

SN2

SN1

VSUB

SP1

SP2

MD1715

SELA

POSA

NEGA

VLL/EN

AVDD

AGND

AVSS

SELB

POSB

NEGB

VDD2

OP1A

VDD1

GND

OP2A

VDD2

ON1A

GND

VDD1

ON2A

ON3A

GND

OP3A

VSS

GND

OP3B

VSS

ON3B

GND

VDD2

OP1B

VDD1

GND

OP2B

VDD2

ON1B

GND

VDD1

ON2B

TX(A)

TX(B)

FIGURE 3-1: Circuit Pin Layout.

TABLE 3-1: TRUTH FUNCTION TABLE FOR CHANNEL A

Logic Inputs A SP1

DP1

SN1

DN1

SP2

DP2

SN2

DN2

SP3

DP3

SN3

DN3

SELA POSA NEGA

1000OFF OFF OFF OFF ON ON

1001OFF OFF OFF ON OFF OFF

1010OFF OFF ON OFF OFF OFF

1011OFF OFF OFF OFF OFF OFF

1100OFF OFF OFF OFF ON ON

1101OFF ON OFF OFF OFF OFF

1110ON OFF OFF OFF OFF OFF

1111OFF OFF OFF OFF OFF OFF

TABLE 3-2: TRUTH FUNCTION TABLE FOR CHANNEL B

Logic Inputs B SP4

DP4

SN4

DN4

SP5

DP5

SN5

DN5

SP6

DP6

SN6

DN6

SELB POSB NEGB

1000OFF OFF OFF OFF ON ON

1001OFF OFF OFF ON OFF OFF

1010OFF OFF ON OFF OFF OFF

1011OFF OFF OFF OFF OFF OFF

1100OFF OFF OFF OFF ON ON

1101OFF ON OFF OFF OFF OFF

1110ON OFF OFF OFF OFF OFF

1111OFF OFF OFF OFF OFF OFF

0 X X X OFF OFF OFF OFF ON ON

0→1 0 0 0 EN transitions from low to high or high to low should occur at all logic

inputs low.

1→0 0 0 0

 2018 Microchip Technology Inc. DS20005921A-page 11

MD1715

DS20005921A-page 12  2018 Microchip Technology Inc.

4.0 PACKAGING INFORMATION

4.1 Package Marking Information

Legend: XX...X Product Code or Customer-specific information

Y Year code (last digit of calendar year)

YY Year code (last 2 digits of calendar year)

WW Week code (week of January 1 is week ‘01’)

NNN Alphanumeric traceability code

Pb-free JEDEC® designator for Matte Tin (Sn)

*This package is Pb-free. The Pb-free JEDEC designator ( )

can be found on the outer packaging for this package.

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available characters

for product code or customer-specific information. Package may or not include

the corporate logo.

40-lead QFN Example

XXXXXXX

YYWWNNN

MD1715

1836985

Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.

 2018 Microchip Technology Inc. DS20005921A-page 13

MD1715

DS20005921A-page 14  2018 Microchip Technology Inc.

NOTES:

 2018 Microchip Technology Inc. DS20005921A-page 15

MD1715

APPENDIX A: REVISION HISTORY

Revision A (January 2018)

• Converted Supertex Doc# DSFP-MD1715 to

Microchip DS20005921A

• Changed the package marking format

• Changed the quantity of the 40-lead VQFN K6

M935 package from 2000/Reel to 3000/Reel

• Made minor text changes throughout the

document

MD1715

DS20005921A-page 16  2018 Microchip Technology Inc.

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.

Examples:

a) MD1715K6-G: 2-Channel 5-Level High-

Speed Ultrasound Driver

IC, 40-lead VQFN,

490/Tray

b) MD1715K6-G-M935: 2-Channel 5-Level High-

Speed Ultrasound Driver

IC, 40-lead VQFN,

3000/Reel

PART NO.

Device

Device: MD1715 = 2-Channel 5-Level High-Speed Ultrasound

Driver IC

Package: K6 = 40-lead VQFN

Environmental: G = Lead (Pb)-free/RoHS-compliant Package

Media Types: (blank) = 490/Tray for a K6 Package

M935 = 3000/Reel for a K6 Package

Package

X - X

Environmental

Media Type

Options

 2018 Microchip Technology Inc. DS20005921A-page 17

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights unless otherwise stated.

Trademarks

The Microchip name and logo, the Microchip logo, AnyRate, AVR,

AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,

CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,

KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,

maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,

OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip

Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST

Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered

trademarks of Microchip Technology Incorporated in the U.S.A.

and other countries.

ClockWorks, The Embedded Control Solutions Company,

EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,

mTouch, Precision Edge, and Quiet-Wire are registered

trademarks of Microchip Technology Incorporated in the U.S.A.

Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any

Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,

CodeGuard, CryptoAuthentication, CryptoCompanion,

CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average

Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial

Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,

KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,

MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,

Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,

PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple

Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,

SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,

USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and

ZENA are trademarks of Microchip Technology Incorporated in the

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SQTP is a service mark of Microchip Technology Incorporated in

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Silicon Storage Technology is a registered trademark of Microchip

Technology Inc. in other countries.

GestIC is a registered trademark of Microchip Technology

Germany II GmbH & Co. KG, a subsidiary of Microchip Technology

Inc., in other countries.

All other trademarks mentioned herein are property of their

respective companies.

ISBN: 978-1-5224-2591-5

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mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

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QUALITYMANAGEMENTS

YSTEM

CERTIFIEDBYDNV

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DS20005921A-page 18  2018 Microchip Technology Inc.

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Germany - Munich

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Germany - Rosenheim

Tel: 49-8031-354-560

Israel - Ra’anana

Tel: 972-9-744-7705

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

Italy - Padova

Tel: 39-049-7625286

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

Norway - Trondheim

Tel: 47-7289-7561

Poland - Warsaw

Tel: 48-22-3325737

Romania - Bucharest

Tel: 40-21-407-87-50

Spain - Madrid

Tel: 34-91-708-08-90

Fax: 34-91-708-08-91

Sweden - Gothenberg

Tel: 46-31-704-60-40

Sweden - Stockholm

Tel: 46-8-5090-4654

UK - Wokingham

Tel: 44-118-921-5800

Fax: 44-118-921-5820

Worldwide Sales and Service

10/25/17