IRFP22N50A
12/15/99
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PD- 91833C
SMPS MOSFET
HEXFET® Power MOSFET
lSwitch Mode Power Supply (SMPS)
lUninterruptIble Power Supply
lHigh Speed Power Switching
Benefits
Applications
lLow Gate Charge Qg results in Simple
Drive Requirement
lImproved Gate, Avalanche and Dynamic
dv/dt Ruggedness
lFully Characterized Capacitance and
Avalanche Voltage and Current
VDSS RDS(on) max ID
500V 0.23Ω22A
Typical SMPS Topologies
l Full Bridge Converters
l Power Factor Correction Boost
Notes through are on page 8
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 22
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 14 A
IDM Pulsed Drain Current 88
PD @TC = 25°C Power Dissipation 277 W
Linear Derating Factor 2.2 W/°C
VGS Gate-to-Source Voltage ± 30 V
dv/dt Peak Diode Recovery dv/dt 4.8 V/ns
TJOperating Junction and -55 to + 150
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
Mounting torqe, 6-32 or M3 screw 10 lbf•in (1.1N•m)
Absolute Maximum Ratings
TO-247AC
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Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 12 ––– ––– S VDS = 50V, ID = 13A
QgTotal Gate Charge –– – –– – 1 2 0 ID = 22A
Qgs Gate-to-Source Charge ––– ––– 32 nC VDS = 400V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 52 VGS = 10V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 26 –– – VDD = 250V
trRise Time ––– 94 ––– ID = 22A
td(off) Turn-Off Delay Time ––– 47 ––– R G = 4.3Ω
tfFall Time ––– 47 ––– RD = 11Ω,See Fig. 10
Ciss Input Capacitance ––– 3450 ––– VGS = 0V
Coss Output Capacitance ––– 513 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 27 ––– pF ƒ = 1.0MHz, See Fig. 5
Coss Output Capacitance ––– 4935 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 137 ––– VGS = 0V, VDS = 400V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 264 ––– VGS = 0V, VDS = 0V to 400V
Dynamic @ TJ = 25°C (unless otherwise specified)
ns
Parameter Typ. Max. Units
EAS Single Pulse Avalanche Energy––– 1180 mJ
IAR Avalanche Current––– 22 A
EAR Repetitive Avalanche Energy––– 28 mJ
Avalanche Characteristics
S
D
G
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode)
––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.5 V TJ = 25°C, IS = 22A, VGS = 0V
trr Reverse Recovery Time ––– 570 850 n s TJ = 25°C, IF = 22A
Qrr Reverse RecoveryCharge ––– 6.1 9.2 µC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Diode Characteristics
22
88 A
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.45
RθCS Case-to-Sink, Flat, Greased Surface 0.24 ––– °C/W
RθJA Junction-to-Ambient ––– 40
Thermal Resistance
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 50 0 – –– – –– V V GS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient – –– 0.55 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.23 ΩVGS = 10V, ID = 13A
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
––– ––– 25 µA VDS = 500V, VGS = 0V
––– ––– 250 VDS = 400V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 30V
Gate-to-Source Reverse Leakage ––– ––– -100 nA VGS = -30V
Static @ TJ = 25°C (unless otherwise specified)
IGSS
IDSS Drain-to-Source Leakage Current
IRFP22N50A
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Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.01
0.1
1
10
100
0.1 1 10 100
20
µ
s PULSE WIDTH
T = 25 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
1
10
100
0.1 1 10 100
20
µ
s PULSE WIDTH
T = 150 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Volta
g
e (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
0.1
1
10
100
4.0 5.0 6.0 7.0 8.0 9.0 10.0
V = 50V
20µs PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
J°
T = 150 C
J°
-60 -40 -20 0 20 40 60 80 100 120 140 160
0.0
0.5
1.0
1.5
2.0
2.5
3.0
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
22A
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Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
020 40 60 80 100 120
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
22A
V = 100V
DS
V = 250V
DS
V = 400V
DS
0.1
1
10
100
0.2 0.6 1.0 1.4 1.8
V ,Source-to-Drain Volta
g
e (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J°
T = 150 C
J°
1
10
100
1000
10 100 1000 10000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
Sin
g
le Pulse
T
T = 150 C
= 25 C
°°
J
C
V , Drain-to-Source Volta
g
e (V)
I , Drain Current (A)I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
1
10
100
1000
10000
100000
1 10 100 1000
C , Capacitance (pF)
DS
V , Dra in- to -S o u rc e V o lta
g
e
(
V
A
V = 0 V , f = 1 MH z
C = C + C , C SH OR T E D
C = C
C = C + C
GS
iss
g
s
g
d ds
rss
g
d
oss ds
g
d
C
iss
C
oss
C
rss
IRFP22N50A
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Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RGD.U.T.
10V
+
-
VDD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
0.001
0.01
0.1
1
0.00001 0.0001 0.001 0.01 0.1 1 10
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
25 50 75 100 125 150
0
5
10
15
20
25
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
IRFP22N50A
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Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
25 50 75 100 125 150
0
500
1000
1500
2000
2500
3000
Starting T , Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
9.8A
14A
22A
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
570
580
590
600
610
620
630
640
0 4 8 12162024
A
DSav
av
I , A v al an c h e Cu rre n t
(
A
)
V , Ava la n ch e V o ltag e ( V )
IRFP22N50A
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P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFET ® Power MOSFETs
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
IRFP22N50A
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WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105
IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200
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IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
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IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936
Data and specifications subject to change without notice. 12/99
TO-247AC Part Marking Information
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
LEAD ASSIGNMENTS
NOTES:
- D - 5.30 (.209)
4.70 (.185)
2.50 (.089)
1.50 (.059)
4
3X 0 .80 (.03 1)
0 .40 (.01 6)
2.60 (.102)
2.20 (.087)
3 .40 (.133)
3 .00 (.118)
3X
0.25 (.010) MCA
S
4.30 (.170)
3.70 (.145)
- C -
2X 5.50 (.217)
4.50 (.177)
5 .50 (.217)
0.25 ( .01 0)
1.40 (.056)
1.00 (.039)
3.65 (.143)
3.55 (.140) D
MMB
- A -
15.90 (.626)
15.30 (.602)
- B -
123
20.30 (.800)
19.70 (.775)
14.80 (.583)
14.20 (.559)
2 .40 (.094)
2 .00 (.079)
2X
2X
5.45 (.215)
1 DIMENSIONING & TOLERANCING
PER A NS I Y14.5M, 1982.
2 CONTROL LING DIMENSION : INCH.
3 CONFORMS TO JEDEC OUTLINE
TO-247-AC.
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
INTERNATIONAL
RECT IF IER
L OGO
ASS E MB LY
LOT CO DE
EXAMPLE : THIS IS AN IRFPE30
WITH ASSEMBLY
L OT CODE 3 A1 Q PART NUMBER
DATE CODE
(YYW W )
Y Y = Y E AR
WW WEEK
3A1Q 9302
IRFPE30
A
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
ISD ≤ 22A, di/dt ≤ 190A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
Notes:
Starting TJ = 25°C, L = 4.87mH
RG = 25Ω, IAS = 22A. (See Figure 12a)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS