ANALOG DEVICES BCD Output Synchro-to-Digital Converters SBCD1752/1753/1756/1757 FEATURES BCD {Binary Coded Decima!) Output Representing 0 to 359.9 or 0 to +179.9 -15V Power Supply Requirement Optional High Tracking Rate (75 revs/sec) Internal Microtransformers for 60Hz, 400Hz and 2.6kHz Options Voltage Scaling with External Resistors (Unique Feature) Transformer Isolated Outputs Low Cost MIL Spec/Hi Rel Options Available APPLICATIONS Visual Display of Angular Information Valve Position Indication Antenna Monitoring Industrial Controls GENERAL DESCRIPTION The SBCD1752, SBCD1753, SBCD1756 and the SBCD1757 are modular, continuous tracking Synchro/Resolver-to-Digital converters which employ a type 2 servo loop. They are intended for use in both Industrial and Military applications either for displaying angular data directly, or for inputting BCD information directly into a data processing system. The input signals can be either 3 wire synchro plus reference or 4 wire resolver plus reference, depending on the option. The outputs will be presented in parallel Binary Coded Decimal (BCD). Particular attention has been paid in the design, to achieving the highest tracking rates and accelerations possible, com- patible with the resolution and carrier frequency used, while at the same time obtaining a high overall accuracy. One of the outstanding features of these converters is the use made of precision Scott T and reference microtransformers. This bas made it possible to include the transformers within the module, even for the 60Hz version as well as providing facilities for external voltage scaling. MODELS AVAILABLE The four Synchro-to-Digital converters described in this data sheet, differ primarily in the areas of output format and power supply requirements. Model SBCD1752XYZ is a 13-bit plus sign, BCD output con- verter, giving -180.0 to -0.1 and +0.0 to +179.9 requiring 15V and +5V power supplies, and having an overall accuracy of +0.2 Degrees. a TAL Nh Model SBCD1753 XYZ is a 14-bit, BCD output converter, giving 0 to 359.9, requiring +15V and +5V power supplies, and having an overall accuracy of +0.2 Degrees. Model SBCD1756XYZ is a 13-bit plus sign, BCD output con- verter, giving -180.0 to -0.1 and +0.0 to +179.9 requiring +15V and +5V power supplies, and having an overall accuracy of +0.2 Degrees. Model SBCD1757XYZ is a 14-bit, BCD output converter, giving 0 to 359.9, requiring +15V and +5V power supplies, and having an overall accuracy of +0.2 Degrees. The XYZ code defines the option thus: X signifies the operating temperature range. Y signifies the reference frequency. Z signifies the input voltage and range and whether it will accept Synchro or Resolver information. More information about the option code is given under the heading Ordering Information. DATA TRANSFER (ALL MODELS) The readiness of the converters for data transfer is indicated by the state of the BUSY pin. The voltage appearing on the BUSY pin consists of a train of pulses, at TTL levels, of length according to the option (see Specifications table). The con- verter is busy when the BUSY pin is at TTL High level. The pulses occur for increasing and decreasing counts. The most suitable time for transferring data is 400ns after. the trailing edge of the BUSY pulse, and the times allowable for data transfer are shown in the specification. Even at the maxi- mum speed of the option, these times will be sufficient to transfer data before the next BUSY pulse occurs. SYNCHRO & RESOLVER CONVERTERS VOL. Il, 13-41SPECIFICATIONS (typical at 25C unless otherwise stated) MODELS SBCD1752 SBCD1753 SBCD1756 SBCD1757 ACCURACY! (max Error) All Frequency Options +0.2 Degrees * * * * * . OUTPUT Parallel BCD, 8TTL Loads RESOLUTION 13-Bit + Sign Representing 14 Bit Representing * , -180.0 to -0 1 and 0 to 359.9 +0.0 to +179.9 SIGNAL AND REFERENCE 60Hz, 400Hz and 2,.6kHz . * . FREQUENCY SIGNAL VOLTAGE (Line to Line) Low Level 11.8V ems . . * High Level 90.0V rms . * * SIGNAL IMPEDANCES Low Level 26kQ (Resistive) * . . High Level 200kQ (Resis:ive) . . . REFERENCE VOLTAGE Low Level 26V (11.8V Signal) . * * High Level 115V (90V Signal) * * REFERENCE IMPEDANCE Low Level 56kQ (Resistive) . * . High Level 270kQ (Resistive) , * TRANSFORMER 500V de . * * {SOLATION TRACKING RATE (min) 60Hz 5 Revolutions Per Second * . * 400Hz 36 Revolutions Per Second . * * 2.6kHz 75 Revolutions Per Second * * * Accel.! Constant K, 60Hz 2000/sec? . * * 400Hz 120,000/sec? * * . 2.6kHz 600,000/sec? * . * STEP RESPONSE (179 Step) (For 0.1 Error) 60Hz 15sec * . * 400Hz 125ms * . . 2.6kHz 50ms - * * POWER LINES +15V @ 25mA * +15V @ 80mA **e ~15V @ 25mA * +5V @ 500mMA wee +5V @ 500mA * POWER DISSIPATION 3.25 Watts * 3.7 Watts wee BUSY LOGIC OUTPUT, POSITIVE PULSE (1 TTL Load) 60Hz 3.5 to 4.5us . * * 400Hz 0.5 to 1.25ys * * , 2.6kHz 0.5 to 1.25ps * * . MAX DATA TRANSFER TIME (From 400ns After Trailing Edge of BUSY at max Velocity) 60Hz 40ys * * * 400Hz 5.0us * * . 2.6kHz 1.8yus * * * [INHIBIT INPUT (To Inhibit) Logic 0 1TTL Load * * * TEMPERATURE RANGE Operating Oto +70 C Standard . * * -55C to +105C Extended . . * Storage ~55C to #125C . * . DIMENSIONS 3.125" x 2.625 x 0.8" . : : . (79.4 x 66.7 x 20.4mm) * * " WEIGHT 6.4 ozs. (180 grams) . 6.5 ozs. (185 grams) *** NOTES Specified over the appropriate operating temperature range and for (a) $0% signal and reference amplitude variation (b) 10% signal and reference harmonic distortion (c) 25% power supply variation (d) 10% variation in reference frequency. *Specifications same as SBCD1752 **Specifications same as SBCD1753 ***Specifications same as SBCD1756 Specifications subject to change without notice. VOL. Il, 13-42 SYNCHRO & RESOLVER CONVERTERSApplying the SBCD1752/1753/1756/1757 WIDTH DEPENDS ON . OPTION ISEE SPEC.) ! DISTANCE DEPENDS, 1 ON VELOCITY | RECOMMENDED: ______-__.. DATA TRANSFER | | WIDTH DEPENDS TIME (HIGH STATE) ON OPTION NOT TO SCALE Data Transfer Diagram The function of the INHIBIT pin is to enable the user to inhibit the update of the converters output counter. This is achieved by taking the INHIBIT pin to a TTL Logic zero. If used, the INHIBIT should be applied 400ns after the trailing edge of the BUSY pulse. This will ensure that the data on the output pins is valid. The data should then be transferred and the INHIBIT released before the next BUSY pulse occurs. The worst case times allowable for data transfer in this case are shown in the Specifications under the heading of MAX DATA TRANSFER TIME (from 400ns After Trailing Edge of BUSY at Max Velocity). It should be noted that the applica- tion of the INHIBIT will not prevent the BUSY pulses appear- ing on the BUSY pin, and thus if the INHIBIT is not released by the time that the next BUSY pulse occurs, the BUSY pulse will still appear, alchough the internal converter loop will have been opened. Under this condition, a worst case recovery time, equivalent to that of a step of 179 degrees may be encountered (see Spec.). To avoid this and to ensure valid data transfer, the system shown in the diagram is recommended. SBCD SERIES Busy CONVERTER THEFT TTT 74124 (400ns) TO LATCHES 4 74173 TRISTATE LATCHES ~~ TO COMPUTER INPUT PORT Suggested External Interface Circuitry In cases where the converter is connected to a data bus or used as a peripheral, the method outlined in the above diagram is recommended, The INHIBIT is not necessary in this case, and the external Enable has control of the converter output. The AC1755 mounting card described later in this data sheet contains the external components shown in the diagram. CONNECTING THE CONVERTER The power lines, which should not be reversed, should be con- nected to +15V, -15V and +5V in the case of the SBCD1752 and SBCD1753, and to --15V and +5V in the case of the SBCD1756 and SBCD1757, with the common con- nection to GND in all cases. It is suggested that 0.1uF and 6.8uF capacitors be placed in parallel from +15V to GND, from -15V to GND and from +5V to GND. The digital output connections in the case of the SBCD1753 and SBCD1757 should be taken from the pins marked 0.1 through to 200; these values being represented in degrees. In the case of the SBCD1752 and SBCD1756, the data should be taken from the pins marked 0.1 through to 100, these values also being represented in degrees. In the case of these latter units the SIGN pin will indicate the polarity of the output, Logic 0 representing positive angles and Logic 1 representing negative angles. In the case of a synchro, the signals are connected to $1, S2 and S3 according to the following convention: Synchro connection Ey; ~ 53 = Ernro ru Sin wt Sin 6 Eg3 52 = Erto rut Sin wt Sin (0 + 120) Ego _ 51 = Epto ru Sin wt Sin (6 + 240) For a resolver, the signals are connected to S1, S2, $3 and S4 according to the following convention: Resolver Connection Es1 33 = Exo RHI Sin wt Sin 8 Ego sa = Epnt Rio Sin wt Cos 6 The BUSY and INHIBIT pin (if used), should be connected as described under the heading DATA TRANSFER. The reference connections are made to pins Ry, and Ry g- PIN CONNECTION DIAGRAM Dimensions shown in inches and (mm). 2.625 (66.7) | t 0.8 (20.4) or ~ PINS 0.040 +0.001 110.16 +0.03) DIA BRASS HARD GGLO PLATED 7 0.21 (5.3) 1 3.128 (79.47 (A) NOT PRESENT ON SBCD1756 AND SBCD1757 (8) ON $8601762 AND SBCOI756 MARKED AS SIGN {C|_ PRESENT ON RE- SOLVER TO DIGI. TAL CONVERTER (RBCDI ONLY. LS 0.26 (6.6) - VIEW MATING SOCKET: CAMBION 450-3 388-01-03 RESISTIVE SCALING OF INPUTS A unique feature of the SBCD1752/1753/1756/1757 con- verters is that the inputs can be resistively scaled to accommo- date any value of input signal and reference voltage. GRID 0.1 12.5} In order to calculate the values of the external scaling resistors necessary, add 1.11kQ in series with the input per extra volt in the case of the signal, and 2.2kQ per extra volt in the case of the reference. For example, assume that it is required to use a standard 11.8V line to line signal, 26V reference converter with 60V line to line signal and a 115V reference. The resistors should be ar- ranged as in the diagram. SYNCHRO & RESOLVER CONVERTERS VOL. Il, 13-43Fa sq Ry = Ry = Ry = 535k Ry = 195.8k2 Ry +7.8V SIGNAL oe 26Vnce SBCD SERIES Pro CONVERTER oan 115Vper obo Ry s, ie Saal STANDARD bono Re Ri ok Fail g Note: In the case of R,, Rz, and Rj, the ratio error between the resistances is more critical than the absolute value. In general a 1% ratio error will give rise to an extra inaccuracy of 0.28 Degrees, while a ratio accuracy of 0.1% will give rise to an extra inaccuracy of 0.028 Degrees. The absolute value of Rg is not critical. CARD MOUNTING All the converters can be mounted on an AC1755 mounting card. This card contains the latches and monostable, described under the DATA TRANSFER heading, which are necessary to transfer the data on to a computer bus system, as well as sockets for the converter. The latches heve a tri-state output to facilitate ease of use. The AC1755 also contains facilities for the inclusion of input signal scaling and reference resistors as described under the heading RESISTIVE SCALING OF INPUTS, The card uses a 22/22 0.156 pitch edge connector. The pin-out is shown below. If it is not required to use the external latches, they can be jumpered cn the board. . 08 | ~*~ (20.3) ro (re) BOTTOM 0.36 (9.25) cacrczes Tes ware | o15 811 AC1755 Mounting Card (First Angle Projection). Dimensions Shown in Inches and {mm}. Edge Pin Number Edge-Pin : Function Letter Function 1 R (Lo) A Tri-State Enable +15 Vo +1 5 K - 6 Volts G 1 +5 Vi 15 +5 Volts 16 8 17 10 1 20 19 40 20 80 1 100 22 200 (1) SIGN (2) MISi