NCV887100D1R2G - ON Semiconductor - Datasheet.Technology

January, 2012 − Rev. 2

1Publication Order Number:

NCV8871/D

NCV8871

Automotive Grade

Non-Synchronous Boost

Controller

The NCV8871 is an adjustable output non−synchronous boost

controller which drives an external N−channel MOSFET. The device

uses peak current mode control with internal slope compensation. The

IC incorporates an internal regulator that supplies charge to the gate

driver.

Protection features include internally−set soft−start, undervoltage

lockout, cycle−by−cycle current limiting, hiccup−mode short−circuit

protection and thermal shutdown.

Additional features include low quiescent current sleep mode and

externally−synchronizable switching frequency.

Features

•Peak Current Mode Control with Internal Slope Compensation

•1.2 V ±2% Reference voltage

•Fixed Frequency Operation

•Wide Input Voltage Range of 3.2 V to 40 Vdc, 45 V Load Dump

•Input Undervoltage Lockout (UVLO)

•Internal Soft−Start

•Low Quiescent Current in Sleep Mode

•Cycle−by−Cycle Current Limit Protection

•Hiccup−Mode Overcurrent Protection (OCP)

•Hiccup−Mode Short−Circuit Protection (SCP)

•Thermal Shutdown (TSD)

•This is a Pb−Free Device

MARKING

DIAGRAM

8871xx = Specific Device Code

xx = 00, 01, 02, 03, 04

A = Assembly Location

L = Wafer Lot

Y = Year

W = Work Week

G= Pb−Free Package

http://onsemi.com

SOIC−8

D SUFFIX

CASE 751

PIN CONNECTIONS

1 8

(Top View)

8871xx

ALYW

EN/SYNC

ISNS

GND

GDRV

VFB

VIN

VDRV

Device Package Shipping†

ORDERING INFORMATION

NCV887100D1R2G SOIC−8

(Pb−Free)

2500 / Tape &

Reel

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

NCV887101D1R2G SOIC−8

(Pb−Free)

2500 / Tape &

Reel

NCV887102D1R2G SOIC−8

(Pb−Free)

2500 / Tape &

Reel

NCV887103D1R2G SOIC−8

(Pb−Free)

2500 / Tape &

Reel

NCV887104D1R2G SOIC−8

(Pb−Free)

2500 / Tape &

Reel

NCV8871

http://onsemi.com

Gm 8

GND

ISNS

GDRV

VIN

VFB

5VDRV

CSA

OSC Q

TEMP

VDRV

DRIVE

LOGIC

SCP

FAULT

LOGIC

CLK

EN/SYNC

EN/

SYNC

PWM

RSNS

RF1

Vref

CDRV

RF2

Figure 1. Simplified Block Diagram and Application Schematic

PACKAGE PIN DESCRIPTIONS

Pin No.

Symbol Function

1 EN/SYNC Enable and synchronization input. The falling edge synchronizes the internal oscillator. The part is disabled

into sleep mode when this pin is brought low for longer than the enable time−out period.

2 ISNS Current sense input. Connect this pin to the source of the external N−MOSFET, through a current−sense

resistor to ground to sense the switching current for regulation and current limiting.

3 GND Ground reference.

4 GDRV Gate driver output. Connect to gate of the external N−MOSFET. A series resistance can be added from

GDRV to the gate to tailor EMC performance.

5 VDRV Driving voltage. Internally−regulated supply for driving the external N−MOSFET, sourced from VIN. Bypass

with a 1.0 mF ceramic capacitor to ground.

6 VIN Input voltage. If bootstrapping operation is desired, connect a diode from the input supply to VIN, in addi-

tion to a diode from the output voltage to VDRV and/or VIN.

7 VC Output of the voltage error amplifier. An external compensator network from VC to GND is used to stabilize

the converter.

8 VFB Output voltage feedback. A resistor from the output voltage to VFB with another resistor from VFB to GND

creates a voltage divider for regulation and programming of the output voltage.

NCV8871

http://onsemi.com

ABSOLUTE MAXIMUM RATINGS (Voltages are with respect to GND, unless otherwise indicated)

Rating Value Unit

Dc Supply Voltage (VIN) −0.3 to 40 V

Peak Transient Voltage (Load Dump on VIN) 45 V

Dc Supply Voltage (VDRV, GDRV) 12 V

Peak Transient Voltage (VFB) −0.3 to 6 V

Dc Voltage (VC, VFB, ISNS) −0.3 to 3.6 V

Dc Voltage (EN/SYNC) −0.3 to 6 V

Dc Voltage Stress (VIN − VDRV)* −0.7 to 45 V

Operating Junction Temperature −40 to 150 °C

Storage Temperature Range −65 to 150 °C

Peak Reflow Soldering Temperature: Pb−Free, 60 to 150 seconds at 217°C265 peak °C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

*An external diode from the input to the VIN pin is required if bootstrapping VDRV and VIN off of the output voltage.

PACKAGE CAPABILITIES

Characteristic Value Unit

ESD Capability (All Pins) Human Body Model

Machine Model

w2.0

w200

Moisture Sensitivity Level 1−

Package Thermal Resistance Junction−to−Ambient, RqJA (Note 1) 100 °C/W

1. 1 in2, 1 oz copper area used for heatsinking.

Device Variations

The NCV8871 features several variants to better fit a

multitude of applications. The table below shows the typical

values of parameters for the parts that are currently

available.

TYPICAL VALUES

Part No. Dmax fstss SaVcl Isrc Isink VDRV SCE

NCV887100 88% 170 kHz 7.4 ms 53 mV/ms400 mV 800 mA 600 mA 10.5 V Y

NCV887101 86% 1000 kHz 1.25 ms 16 mV/ms400 mV 575 mA 350 mA 6.3 V Y

NCV887102 91% 1000 kHz 1.25 ms 53 mV/ms400 mV 800 mA 600 mA 6.3 V N

NCV887103 93% 340 kHz 3.7 ms 53 mV/ms200 mV 575 mA 350 mA 8.4 V Y

NCV887104 93% 340 kHz 3.7 ms 53 mV/ms200 mV 800 mA 600 mA 8.4 V N

DEFINITIONS

Symbol Characteristic Symbol Characteristic Symbol Characteristic

Dmax Maximum Duty Cycle fsSwitching Frequency tss Soft−Start Time

SaSlope Compensating Ramp Vcl Current Limit Trip Voltage Isrc Gate Drive Sourcing Current

Isink Gate Drive Sinking Current VDRV Drive Voltage SCE Short Circuit Enable

NCV8871

http://onsemi.com

ELECTRICAL CHARACTERISTICS (−40°C < TJ < 150°C, 3.2 V < VIN < 40 V, unless otherwise specified) Min/Max values are

guaranteed by test, design or statistical correlation.

Characteristic Symbol Conditions Min Typ Max Unit

GENERAL

Quiescent Current, Sleep Mode Iq,sleep VIN = 13.2 V, EN = 0, TJ = 25°C−2.0 −mA

Quiescent Current, Sleep Mode Iq,sleep VIN = 13.2 V, EN = 0, −40°C < TJ < 125°C−2.0 6.0 mA

Quiescent Current, No switching Iq,off Into VIN pin, EN = 1, No switching −1.5 2.5 mA

Quiescent Current, Switching,

normal operation

Iq,on Into VIN pin, EN = 1, Switching −3.0 6.0 mA

OSCILLATOR

Minimum pulse width ton,min 90 115 140 ns

Maximum duty cycle Dmax NCV887100

NCV887101

NCV887102

NCV887103

NCV887104

Switching frequency fsNCV887100

NCV887101

NCV887102

NCV887103

NCV887104

153

900

306

170

1000

340

187

1100

374

kHz

Soft−start time tss From start of switching with VFB = 0 until

reference voltage = VREF

NCV887100

NCV887101

NCV887102

NCV887103

NCV887104

6.0

1.0

3.0

7.4

1.25

3.7

8.8

1.5

4.4

Soft−start delay tss,dly From EN → 1 until start of switching with

VFB = 0 −240 280

Slope compensating ramp SaNCV887100

NCV887101

NCV887102

NCV887103

NCV887104

mV/ms

ENABLE/SYNCHRONIZATION

EN/SYNC pull−down current IEN/SYNC VEN/SYNC = 5 V −5.0 10 mA

EN/SYNC input high voltage Vs,ih 2.0 −5.0 V

EN/SYNC input low voltage Vs,il 0−800 mV

EN/SYNC time−out ratio %ten From SYNC falling edge, to oscillator con-

trol (EN high) or shutdown (EN low), Per-

cent of typical switching period

− − 350 %

SYNC minimum frequency ratio %fsync,min Percent of fs− − 80 %

SYNC maximum frequency fsync,max 1.1 − − MHz

Synchronization delay ts,dly From SYNC falling edge to GDRV falling

edge

−50 100 ns

Synchronization duty cycle Dsync 25 −75 %

CURRENT SENSE AMPLIFIER

Low−frequency gain Acsa Input−to−output gain at dc, ISNS v 1 V 0.9 1.0 1.1 V/V

Bandwidth BWcsa Gain of Acsa − 3 dB 2.5 − − MHz

ISNS input bias current Isns,bias Out of ISNS pin −30 50 mA

NCV8871

http://onsemi.com

ELECTRICAL CHARACTERISTICS (−40°C < TJ < 150°C, 3.2 V < VIN < 40 V, unless otherwise specified) Min/Max values are

guaranteed by test, design or statistical correlation.

Characteristic UnitMaxTypMinConditionsSymbol

CURRENT SENSE AMPLIFIER

Current limit threshold voltage Vcl Voltage on ISNS pin

NCV887100

NCV887101

NCV887102

NCV887103

NCV887104

360

180

400

200

440

220

Current limit,

Response time

tcl CL tripped until GDRV falling edge,

VISNS = Vcl + 40 mV

−80 125 ns

Overcurrent protection,

Threshold voltage

%Vocp Percent of Vcl 125 150 175 %

Overcurrent protection,

Response Time

tocp From overcurrent event, Until switching

stops, VISNS = VOCP + 40 mV

− − 125 ns

VOLTAGE ERROR OPERATIONAL TRANSCONDUCTANCE AMPLIFIER

Transconductance gm,vea VFB – Vref = ± 20 mV 0.8 1.2 1.5 mS

VEA output resistance Ro,vea 2.0 − − MW

VFB input bias current Ivfb,bias Current out of VFB pin −0.5 2.0 mA

Reference voltage Vref 1.176 1.200 1.224 V

VEA maximum output voltage Vc,max 2.5 − − V

VEA minimum output voltage Vc,min − − 0.3 V

VEA sourcing current Isrc,vea VEA output current, Vc = 2.0 V 80 100 −mA

VEA sinking current Isnk,vea VEA output current, Vc = 0.7 V 80 100 −mA

GATE DRIVER

Sourcing current Isrc VDRV ≥ 6 V, VDRV − VGDRV = 2 V

NCV887100

NCV887101

NCV887102

NCV887103

NCV887104

600

400

600

400

600

800

575

800

575

800

−

Sinking current Isink VGDRV ≥ 2 V

NCV887100

NCV887101

NCV887102

NCV887103

NCV887104

500

250

500

250

500

600

350

600

350

600

−

Driving voltage dropout Vdrv,do VIN − VDRV, IvDRV = 25 mA −0.3 0.6 V

Driving voltage source current Idrv VIN − VDRV = 1 V 35 45 −mA

Backdrive diode voltage drop Vd,bd VDRV − VIN, Id,bd = 5 mA − − 0.7 V

Driving voltage VDRV IVDRV = 0.1 − 25 mA

NCV887100

NCV887101

NCV887102

NCV887103

NCV887104

6.0

8.0

10.5

6.3

8.4

6.6

8.8

UVLO

Undervoltage lock−out,

Threshold voltage

Vuvlo VIN falling 3.0 3.1 3.2 V

Undervoltage lock−out,

Hysteresis

Vuvlo,hys VIN rising 50 125 200 mV

NCV8871

http://onsemi.com

ELECTRICAL CHARACTERISTICS (−40°C < TJ < 150°C, 3.2 V < VIN < 40 V, unless otherwise specified) Min/Max values are

guaranteed by test, design or statistical correlation.

Characteristic UnitMaxTypMinConditionsSymbol

SHORT CIRCUIT PROTECTION

Startup blanking period %tscp,dly From start of soft−start, Percent of tss 100 120 150 %

Hiccup−mode period %thcp,dly From shutdown to start of soft−start,

Percent of tss

70 85 100 %

Short circuit threshold voltage %Vscp VFB as percent of Vref 60 67 75 %

Short circuit delay tscp From VFB < Vscp to stop switching −35 100 ns

THERMAL SHUTDOWN

Thermal shutdown threshold Tsd TJ rising 160 170 180 °C

Thermal shutdown hysteresis Tsd,hys TJ falling 10 15 20 °C

Thermal shutdown delay tsd,dly From TJ > Tsd to stop switching − − 100 ns

NCV8871

http://onsemi.com

TYPICAL PERFORMANCE CHARACTERISTICS

010203040

VIN, INPUT VOLTAGE (V)

Figure 2. Sleep Current vs. Input Voltage

Iq,sleep, SLEEP CURRENT (mA)

TJ = 25°C

3.5

4.0

4.5

5.0

5.5

0 200 400 600 800 1000

TJ = 25°C,

VIN = 13.2 V

Iq,on, QUIESCENTCURRENT (mA)

fs, SWITCHING FREQUENCY (kHz)

Figure 3. Quiescent Current vs. Switching

Frequency

Figure 4. Sleep Current vs. Temperature

3.00

3.05

3.10

3.15

3.20

3.25

3.30

−40 10 60 110 160

TJ, JUNCTION TEMPERATURE (°C)

Figure 5. Quiescent Current vs. Temperature

115

117

119

121

123

125

ton,min MINIMUM ON TIME (ns)

TJ, JUNCTION TEMPERATURE (°C)

Figure 6. Minimum On Time vs. Temperature

−40 10 60 110 160

0.990

0.995

1.000

1.005

1.010

TJ, JUNCTION TEMPERATURE (°C)

Figure 7. Normalized Current Limit vs.

Temperature

−40 10 60 110 160

NORMALIZED CURRENT LIMIT (25°C) Iq,on, QUIESCENTCURRENT (mA)

VIN = 13.2 V

fs = 170 kHz

TJ, JUNCTION TEMPERATURE (°C)

−50 0 50 100 200

Iq,sleep, SLEEP CURRENT (mA)

VIN = 13.2 V

150

NCV8871

http://onsemi.com

TYPICAL PERFORMANCE CHARACTERISTICS

1.195

1.197

1.199

1.201

1.203

1.205

TJ, JUNCTION TEMPERATURE (°C)

Figure 8. Reference Voltage vs. Temperature

Vref, REFERENCE VOLTAGE (V)

−40 10 60 110 160

Figure 9. Enable Pulldown Current vs. Voltage

TJ, JUNCTION TEMPERATURE (°C)

Figure 10. Enable Pulldown Current vs.

Temperature

Ienable, PULLDOWN CURRENT (mA)

01234

Venable, VOLTAGE (V)

Ienable, PULLDOWN CURRENT (mA)

TJ = 25°C

5.0

5.5

6.0

6.5

7.0

7.5

−40 10 60 110 160

8.0

NCV8871

http://onsemi.com

THEORY OF OPERATION

Figure 11. Current Mode Control Schematic

Oscillator

Slope

Compensation

NCV8871

Voltage Error

VEA

CSA

PWM Comparator Gate

Drive

Compensation

VIN

ISNS

GDRV

CORL

VFB

VOUT

−

+−

−

Current Mode Control

The NCV8871 incorporates a current mode control

scheme, in which the PWM ramp signal is derived from the

power switch current. This ramp signal is compared to the

output of the error amplifier to control the on−time of the

power switch. The oscillator is used as a fixed−frequency

clock to ensure a constant operational frequency. The

resulting control scheme features several advantages over

conventional voltage mode control. First, derived directly

from the inductor, the ramp signal responds immediately to

line voltage changes. This eliminates the delay caused by the

output filter and the error amplifier, which is commonly

found in voltage mode controllers. The second benefit

comes from inherent pulse−by−pulse current limiting by

merely clamping the peak switching current. Finally, since

current mode commands an output current rather than

voltage, the filter offers only a single pole to the feedback

loop. This allows for a simpler compensation.

The NCV8871 also includes a slope compensation

scheme in which a fixed ramp generated by the oscillator is

added to the current ramp. A proper slope rate is provided to

improve circuit stability without sacrificing the advantages

of current mode control.

Current Limit

The NCV8871 features two current limit protections,

peak current mode and over current latch off. When the

current sense amplifier detects a voltage above the peak

current limit between ISNS and GND after the current limit

leading edge blanking time, the peak current limit causes the

power switch to turn off for the remainder of the cycle. Set

the current limit with a resistor from ISNS to GND, with R

= VCL / Ilimit.

If the voltage across the current sense resistor exceeds the

over current threshold voltage the device enters over current

hiccup mode. The device will remain off for the hiccup time

and then go through the soft−start procedure.

Short Circuit Protection

If the short circuit enable bit is set (SCE = Y) the device

will attempt to protect the power MOSFET from damage.

When the output voltage falls below the short circuit trip

voltage, after the initial short circuit blanking time, the

device enters short circuit latch off. The device will remain

off for the hiccup time and then go through the soft−start.

EN/SYNC

The Enable/Synchronization pin has three modes. When

a dc logic high (CMOS/TTL compatible) voltage is applied

to this pin the NCV8871 operates at the programmed

frequency. When a dc logic low voltage is applied to this pin

the NCV8871 enters a low quiescent current sleep mode.

When a square wave of at least %fsync,min of the free running

switching frequency is applied to this pin, the switcher

operates at the same frequency as the square wave. If the

signal is slower than this, it will be interpreted as enabling

and disabling the part. The falling edge of the square wave

corresponds to the start of the switching cycle.

UVLO

Input Undervoltage Lockout (UVLO) is provided to

ensure that unexpected behavior does not occur when VIN

is too low to support the internal rails and power the

controller. The IC will start up when enabled and VIN

surpasses the UVLO threshold plus the UVLO hysteresis

and will shut down when VIN drops below the UVLO

threshold or the part is disabled.

NCV8871

http://onsemi.com

Internal Soft−Start

To insure moderate inrush current and reduce output

overshoot, the NCV8871 features a soft start which charges a

capacitor with a fixed current to ramp up the reference voltage.

This fixed current is based on the switching frequency, so

that if the NCV8871 is synchronized to twice the default

switching frequency the soft start will last half as long.

VDRV

An internal regulator provides the drive voltage for the

gate driver. Bypass with a ceramic capacitor to ground to

ensure fast turn on times. The capacitor should be between

0.1 mF and 1 mF, depending on switching speed and charge

requirements of the external MOSFET.

APPLICATION INFORMATION

Design Methodology

This section details an overview of the component selection

process for the NCV8871 in continuous conduction mode

boost. It is intended to assist with the design process but does

not remove all engineering design work. Many of the

equations make heavy use of the small ripple approximation.

This process entails the following steps:

1. Define Operational Parameters

2. Select Current Sense Resistor

3. Select Output Inductor

4. Select Output Capacitors

5. Select Input Capacitors

6. Select Feedback Resistors

7. Select Compensator Components

8. Select MOSFET(s)

9. Select Diode

1. Define Operational Parameters

Before beginning the design, define the operating

parameters of the application. These include:

VIN(min): minimum input voltage [V]

VIN(max): maximum input voltage [V]

VOUT: output voltage [V]

IOUT(max): maximum output current [A]

ICL: desired typical cycle-by-cycle current limit [A]

From this the ideal minimum and maximum duty cycles

can be calculated as follows:

Dmin +1*

VIN(max)

VOUT

Dmax +1*

VIN(min)

VOUT

Both duty cycles will actually be higher due to power loss

in the conversion. The exact duty cycles will depend on

conduction and switching losses. If the maximum input

voltage is higher than the output voltage, the minimum duty

cycle will be negative. This is because a boost converter

cannot have an output lower than the input. In situations

where the input is higher than the output, the output will

follow the input, minus the diode drop of the output diode

and the converter will not attempt to switch.

If the calculated Dmax is higher the Dmax of the NCV8871,

the conversion will not be possible. It is important for a boost

converter to have a restricted Dmax, because while the ideal

conversion ration of a boost converter goes up to infinity as

D approaches 1, a real converter’s conversion ratio starts to

decrease as losses overtake the increased power transfer. If

the converter is in this range it will not be able to regulate

properly.

If the following equation is not satisfied, the device will

skip pulses at high VIN:

Dmin

fswton(min)

Where: fs: switching frequency [Hz]

ton(min): minimum on time [s]

2. Select Current Sense Resistor

Current sensing for peak current mode control and current

limit relies on the MOSFET current signal, which is

measured with a ground referenced amplifier. The easiest

method of generating this signal is to use a current sense

resistor from the source of the MOSFET to device ground.

The sense resistor should be selected as follows:

RS+VCL

ICL

Where: RS: sense resistor [W]

VCL: current limit threshold voltage [V]

ICL: desire current limit [A]

3. Select Output Inductor

The output inductor controls the current ripple that occurs

over a switching period. A high current ripple will result in

excessive power loss and ripple current requirements. A low

current ripple will result in a poor control signal and a slow

current slew rate in case of load steps. A good starting point

for peak to peak ripple is around 10% of the inductor current

at the maximum load at the worst case VIN, but operation

should be verified empirically. The worst case VIN is half of

VOUT, or whatever VIN is closest to half of VIN. After

choosing a peak current ripple value, calculate the inductor

value as follows:

L+

VIN(WC) 2DWC

DIL,max fsVOUT

Where: VIN(WC): VIN value as close as possible to

half of VOUT [V]

DWC: duty cycle at VIN(WC)

DIL,max: maximum peak to peak ripple [A]

NCV8871

http://onsemi.com

The maximum average inductor current can be calculated

as follows:

IL,avg +

VOUTIOUT(max)

VIN(min)

The Peak Inductor current can be calculated as follows:

IL,peak +IL,avg )

VIN(min) 2Dmax

LfsVOUT

Where: IL,peak: Peak inductor current value [A]

4. Select Output Capacitors

The output capacitors smooth the output voltage and

reduce the overshoot and undershoot associated with line

transients. The steady state output ripple associated with the

output capacitors can be calculated as follows:

IOUT(max)ǒVOUT *VIN(min)Ǔ

ǒCOUTfǓ2)

IOUT(max)VOUTRESR

VIN(min)

VOUT(ripple) +

The capacitors need to survive an RMS ripple current as

follows:

ICout(RMS) +IOUT

VOUT *VIN(min)

VIN(min)

The use of parallel ceramic bypass capacitors is strongly

encouraged to help with the transient response.

5. Select Input Capacitors

The input capacitor reduces voltage ripple on the input to

the module associated with the ac component of the input

current.

ICin(RMS) +

VIN(WC) 2DWC

LfsVOUT23

6. Select Feedback Resistors

The feedback resistors form a resistor divider from the

output of the converter to ground, with a tap to the feedback

pin. During regulation, the divided voltage will equal Vref.

The lower feedback resistor can be chosen, and the upper

feedback resistor value is calculated as follows:

Rupper +Rlower

ǒVout *VrefǓ

Vref

The total feedback resistance (Rupper + Rlower) should be in

the range of 1 kW – 100 kW.

7. Select Compensator Components

Current Mode control method employed by the NCV8871

allows the use of a simple, Type II compensation to optimize

the dynamic response according to system requirements.

8. Select MOSFET(s)

In order to ensure the gate drive voltage does not drop out

the MOSFET(s) chosen must not violate the following

inequality:

Qg(total) vIdrv

Where: Qg(total): Total Gate Charge of MOSFET(s) [C]

Idrv: Drive voltage current [A]

fs: Switching Frequency [Hz]

The maximum RMS Current can be calculated as follows:

ID(max) +Iout

DȀ

The maximum voltage across the MOSFET will be the

maximum output voltage, which is the higher of the

maximum input voltage and the regulated output voltaged:

VQ(max) +VOUT(max)

9. Select Diode

The output diode rectifies the output current. The average

current through diode will be equal to the output current:

ID(avg) +IOUT(max)

Additionally, the diode must block voltage equal to the

higher of the output voltage and the maximum input voltage:

VD(max) +VOUT(max)

The maximum power dissipation in the diode can be

calculated as follows:

PD+Vf(max) IOUT(max)

Where: Pd: Power dissipation in the diode [W]

Vf(max): Maximum forward voltage of the diode [V]

Low Voltage Operation

If the input voltage drops below the UVLO or MOSFET

threshold voltage, another voltage may be used to power the

device. Simply connect the voltage you would like to boost

to the inductor and connect the stable voltage to the VIN pin

of the device. In boost configuration, the output of the

converter can be used to power the device. In some cases it

may be desirable to connect 2 sources to VIN pin, which can

be accomplished simply by connecting each of the sources

through a diode to the VIN pin.

NCV8871

http://onsemi.com

PACKAGE DIMENSIONS

SOIC−8 NB

CASE 751−07

ISSUE AK

SEATING

PLANE

X 45 _

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE

MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.127 (0.005) TOTAL

IN EXCESS OF THE D DIMENSION AT

MAXIMUM MATERIAL CONDITION.

6. 751−01 THRU 751−06 ARE OBSOLETE. NEW

STANDARD IS 751−07.

0.10 (0.004)

DIM

MIN MAX MIN MAX

INCHES

4.80 5.00 0.189 0.197

MILLIMETERS

B3.80 4.00 0.150 0.157

C1.35 1.75 0.053 0.069

D0.33 0.51 0.013 0.020

G1.27 BSC 0.050 BSC

H0.10 0.25 0.004 0.010

J0.19 0.25 0.007 0.010

K0.40 1.27 0.016 0.050

M0 8 0 8

N0.25 0.50 0.010 0.020

S5.80 6.20 0.228 0.244

−X−

−Y−

0.25 (0.010)

−Z−

0.25 (0.010) ZSXS

____

1.52

0.060

7.0

0.275

0.6

0.024

1.270

0.050

4.0

0.155

ǒmm

inchesǓ

SCALE 6:1

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,

and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death

associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal

Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

NCV8871/D

PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5817−1050

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada

Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

ON Semiconductor Website: www.onsemi.com

Order Literature: http://www.onsemi.com/orderlit

For additional information, please contact your local

Sales Representative