The MK3771-17 is a low cost, low jitter, high
performance VCXO and clock synthesizer
designed for set-top boxes and HDTV receivers.
The on-chip Voltage Controlled Crystal Oscillator
accepts a 0 to 3.3 V input voltage to cause the
output clocks to vary by ±100 ppm. Using ICS’s
patented VCXO and analog Phase-Locked Loop
(PLL) techniques, the device uses an inexpensive
13.5 MHz crystal input to produce multiple
output clocks including selectable BCLK, a
selectable audio clock, two communications
clocks, a 13.5 MHz clock, and three 27 MHz
clocks. All clocks are frequency locked to the
27.00 MHz output (and to each other) with zero
ppm error, so any output can be used as the
VCXO output.
MK3771-17
VCXO and HDTV Set-Top Clock Source
MDS3771-17A 1Revision 12289 Printed 1/10/0
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
PRELIMINARY INFORMATION
Description Features
• Packaged in 28 pin SSOP (QSOP)
• HDTV frequencies of 74.25 and 74.175824 MHz
• On-chip patented VCXO with pull range
of 200ppm (minimum)
• VCXO tuning voltage of 0 to 3.3 V
• Supports Ethernet with 20 and 25 MHz clocks
• Modem clocks of 11.0592 and 24.576 MHz option
• Audio clocks support 32 kHz, 44.1 kHz, 48 kHz
and 96 kHz sampling rates
• Zero ppm synthesis error in all clocks (all exactly
track 27MHz VCXO)
• Uses an inexpensive 13.5 MHz crystal
• Full CMOS output swings with 12 mA output
drive capability at TTL levels
• Advanced, low power, sub-micron CMOS process
• 3.3 V ±5% operating supply
108 MHz
or 27 MHz
Block Diagram
Voltage
Controlled
Crystal
Oscillator
PLL
Clock
Synthesis
Circuitry
Output
Buffers
CCLK1
13.5 MHz
pullable
crystal
X1
X2
VIN
54 MHz
or 27 MHz
CCLK2
x8
PLL
Audio Clock
BCLK
BS1, BS0
CS
AS2:0 3
2
Output
Buffer
Output
Buffer
Output
Buffer 13.5 MHz
or 27 MHz
27 MHz
Output
Buffer
Output
Buffer
Output
Buffer
Output
Buffer
VS
Divide
Logic
MK3771-17
VCXO and HDTV Set-Top Clock Source
MDS3771-17A 2Revision 12289 Printed 1/10/0
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
PRELIMINARY INFORMATION
BS0
X2
X1
VDD
VDD
VIN
VDD
VDD
CS
GND
GND
BCLK
VS
ACLK
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Pin Assignment
AS1
AS0
VCLK2
VCLK1
GND
VCLK4
VDD
AS2
GND
GND
VCLK3
CCLK1
BS1
CCLK2
Key: I = Input; TI = Tri-level input; O = output; P = power supply connection; XI, XO = crystal connections
Number Name Type Description
1BS0 I B Clock Select 0. Selects BCLK frequency. See table above. Internal pull-up.
2X2 XO Crystal connection. Connect to a pullable 13.5 MHz crystal.
3X1 XI Crystal connection. Connect to a pullable 13.5 MHz crystal.
4, 5, 7, 8, 22 VDD P Connect to +3.3V.
6VIN VI Analog control voltage for VCXO. Pulls outputs ±100 ppm by varying from 0 to 3.3V.
9CS TI Communications Clock Select. Selects CCLK 1 and 2 per table above. Internal pull-up.
10, 11,19,20,24
GND P Connect to ground.
12 BCLK O B Clock output. Determined by status of BS1, BS0.
13 VS TI VCXO Clock Select. Selects frequencies on VCLK1-VCLK4 per table above.
14 ACLK O Audio Clock output. Determined by status of AS2:0 per table above.
15 CCLK2 O Communications Clock Output 2. Determined by status of CS per table above.
16 BS1 TI B Clock Select 1. Selects BCLK frequency. See table above.
17 CCLK1 O Communications Clock output 1. Determined by status of CS per table above.
18 VCLK3 O VCXO Clock output 3. Can be either 27 or 13.5 MHz per table above.
21 AS2 I Audio Clock Select pin 2. Selects Audio clock on pin 14 per table above. Internal pull-up.
23 VCLK4 O VCXO Clock output 4. Can be either 27 or 108 MHz per table above.
25 VCLK1 O VCXO Clock output pin 1. Always 27 MHz.
26 VCLK2 O VCXO Clock output pin 2. Can be either 27 or 54 MHz per table above.
27 AS0 I Audio Clock Select pin 0. Selects Audio clock on pin 14. See table above. Internal pull-up.
28 AS1 I Audio Clock Select pin 1. Selects Audio clock on pin 14. See table above. Internal pull-up.
0 = connect directly to GND
M = leave unconnected (floating)
1 = connect directly to VDDIO
X = don’t care
AS2 AS1 AS0 ACLK
0 0 0 8.192
0 0 1 11.2896
0 1 0 12.288
0 1 1 16.9344
1 0 0 16.384
1 0 1 22.5792
1 1 0 18.432
1 1 1 24.576
Audio Clock (MHz)
VS VCLK1 VCLK2 VCLK3 VCLK4
027 27 27 108
M 27 54 13.5 108
1 27 27 27 27
VCXO Clocks (MHz)
BS1 BS0 CS BCLK CCLK1 CCLK2
0 0 0 74.175 20 25
0 0 1 74.175 11.0592 24.576
0 1 0 74.25 20 25
0 1 1 74.25 11.0592 24.576
M 0 0 5.06 20 25
M 0 1 5.06 11.0592 24.576
M 1 0 10.12 20 25
M 1 1 10.12 11.0592 24.576
1 0 0 48 20 25
1 0 M 48 7.3728 24
1 0 1 48 11.0592 24.576
1 1 0 14.318 20 25
1 1 M 14.318 7.3728 28.636
1 1 1 14.318 11.0592 24.576
B and C Clocks (MHz)
Pin Descriptions
MK3771-17
VCXO and HDTV Set-Top Clock Source
MDS3771-17A 3Revision 12289 Printed 1/10/0
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
PRELIMINARY INFORMATION
Parameter Conditions Minimum Typical Maximum Units
ABSOLUTE MAXIMUM RATINGS (note 1)
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD Referenced to GND 7 V
Inputs and Clock Outputs Referenced to GND -0.5 VDD+0.5 V
Ambient Operating Temperature 0 70 °C
Soldering Temperature Max of 10 seconds 260 °C
Storage temperature -65 150 °C
DC CHARACTERISTICS (VDD = 3.3V unless noted)
DC CHARACTERISTICS (VDD = 3.3V unless noted)
Operating Voltage, VDD 3.15 3.30 3.45 V
Input High Voltage, VIH, except TI pins 2 V
Input Low Voltage, VIL, except TI pins 0.8 V
Input High Voltage, VIH, all TI pins VDD-0.5 V
Input Low Voltage, VIL, all TI pins 0.5 V
Output High Voltage, VOH IOH=-12mA 2.4 V
Output Low Voltage, VOL IOL=12mA 0.4 V
Output High Voltage, VOH, CMOS level IOH=-8mA VDD-0.4 V
Operating Supply Current, IDD No Load, note 2 28 mA
Short Circuit Current Each output ±50 mA
Input Capacitance 7 pF
Frequency synthesis error All clocks 0 ppm
VIN, VCXO control voltage 0 3.3 V
AC CHARACTERISTICS (VDD = 3.3V unless noted)
AC CHARACTERISTICS (VDD = 3.3V unless noted)
Input Frequency 13.500000 MHz
Output Clock Rise Time 0.8 to 2.0V 1.5 ns
Output Clock Fall Time 2.0 to 0.8V 1.5 ns
Output Clock Duty Cycle At VDD/2 40 60 %
Maximum Absolute Jitter, short term 300 ps
27 MHz output pullability, note 3 0V ≤ VIN ≤ 3.3 V ±100 ±140 ppm
Electrical Specifications
Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. With all clocks at highest MHz.
3. With a pullable crystal that conforms to ICS’ specifications
The MK3771-17 requires a minimum number of external components for proper operation. Use a low
inductance ground plane, connect all GNDs to this. Connect 0.01µF decoupling caps on pins 4, 5, 7, 8 and
22 directly to the ground plane, as close to the MK3771-17 as possible. A series termination resistor of 33 Ω
may be used for each clock output. The 13.500 MHz crystal must be connected as close to the chip as
possible. The crystal should be a parallel mode, pullable, with load capacitance of 14 pF. See page 4 for crystal
specifications. Please follow Application Note MAN05 for pullable crystal layout.
External Components
MK3771-17
VCXO and HDTV Set-Top Clock Source
MDS3771-17A 4Revision 12289 Printed 1/10/0
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
PRELIMINARY INFORMATION
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the
infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in
normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements
are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any
ICS product for use in life support devices or critical medical instruments.
Ordering Information
Part/Order Number Marking Shipping packaging Package Temperature
MK3771-17R MK3771-17R tubes 28 pin SSOP (QSOP) 0-70 °C
MK3771-17RTR MK3771-17R tape and reel 28 pin SSOP (QSOP) 0-70 °C
Pullable Crystal Specifications:
Frequency 13.500000 MHz
Correlation (load) Capacitance 14 pF
C0/C1 240 max
ESR 35 Ω max
Operating Temperature 0 to 70 °C
Initial Accuracy ±20 ppm
Temperature plus Aging Stability ±50 ppm
28 pin SSOP
Inches
Inches
Millimeters
Millimeters
Symbol Min Max Min Max
A0.053 0.069 1.35 1.75
A1 0.004 0.010 0.102 0.254
b 0.008 0.012 0.203 0.305
c 0.007 0.010 0.190 0.254
D 0.386 0.394 9.804 10.008
e
.025 BSC
.025 BSC
0.635 BSC
0.635 BSC
E 0.228 0.244 5.791 6.198
E1 0.150 0.157 3.810 3.988
L 0.016 0.050 0.406 1.270
b
D
E1 E
e
A1 c A
L
Package Outline and Package Dimensions
(For current dimensional specifications, see JEDEC Publication No. 95.)
