©2000 Fairchild Semiconductor International
August 2000
Rev. A, August 2000
FQS4900
QFET
QFETQFET
QFETTM
FQS4900
Dual N & P-Channel, Logic Level MOSFET
General Description
These dual N and P-channel enhancement mode power
field effect transistors are produced using Fairchild’s
proprietary, planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. This device is well
suited for high interface in telephone sets.
Features
N-Channel 1.3A, 60V, RDS(on) = 0.55 @ VGS = 10 V
RDS(on) = 0.65 @ VGS = 5 V
P-Channel -0.3A, -300V, RDS(on) = 15.5 @ VGS = -10 V
RDS(on) = 16 @ VGS =- 5 V
Low gate charge ( typical N-Channel 1.6 nC)
( typical P-Channel 3.6 nC)
Fast switching
Improved dv/dt capability
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Thermal Characteristi cs
Symbol Parameter N-Channel P-Channel Units
VDSS Drain-Source Voltage 60 -300 V
IDDrain Current - Continuous (TA = 25°C) 1.3 -0.3 A
- Continuous (TA = 70°C) 0.82 -0.19 A
IDM Drain Curent - Pulsed (Note 1) 5.2 -1.2 A
VGSS Gate-Source Voltage ± 20 V
dv/dt Peak Diode Recovery dv/dt (Note 2) 7.0 4.5 V/ns
PDPower Dissipation (TA = 25°C) 2.0 W
(T A = 70°C) 1.3 W
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
Symbol Parameter Typ Max Units
RθJA Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W
!
"
!
!
!
!
#
$
!
!
!
!
!
"
!
!
!
!
#
$
!
!
!
!
4
3
2
1
5
6
7
8
S1G1
S2
G2
D1D1D2
D2
©2000 Fairchild Semiconductor International
FQS4900
Rev. A, August 2000
Electrical Characteristics TA = 25°C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
3. Pulse Test : Pulse width 300µs, Duty cycle 2%
4. Essentially independent of operating temperature
Symbol Parameter Test Conditions Type Min Typ Max Units
Off Characteristics
BVDSS Drain-S ource Breakdown Voltage
VGS = 0 V, ID = 250 µAN-Ch 60 -- -- V
VGS = 0 V, ID = -250 µAP-Ch -300 -- -- V
IDSS Zero Gate Voltage Drain Current VDS = 60 V, VGS = 0 V N-Ch -- -- 1 µA
VDS = 48 V, TC = 55°C -- -- 10 µA
VDS = -300 V, VGS = 0 V P-Ch -- -- -1 µA
VDS = -240 V, TC = 55°C -- -- -10 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V All -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V All -- -- -100 nA
On Characteri st ics
VGS(th) Gate Threshold Volt age VDS = 4V, ID = 20 mA N-Ch 1.0 -- 1.95 V
VDS = 4V, ID = -20 mA P-Ch -1.0 -- -1.95 V
RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 0.65 A N-Ch -- 0.39 0.55
VGS = 5 V, ID = 0.65 A -- 0.46 0.65
VGS = -10 V, ID = -0.15 A P-CH -- 11.2 15.5
VGS = -5 V, ID = -0.15 A -- 11.4 16
gFS Forward Transconductance VDS = 10 V, ID = 0.65 A N-CH -- 1.7 -- S
VDS = -10 V, ID = -0.15 A P-CH -- 0.6 -- S
Switching Characteristics
td(on) Turn-On Delay Time N-Channel
VDD = 30 V, ID = 1.3 A,
RG = 25
P-Channel
VDD = -150 V, ID = -0.3 A,
RG = 25
N-Ch -- 5.7 21 ns
P-Ch -- 10 30 ns
trTurn-On Rise Time N-Ch -- 21 50 ns
P-Ch -- 25 60 ns
td(off) Turn-Off De l a y Time N-Ch -- 11 32 ns
P-Ch -- 35 80 ns
tfTurn -Off Fall Time N-Ch -- 17 45 ns
P-Ch -- 47 105 ns
QgTotal Gate Ch arge N-Channel
VDS = 48 V, ID = 1.3 A,
VGS = 5 V
P-Channel
VDS = -240 V, ID = -0.3 A,
VGS = -5 V
N-Ch -- 1.6 2.1 nC
P-Ch -- 3.6 4.7 nC
Qgs Gate-Source Charge N-Ch -- 0.28 -- nC
P-Ch -- 0.42 -- nC
Qgd Gate-Drain Charge N-Ch -- 0.82 -- nC
P-Ch -- 2.1 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain-Source Diode Forward Current N-Ch -- -- 1.3 A
P-Ch -- -- -0.3 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.3 A N-Ch -- -- 1.5 V
VGS = 0 V, IS = -0.3 A P-Ch -- -- -4.0 V
©2000 Fairchild Semiconductor International
FQS4900
Rev. A, August 2000
0.0 0.5 1.0 1.5 2.0 2.5 3.0
0
2
4
6
8
10
12
VDS = 48V
VDS = 30V
! Note : ID = 1.3 A
VGS, Gate-Source Voltage [V]
QG, Total G a te Ch a rg e [nC]
10-1 100101
0
40
80
120
160
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
! Note s :
1. VGS = 0 V
2. f = 1 MHz
Crss
Coss
Ciss
Capacitance [pF]
VDS, Drain-Source Voltage [V]
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
10-1
100
150"
! Notes :
1. VGS = 0V
2. 250#s P ulse Test
25"
IDR, Reverse Drain Current [A]
VSD, Sourc e-D r a i n volta g e [V ]
02468
0.0
0.5
1.0
1.5
2.0
VGS = 5V
VGS = 10V
! N ote : TJ = 25"
RDS(ON) [$],
Drain-Source On-Resistance
ID, Drain Current [A]
0246810
10-1
100
150"
25"
-55"
! No tes :
1. VDS = 25V
2. 250#s P ulse T es t
ID, Drain Cur re nt [A ]
VGS, Gate-Source Voltage [V]
10-1 100101
10-1
100
VGS
Top : 10.0 V
8.0 V
6.0 V
5.0 V
4.5 V
4.0 V
3.5 V
Bottom : 3.0 V
! Notes :
1. 250#s Pu lse Test
2. TC = 25"
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
Typical Characteristics : N-C hannel
Figure 5. C apacitance C haracterist i cs Figure 6. Gate Charge Chara ct eri stics
Figu re 3. On-R esistan ce Variat ion vs.
Drain Current and Gate Voltage Figure 4. Body Diode Fo rwa rd Voltage
Variation vs. Source Current
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On- R egi on Characteri st ic s
©2000 Fairchild Semiconductor International
FQS4900
Rev. A, August 2000
10-4 10-3 10-2 10-1 100101102
10-1
100
101
0.01
! No te s :
1 . Z %JC(t) = 62.5 "/W M ax.
2 . Du ty F a c to r, D = t1/t2
3 . T JM - T C = PDM * Z %JC(t)
single pulse
D=0.5
0.02
0.2
0.05
0.1
Z%JC
(t), Therm al R esponse
t1, Square W ave Pulse Duration [sec]
25 50 75 100 125 150
0.0
0.3
0.6
0.9
1.2
1.5
ID, Drain Current [A]
TC, Case Temperature ["
]
10-1 100101102
10-2
10-1
100
101
1 ms
100 ms
1 s
DC10 s
10 ms
Operation in This Area
is Limited by R DS(on)
! Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
ID, Dra in Current [A ]
VDS, Drain-Source Voltage [V]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
! Notes :
1. VGS = 10 V
2. ID = 0.65 A
RDS(ON) , (Norm alized)
Drain-Source On-Resistance
TJ, Junction Temperature [oC]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
! Notes :
1 . VGS = 0 V
2 . ID = 250 #A
BV DSS , (N ormaliz e d )
Drain-Sou rce Breakdow n V oltage
TJ, Junction Temperature [oC]
Typical Characteristics : N-Channel (Continued)
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figu re 7. Breakdo w n Vol ta g e Variation
vs. Temperature Figure 8. On-Resistance Variation
vs. Temperature
Figure 11. Tr ansient Thermal Respons e Cur ve
t1
PDM
t2
©2000 Fairchild Semiconductor International
FQS4900
Rev. A, August 2000
0123456
0
2
4
6
8
10
12
VDS = -150V
VDS = -60V
VDS = -240V
! Note : ID = -0.3 A
-VGS , G ate -S o u rce V o ltag e [V ]
QG, T otal Gate Char g e [nC ]
10-1 100101
0
50
100
150
200
250 Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
! Notes :
1. VGS = 0 V
2. f = 1 M Hz
Crss
Coss
Ciss
Ca pac itance [pF]
VDS, Drain-Source Voltage [V]
0.0 0.5 1.0 1.5 2.0 2.5 3.0
10-1
100
150"! No tes :
1. VGS = 0V
2. 250#s P ulse T es t
25"
-IDR , Reverse Drain Current [A]
-VSD , So u rc e-D rain Voltage [V ]
0.0 0.3 0.6 0.9 1.2 1.5
10
15
20
25
30
! N o te : TJ = 25"
VGS = - 5V
VGS = - 10V
RDS(on) [],
Drain-Source On-Resistance
-ID , Drain C u r re n t [A]
0246810
10-1
100
150"
25"
-55"
! Notes :
1. VDS = -25V
2. 250#s P ulse Test
-ID , Drain Current [A]
-VGS , Gate-Source Voltage [V]
10-1 100101
10-2
10-1
100 VGS
Top : -10.0 V
-8.0 V
-6.0 V
-5.0 V
-4.5 V
-4.0 V
-3.5 V
Bo ttom : -3.0 V
! Notes :
1. 250#s Pulse Test
2. TC = 25"
-ID, Drain Current [A]
-VDS, Drain-Source Voltage [V]
Typical Characteristics : P-Channel (Continued)
Figure 5. C apacitance C haracterist i cs Figure 6. Gate Charge Chara ct eri stics
Figu re 3. On-R esistan ce Variat ion vs.
Drain Current and Gate Voltage Figure 4. Body Diode Fo rwa rd Voltage
Variation vs. Source Current
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On- R egi on Characteri st ic s
©2000 Fairchild Semiconductor International
FQS4900
Rev. A, August 2000
25 50 75 100 125 150
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
-ID, Dra in Curren t [A]
TC, Case Temperature ["
]
100101102
10-3
10-2
10-1
100
101
1 m s
1 s
10 s
DC
100 m s
10 m s
Operation in This Area
is Limited by R DS(on)
! Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
-ID, Drain Current [A]
-VDS, Drain-Source Voltage [V]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
! Notes :
1. V GS = -10 V
2. ID = -0 .1 5 A
RDS(ON) , (Normalized)
Drain-Source O n-R esistance
TJ, Junction Temperature [oC]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
! Notes :
1 . VGS = 0 V
2 . ID = -250 #A
-BV DSS , (N orm a liz e d)
Drain-Sou rce Breakdow n V oltage
TJ, Junction Temperature [oC]
10-4 10-3 10-2 10-1 100101102
10-1
100
101
0.01
! No te s :
1 . Z %JC(t) = 62.5 "/W M ax.
2 . Du ty F a c to r, D = t1/t2
3 . T JM - T C = PDM * Z %JC(t)
single pulse
D=0.5
0.02
0.2
0.05
0.1
Z%JC
(t), Therm al R esponse
t1, Square W ave Pulse Duration [sec]
Typical Characteristics : P-Channel (Continued)
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figu re 7. Breakdo w n Vol ta g e Variation
vs. Temperature Figure 8. On-Resistance Variation
vs. Temperature
Figure 11. Tr ansient Thermal Respons e Cur ve
t1
PDM
t2
©2000 Fairchild Semiconductor International
FQS4900
Rev. A, August 2000
Charge
VGS
5V Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50K&
200nF
12V
Same Type
as DUT
Charge
VGS
5V Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50K&
200nF
12V
Same Type
as DUT
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
5V
VDS RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
5V
VDS RL
DUT
RG
VGS
Gate Charge Test Circuit & Waveform
Resist iv e Sw itc h ing Tes t Ci rcuit & Waveforms
©2000 Fairchild Semiconductor International
FQS4900
Rev. A, August 2000
Package Dimensions
4.92 ±0.20
0.194 ±0.008
0.41 ±0.10
0.016 ±0.004
1.27
0.050
5.72
0.225
1.55 ±0.20
0.061 ±0.008
0.1~0.25
0.004~0.001
6.00 ±0.30
0.236 ±0.012
3.95 ±0.20
0.156 ±0.008
0.50 ±0.20
0.020 ±0.008
5.13
0.202 MAX
#1
#4 #5
0~8°
#8
0.56
0.022
()
1.80
0.071
MAX0.10
MAX0.004
MAX
MIN
+0.10
-0.05
0.15+0.004
-0.002
0.006
8-SOP
©2000 Fairchild Semiconductor International
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
E2CMOS™
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE
POP™
PowerTrench®
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
VCX™
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PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY A NY LICENSE UNDER ITS PATENT RIGHTS, N OR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
INTERNATIONAL.
As used herein:
1. Life support devices or systems are devic es or syst em s
which, (a) ar e intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In
Design This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary First Production This datasheet contains preliminary data, and
supplementary data will be published at a later dat e.
Fairchild Semiconduct or reserv es the right to make
changes at any time without notice in order to improve
design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconduct or reserv es the right to make changes at
any time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. A, January 2000