LT1170/LT1171/LT1172
9
117012fg
OPERATION
The LT1170/LT1171/LT1172 are current mode switchers.
This means that switch duty cycle is directly controlled by
switch current rather than by output voltage. Referring to
the block diagram, the switch is turned “on” at the start of
each oscillator cycle. It is turned “off” when switch current
reaches a predetermined level. Control of output voltage
is obtained by using the output of a voltage sensing er-
ror amplifier to set current trip level. This technique has
several advantages. First, it has immediate response to
input voltage variations, unlike ordinary switchers which
have notoriously poor line transient response. Second,
it reduces the 90° phase shift at midfrequencies in the
energy storage inductor. This greatly simplifies closed
loop frequency compensation under widely varying input
voltage or output load conditions. Finally, it allows simple
pulse-by-pulse current limiting to provide maximum switch
protection under output overload or short conditions. A
low dropout internal regulator provides a 2.3V supply for
all internal circuitry on the LT1170/LT1171/LT1172. This
low dropout design allows input voltage to vary from 3V
to 60V with virtually no change in device performance. A
100kHz oscillator is the basic clock for all internal timing.
It turns “on” the output switch via the logic and driver
circuitry. Special adaptive anti-sat circuitry detects onset
of saturation in the power switch and adjusts driver current
instantaneously to limit switch saturation. This minimizes
driver dissipation and provides very rapid turnoff of the
switch.
A 1.2V bandgap reference biases the positive input of the
error amplifier. The negative input is brought out for output
voltage sensing. This feedback pin has a second function;
when pulled low with an external resistor, it programs the
LT1170/LT1171/LT1172 to disconnect the main error ampli-
fier output and connects the output of the flyback amplifier
to the comparator input. The LT1170/LT1171/LT1172 will
then regulate the value of the flyback pulse with respect
to the supply voltage.* This flyback pulse is directly pro-
portional to output voltage in the traditional transformer
coupled flyback topology regulator. By regulating the
amplitude of the flyback pulse, the output voltage can be
regulated with no direct connection between input and
output. The output is fully floating up to the breakdown
voltage of the transformer windings. Multiple floating
outputs are easily obtained with additional windings.
A special delay network inside the LT1170/ LT1171/LT1172
ignores the leakage inductance spike at the leading edge
of the flyback pulse to improve output regulation.
The error signal developed at the comparator input is
brought out externally. This pin (VC) has four different func-
tions. It is used for frequency compensation, current limit
adjustment, soft-starting, and total regulator shutdown.
During normal regulator operation this pin sits at a voltage
between 0.9V (low output current) and 2.0V (high output
current). The error amplifiers are current output (gm) types,
so this voltage can be externally clamped for adjusting
current limit. Likewise, a capacitor coupled external clamp
will provide soft-start. Switch duty cycle goes to zero if
the VC pin is pulled to ground through a diode, placing the
LT1170/LT1171/LT1172 in an idle mode. Pulling the VC pin
below 0.15V causes total regulator shutdown, with only
50µA supply current for shutdown circuitry biasing. See
Application Note 19 for full application details.
Extra Pins on the MiniDIP and Surface Mount
Packages
The 8- and 16-pin versions of the LT1172 have the emitters
of the power transistor brought out separately from the
ground pin. This eliminates errors due to ground pin voltage
drops and allows the user to reduce switch current limit
2:1 by leaving the second emitter (E2) disconnected. The
first emitter (E1) should always be connected to the ground
pin. Note that switch “on” resistance doubles when E2 is
left open, so efficiency will suffer somewhat when switch
currents exceed 300mA. Also, note that chip dissipation
will actually increase with E2 open during normal load
operation, even though dissipation in current limit mode
will decrease. See “Thermal Considerations” next.
Thermal Considerations When Using the MiniDIP and
SW Packages
The low supply current and high switch efficiency of the
LT1172 allow it to be used without a heat sink in most
applications when the TO-220 or TO-3 package is se-
lected. These packages are rated at 50°C/W and 35°C/W
respectively. The miniDIPs, however, are rated at 100°C/W
in ceramic (J) and 130°C/W in plastic (N).
*See note under Block Diagram.