Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 41
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 29 A
IDM Pulsed Drain Current 164
PD @TC = 25°C Power Dissipation 200 W
Linear Derating Factor 1.3 W/°C
VGS Gate-to-Source Voltage ± 30 V
dv/dt Peak Diode Recovery dv/dt 4.3 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
10/28/99
SMPS MOSFET
HEXFET® Power MOSFET
lSwitch Mode Power Supply (SMPS)
lUninterruptible Power Supply
lHigh speed power switching
Benefits
Applications
lLow Gate Charge Qg results in Simple
Drive Requirement
lImproved Gate, Avalanche and dynamic
dv/dt Ruggedness
lFully Characterized Capacitance and
Avalanche Voltage and Current
l Effective Coss Specified (See AN 1001)
VDSS RDS(on) max ID
150V 0.04541A
Applicable Off Line SMPS Topologies
l Telcom 48V input DC/DC Active Clamp Reset Forward Converter
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Notes through are on page 10
Absolute Maximum Ratings
IRF3515S
IRF3515L
D2Pak
IRF3515S TO-262
IRF3515L
PD- 91899B
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Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 15 0 –– –– V VGS = 0V, ID = 250µA
V(BR)DSS/TJBreakdown Voltage Temp. Coefficient ––– 0.21 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.045 VGS = 10V, ID = 25A
VGS(th) Gate Threshold Voltage 3.0 ––– 4.5 V VDS = VGS, ID = 250µA
––– ––– 25 µA VDS = 150V, VGS = 0V
––– ––– 250 VDS = 120V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 30V
Gate-to-Source Reverse Leakage ––– ––– -100 nA VGS = -30V
Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 15 ––– ––– S VDS = 50V, ID = 25A
QgTotal Gate Charge ––– –– 1 0 7 ID = 25A
Qgs Gate-to-Source Charge ––– ––– 23 nC VDS = 120V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 65 VGS = 10V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 17 ––– VDD = 75V
trRise Time ––– 120 ––– ID = 25A
td(off) Turn-Off Delay Time ––– 34 ––– RG = 2.5
tfFall Time ––– 63 ––– RD = 3.0,See Fig. 10
Ciss Input Capacitance ––– 2260 ––– VGS = 0V
Coss Output Capacitance ––– 530 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 170 ––– pF ƒ = 1.0MHz, See Fig. 5
Coss Output Capacitance ––– 3330 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 230 ––– VGS = 0V, VDS = 120V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 280 ––– VGS = 0V, VDS = 0V to 120V
Static @ TJ = 25°C (unless otherwise specified)
IGSS
IDSS Drain-to-Source Leakage Current
Dynamic @ TJ = 25°C (unless otherwise specified)
ns
Parameter Typ. Max. Units
EAS Single Pulse Avalanche Energy––– 670 mJ
IAR Avalanche Current––– 25 A
EAR Repetitive Avalanche Energy––– 20 mJ
Avalanche Characteristics
S
D
G
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode)
––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 25A, VGS = 0V
trr Reverse Recovery Time ––– 200 300 n s T J = 25°C, IF = 25A
Qrr Reverse RecoveryCharge ––– 1.6 2. 4 µC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Diode Characteristics
41
164 A
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.75 °C/W
RθJA Junction-to-Ambient ( PCB Mounted, steady-state)* –– 40
Thermal Resistance
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Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.1
1
10
100
1000
0.1 1 10 100
20
µ
s PULSE WIDTH
T = 25 C
J°
TOP
BOTTOM
VGS
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
5.0V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
5.0V 1
10
100
1000
0.1 1 10 100
20
µ
s PULSE WIDTH
T = 175 C
J°
TOP
BOTTOM
VGS
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
5.0V
V , Drain-to-Source Volta
g
e (V)
I , Drain-to-Source Current (A)
DS
D
5.0V
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
3.0
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
41A
1
10
100
1000
4 6 8 10 12 14
V = 50V
20µs PULSE WIDTH
DS
V , Gate-to-Source Volta
g
e (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
J°
T = 175 C
J°
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Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
020 40 60 80 100 120
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
25A
V = 30V
DS
V = 75V
DS
V = 120V
DS
0.1
1
10
100
1000
0.2 0.6 1.0 1.4 1.8
V ,Source-to-Drain Volta
g
e (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J°
T = 175 C
J°
1
10
100
1000
1 10 100 1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
Sin
g
le Pulse
T
T = 175 C
= 25 C
°°
J
C
V , Drain-to-Source Volta
g
e (V)
I , Drain Current (A)I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
110 100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C, Capacitance(pF)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = C
gs + Cgd, C
ds SHORTED
Crss
= C
gd
Coss
= C
ds + Cgd
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Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RGD.U.T.
10V
+
-
VDD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
0.001
0.01
0.1
1
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
25 50 75 100 125 150 175
0
10
20
30
40
50
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
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Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50K
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
25 50 75 100 125 150 175
0
400
800
1200
1600
Starting T , Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
10A
17A
25A
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P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFET® Power MOSFETS
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RGVDD
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
*
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D2Pak Package Outline
D2Pak Part Marking Information
10.16 (.400)
REF.
6.47 (.255 )
6.18 (.243 )
2.61 (.1 03)
2.32 (.0 91)
8.89 (.350)
REF.
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
5.28 (.2 08)
4.78 (.1 88)
4.69 (.185)
4.20 (.165)
10.54 (.415)
10.29 (.405)
- A -
2
1 3 15.49 (.610)
14.73 (.580)
3X 0.93 (.037)
0.69 (.027)
5 .08 (.200)
3X 1.40 (.055)
1.14 (.045)
1.78 (.070)
1.27 (.050)
1.40 (.055)
MA X.
NOTES:
1 DIM ENSIONS AFTER SOLDER DIP.
2 DIM ENSIONING & TOLE RANCING PER ANSI Y14.5M, 1982.
3 CONTROLLING DIM ENSION : INCH.
4 HEATSINK & LEAD DIME NSIONS DO NOT INCLUDE BURRS.
0.55 (.022)
0.46 (.018)
0.2 5 (.0 1 0) M B A M MINIMUM RECOM MENDED FOOTPRINT
11.43 (.450)
8 .89 (.350)
17 .78 (.700)
3.81 (.15 0)
2.08 (.082)
2X
LEAD AS SIGN M E N TS
1 - GAT E
2 - DRAIN
3 - SOURCE
2.54 (.100)
2X
PAR T N UM BER
INTERNATIONAL
RE CTIFIE R
LO GO DATE CODE
(YYW W )
YY = YEAR
WW = WEEK
A S SEMBLY
LOT COD E
F530S
9B 1M
9246
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TO-262 Par t Mar king Infor mation
TO-262 Package Outline
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WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 838 4630
IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936
Data and specifications subject to change without notice. 10/99
D2Pak Tape & Reel Information
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421) 16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
1 1.60 (.45 7)
1 1.40 (.44 9) 1 5.42 (.6 09)
1 5.22 (.6 01)
4.7 2 (.136)
4.5 2 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
M AX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NO TES :
1. COMFORMS TO E IA-418.
2. CONTROLLING DIMENSION: MILLIMETER .
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DIST O RTION @ OUTER EDGE.
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
ISD 5.0A, di/dt 330A/µs, VDD V(BR)DSS,
TJ 175°C
Notes:
Starting TJ = 25°C, L = 2.2mH
RG = 25, IAS = 25A. (See Figure 12)
Pulse width 300µs; duty cycle 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
* When mounted on FR-4 board using minimum recommended footprint.
For recommended footprint and soldering techniques refer to application note #AN-994.
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