74LCX138MTCX_NL - Fairchild Semiconductor

March 1995

Revised February 2004

74LCX138 Low Voltage 1-of-8 Decoder/Demultiplexer with 5V Tolerant Inputs

74LCX138

Low Voltage 1-of-8 Decoder/Demultiplexer

with 5V Tolerant Inputs

General Description

The LCX13 8 is a high- spee d 1-of-8 decoder /demu ltiplex er.

This device is ideally suited for high-speed memory chip

select ad dress decoding . The multip le input enabl es allow

parallel expansion to a 1-of-24 decoder using just three

LCX138 devices or a 1-of-32 decoder using four LCX138

devices and one inverter.

The 74LCX138 is fabricated with advanced CMOS technol-

ogy to achieve high speed operation while maintaining

CMOS low power dissipation.

Features

■5V tolerant inputs

■2.3V to 3.6V VCC specifications provided

■6.0 ns tPD max (VCC = 3.3V), 10 µA ICC max

■Power down high impedance inputs and outputs

■±24 mA output drive (VCC = 3.0V)

■Implements patented noise/EMI reduction circuitry

■Latch-up per for man c e exce eds 500 mA

■ESD performance :

Human body model > 2000V

Machine model > 200V

■Leadless DQFN package

Ordering Code:

Note 1: Devices al so av ailable in Tape and Reel. Specif y by append ing suffix lette r “X” to the ordering co de.

Note 2: DQFN package available in Tape and Reel only.

Order Number Package

Number Package Desc ription

74LCX138M

(Note 1) M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74LCX138SJ

(Note 1) M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LCX138BQX

(Note 2) MLP016E 16-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241,

2.5 x 3.5mm

74LCX138MTC

(Note 1) MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

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74LCX138

Connection Diagrams

Pin Assignments for SOIC, SOP, and TSSOP

Pad Assignments for DQFN

(Top Through View)

Pin Descriptions

Functional Description

The LCX138 high-speed 1-of-8 decoder/demultiplexer

accepts three binary weighted inputs (A0, A1, A2) and,

when enabled, provides eight mutually exclusive active-

LOW ou tputs (O 0–O7). T he LCX 138 feature s thre e Ena ble

inputs, two active -L OW (E 1, E2) an d one acti ve-HI GH (E 3).

All outputs will be HIGH unless E1 and E2 are LOW and E3

is HIGH . Th e LC X1 38 can b e u sed as an 8- outp ut d em ul ti-

plexer by using one of the active LOW Enable inputs as the

data input and the other Enable inputs as strobes. The

Enable inputs which are not used must be permanently tied

to their appropriate active-HIGH or active-LOW state.

Truth Table

H = HIGH Voltage Le ve l

L = LOW Voltage Level

X = Immaterial

Pin Nam es Descri ption

A0–A2Address Inputs

E1–E2Enable Inputs

E3Enable Input

O0–O7Outputs

Inputs Outputs

E1E2E3A0A1A2O0O1O2O3O4O5O6O7

HXXXXXHHHHHHHH

XHXXXXHHHHHHHH

XXLXXXHHHHHHHH

LLHLLLLHHHHHHH

LLHHLLHLHHHHHH

LLHLHLHHLHHHHH

LLHHHLHHHLHHHH

LLHLLHHHHHLHHH

LLHHLHHHHHHLHH

LLHLHHHHHHHHLH

LLHHHHHHHHHHHL

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74LCX138

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

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74LCX138

Absolute Maximum Ratings(Note 3)

Recommended Operating Conditions (Note 5)

Note 3: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated

at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-

mend ed Operating Co nditions ” ta ble will defi ne t he cond it ions for act ual device operation.

Note 4: IO Absolute Maximum Rating must be observed.

Note 5: Unused inputs must be held HIGH or LOW. They may not float.

DC Electrical Characteristics

Symbol Parameter Value Conditions Units

VCC Supply Voltage −0.5 to +7.0 V

VIDC Input Voltage −0.5 to +7.0 V

VODC Output Voltage −0.5 to VCC + 0.5 Output i n HIGH or LOW State (Note 4) V

IIK DC Input Diode Current −50 VI < GND mA

IOK DC Output Diode Current −50 VO < GND mA

+50 VO > VCC

IODC Output Source/Sink Current ±50 mA

ICC DC Supply Current per Supply Pin ±100 mA

IGND DC Ground C urrent per Ground Pin ±100 mA

TSTG Storage Temperature −65 to +150 °C

Symbol Parameter Min Max Units

VCC Supply Voltage Operating 2.0 3.6 V

Data Retention 1.5 3.6

VIInput Voltage 0.0 5.5 V

VOOutput Voltage HIGH or LOW State 0.0 VCC V

IOH/IOL Output Current VCC = 3.0V to 3.6V ±24.0 mAVCC = 2.7V to 3.0V ±12.0

VCC = 2.3V to 2.7V ±8.0

TAFree-Air Operating Temperature −40.0 85.0 °C

∆t/∆V Input Edge Rate, VIN = 0.8V to 2.0V, VCC = 3.0V 0.0 10.0 ns/V

Symbol Parameter Conditions VCC TA = −40°C to +85°CUnits

(V) Min Max

VIH HIGH Level Input Voltage 2.3 to 2.7 1.7 V

2.7 to 3.6 2.0

VIL LOW Level Input Voltage 2.3 to 2.7 0.7 V

2.7 to 3.6 0.8

VOH HIGH Level Output Voltage IOH = −100 µA 2.3 to 3.6 VCC − 0.2

IOH = -8 mA 2.3 1.8

IOH = −12 mA 2.7 2.2

IOH = −18 mA 3.0 2.4

IOH = −24 mA 3.0 2.2

VOL LOW Level Output Voltage IOL = 100 µA 2.3 to 3.6 0.2

IOL = 8mA 2.3 0.6

IOL = 12 mA 2.7 0.4

IOL = 16 mA 3.0 0.4

IOL = 24 mA 3.0 0.55

IIInput Leakage Current 0 ≤ VI ≤ 5.5V 2.3 to 3.6 ±5.0 µA

IOFF Power-Off Leakage Current VI or VO = 5.5V 0.0 10.0 µA

ICC Quiescent Supply Current VI = VCC or GND 2.3 to 3.6 10.0 µA

3.6V ≤ VI ≤ 5.5V 2.3 to 3.6 ±10.0

∆ICC Increase in ICC per Input VIH = VCC −0.6V 2.3 to 3.6 500 µA

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74LCX138

AC Electrical Characteristics

Note 6: Skew is def ined as t he absolute va lue of the differenc e betwee n the ac tu al propa gation d elay for any two s eparate outpu ts of the same d evi ce. The

specification a pplies to an y out puts switc hing in the s am e direct ion, either HIGH-t o-LOW (tOSHL) or LOW-to- H IG H (t OSLH).

Dynamic Switching Characteristics

Capacitance

Symbol Parameter

TA = −40°C t o +85°C, RL = 500Ω

Units

VCC = 3.3V ± 0.3V VCC = 2.7V VCC = 2.5V ± 0.2V

CL = 50pF CL = 50pF CL = 30pF

Min Max Min Max Min Max

tPHL Propagation Delay 1.5 6.0 1.5 7.0 1.5 7.2 ns

tPLH An to Qn 1.5 6.0 1.5 7.0 1.5 7.2

tPHL Propagation Delay 1.5 6.5 1.5 7.5 1.5 8.4 ns

tPLH E3 to Qn 1.5 6.5 1.5 7.5 1.5 8.4

tPHL Propagation Delay 1.5 6.0 1.5 7.0 1.5 7.2 ns

tPLH E1 or E2 to Qn 1.5 6.0 1.5 7.0 1.5 7.2

tOSHL Output to Output Skew (Note 6) 1.0 ns

tOSLH 1.0

Symbol Parameter Conditions VCC TA = 25°CUnits

(V) Typical

VOLP Quiet Output Dynamic Peak VOL CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 0.8 V

CL = 30 pF, VIH = 2.5V, VIL = 0V 2.5 0.6

VOLV Quiet Output Dynamic Valley VOL CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 −0.8 V

CL = 30 pF, VIH = 2.5V, VIL = 0V 2.5 −0.6

Symbol Parameter Conditions Typical Units

CIN Input Capacitance VCC = Open, VI = 0V or VCC 7.0 pF

COUT Output Capacitance VCC = 3.3V, VI = 0V or VCC 8.0 pF

CPD Power Dissipation Capacitance VCC = 3.3V, VI = 0V or VCC, f = 10 MHz 25.0 pF

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74LCX138

AC Loading and Waveforms Generic for LCX Family

FIGURE 1. AC Test Circuit

(CL includes probe and jig capa citance)

Waveform for Inverting and Non-Inverting Functions

Prop agation Delay, Pulse Widt h and trec Waveforms

3-STATE Output High Enable and

Disable Times for Logic

3-STATE Output Low Enable and

Disable Times for Logic

Setup Time, Hold TIme and Recovery TIme for Logic

trise and tfall

FIGURE 2. Waveforms

(Input Pul se Characteristics; f = 1MHz, tr = tf = 3ns)

Test Switch

tPLH, tPHL Open

tPZL, tPLZ 6V at VCC = 3.3 V ± 0.3V

VCC x 2 at VCC = 2.5V ± 0.2V

tPZH, tPHZ GND

Symbol VCC

3.3V ± 0.3V 2.7V 2.5V ± 0. 2V

Vmi 1.5V 1.5V VCC/2

Vmo 1.5V 1.5V VCC/2

VxVOL + 0.3V VOL + 0.3V VOL + 0.15V

VyVOH − 0.3V VOH − 0.3V VOH − 0.15V

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74LCX138

Schematic Diagram Generic for LCX Family

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74LCX138

Tape and Reel Specification

Tape Format for DQFN

TAPE DIMENSIONS inches (millimeters)

REEL DIMENSIONS inches (millimeters)

Package Tape Number Cavity Cover Tape

Designator Section Cavities Status Status

Leader (Start End) 125 (typ) Empty Sealed

BQX Carrier 3000 Filled Sealed

Trailer (Hub End) 75 (typ) Empty Sealed

Tape SizeABCDNW1W2

12 mm 13.0 0.059 0.512 0.795 2.165 0.488 0.724

(330.0) (1.50) (13.00) (20.20) (55.00) (12.4) (18.4)

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74LCX138

Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

Package Number M16A

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74LCX138

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Sma ll Outline Pac kage (SOP), EI AJ TYPE II, 5.3mm Wide

Package Number M16D

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74LCX138

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.5mm

Package Number MLP016E

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74LCX138 Low Voltage 1-of-8 Decoder/Demultiplexer with 5V Tolerant Inputs

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC16

Fairchild does not assu me any responsibility for use of any circuitry de scribed, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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user.

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