(R) OPA OPA 134 OPA 134 OPA 213 OPA134 OPA2134 OPA4134 413 4 OPA OPA 2134 4 413 4 High Performance AUDIO OPERATIONAL AMPLIFIERS TM FEATURES DESCRIPTION SUPERIOR SOUND QUALITY The OPA134 series are ultra-low distortion, low noise operational amplifiers fully specified for audio applications. A true FET input stage was incorporated to provide superior sound quality and speed for exceptional audio performance. This in combination with high output drive capability and excellent dc performance allows use in a wide variety of demanding applications. In addition, the OPA134's wide output swing, to within 1V of the rails, allows increased headroom making it ideal for use in any audio circuit. OPA134 op amps are easy to use and free from phase inversion and overload problems often found in common FET-input op amps. They can be operated from 2.5V to 18V power supplies. Input cascode circuitry provides excellent common-mode rejection and maintains low input bias current over its wide input voltage range, minimizing distortion. OPA134 series op amps are unity-gain stable and provide excellent dynamic behavior over a wide range of load conditions, including high load capacitance. The dual and quad versions feature completely independent circuitry for lowest crosstalk and freedom from interaction, even when overdriven or overloaded. Single and dual versions are available in 8-pin DIP and SO-8 surface-mount packages in standard configurations. The quad is available in 14-pin DIP and SO-14 surface mount packages. All are specified for -40C to +85C operation. A SPICE macromodel is available for design analysis. ULTRA LOW DISTORTION: 0.00008% LOW NOISE: 8nV/Hz TRUE FET-INPUT: IB = 5pA HIGH SPEED: SLEW RATE: 20V/s BANDWIDTH: 8MHz HIGH OPEN-LOOP GAIN: 120dB (600) WIDE SUPPLY RANGE: 2.5V to 18V SINGLE, DUAL, AND QUAD VERSIONS APPLICATIONS PROFESSIONAL AUDIO AND MUSIC LINE DRIVERS LINE RECEIVERS MULTIMEDIA AUDIO ACTIVE FILTERS PREAMPLIFIERS INTEGRATORS CROSSOVER NETWORKS OPA4134 OPA134 Offset Trim -In 1 8 2 7 Offset Trim V+ V- 3 6 4 5 Output NC Out A 1 -In A 2 +In A 3 8-Pin DIP, SO-8 V- A B 4 8 V+ 7 Out B 6 -In B 5 8-Pin DIP, SO-8 1 14 Out D -In A 2 13 -In D A OPA2134 +In Out A +In B D +In A 3 12 +In D V+ 4 11 V- +In B 5 10 +In C B C -In B 6 9 -In C Out B 7 8 Out C 14-Pin DIP SO-14 International Airport Industrial Park * Mailing Address: PO Box 11400, Tucson, AZ 85734 * Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 * Tel: (520) 746-1111 * Twx: 910-952-1111 Internet: http://www.burr-brown.com/ * FAXLine: (800) 548-6133 (US/Canada Only) * Cable: BBRCORP * Telex: 066-6491 * FAX: (520) 889-1510 * Immediate Product Info: (800) 548-6132 (c) 1996 Burr-Brown Corporation SBOS058 PDS-1339C Printed in U.S.A. December, 1997 SPECIFICATIONS At TA = +25C, VS = 15V, unless otherwise noted. OPA134PA, UA OPA2134PA, UA OPA4134PA, UA PARAMETER CONDITION AUDIO PERFORMANCE Total Harmonic Distortion + Noise Intermodulation Distortion Headroom(1) FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate(2) Full Power Bandwidth Settling Time 0.1% 0.01% Overload Recovery Time MIN G = 1, f = 1kHz, VO = 3Vrms RL = 2k RL = 600 G = 1, f = 1kHz, VO = 1Vp-p THD < 0.01%, RL = 2k, VS = 18V 15 G = 1, 10V Step, CL = 100pF G = 1, 10V Step, CL = 100pF (VIN) * (Gain) = VS NOISE Input Voltage Noise Noise Voltage, f = 20Hz to 20kHz Noise Density, f = 1kHz Current Noise Density, f = 1kHz OFFSET VOLTAGE Input Offset Voltage vs Temperature vs Power Supply (PSRR) Channel Separation (Dual, Quad) INPUT BIAS CURRENT Input Bias Current(4) vs Temperature(3) Input Offset Current(4) INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection INPUT IMPEDANCE Differential Common-Mode OPEN-LOOP GAIN Open-Loop Voltage Gain OUTPUT Voltage Output Output Current Output Impedance, Closed-Loop(5) Open-Loop Short-Circuit Current Capacitive Load Drive (Stable Operation) POWER SUPPLY Specified Operating Voltage Operating Voltage Range Quiescent Current (per amplifier) TA = -40C to +85C TA = -40C to +85C VS = 2.5V to 18V dc, RL = 2k f = 20kHz, RL = 2k 90 VCM =0V VCM =0V VCM = -12.5V to +12.5V TA = -40C to +85C (V-)+2.5 86 VCM = -12.5V to +12.5V RL = 10k, VO = -14.5V to +13.8V RL = 2k, VO = -13.8V to +13.5V RL = 600, VO = -12.8V to +12.5V 104 104 104 RL = 10k RL = 2k RL = 600 (V-)+0.5 (V-)+1.2 (V-)+2.2 TYP 2.5 IO = 0 UNITS 0.00008 0.00015 -98 23.6 % % dB dBu 8 20 1.3 0.7 1 0.5 MHz V/s MHz s s s 1.2 8 3 Vrms nV/Hz fA/Hz 0.5 1 2 106 135 130 2 3(3) mV mV V/C dB dB dB +5 See Typical Curve 2 100 5 50 pA nA pA 13 100 90 (V+)-2.5 V dB dB 1013 || 2 1013 || 5 || pF || pF 120 120 120 dB dB dB (V+)-1.2 (V+)-1.5 (V+)-2.5 35 0.01 10 40 See Typical Curve f = 10kHz f = 10kHz 15 4 TEMPERATURE RANGE Specified Range Operating Range Storage Thermal Resistance, JA 8-Pin DIP SO-8 Surface-Mount 14-Pin DIP SO-14 Surface-Mount MAX -40 -55 -55 100 150 80 110 V V V mA mA 18 5 V V mA +85 +125 +125 C C C C/W C/W C/W C/W NOTES: (1) dBu = 20*log (Vrms/0.7746) where Vrms is the maximum output voltage for which THD+Noise is less than 0.01%. See THD+Noise text. (2) Guaranteed by design. (3) Guaranteed by wafer-level test to 95% confidence level. (4) High-speed test at TJ = 25C. (5) See "Closed-Loop Output Impedance vs Frequency" typical curve. (R) OPA134/2134/4134 2 ELECTROSTATIC DISCHARGE SENSITIVITY ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage, V+ to V- .................................................................... 36V Input Voltage .................................................... (V-) -0.7V to (V+) +0.7V Output Short-Circuit(2) .............................................................. Continuous Operating Temperature ................................................. -40C to +125C Storage Temperature ..................................................... -55C to +125C Junction Temperature ...................................................................... 150C Lead Temperature (soldering, 10s) ................................................. 300C This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. NOTES: (1) Stresses above these ratings may cause permanent damage. (2) Short-circuit to ground, one amplifier per package. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION PRODUCT PACKAGE PACKAGE DRAWING NUMBER(1) Single OPA134PA OPA134UA 8-Pin Plastic DIP SO-8 Surface-Mount 006 182 -40C to +85C -40C to +85C Dual OPA2134PA OPA2134UA 8-Pin Plastic DIP SO-8 Surface-Mount 006 182 -40C to +85C -40C to +85C Quad OPA4134PA OPA4134UA 14-Pin Plastic DIP SO-14 Surface-Mount 010 235 -40C to +85C -40C to +85C TEMPERATURE RANGE NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. TYPICAL PERFORMANCE CURVES At TA = +25C, VS = 15V, R L = 2k, unless otherwise noted. SMPTE INTERMODULATION DISTORTION vs OUTPUT AMPLITUDE TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 5 0.1 RL 2k 600 IMD (%) THD+Noise (%) 0.01 1 0.001 G = +10 G = +1 f = 1kHz RL = 2k 0.1 OPA134 OP176 0.010 OPA134 0.0001 Baseline G = +1 VO = 3Vrms 0.001 0.0005 30m 0.00001 10 100 1k 10k 100k 0.1 1 10 30 Output Amplitude (Vpp) Frequency (Hz) The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. (R) 3 OPA134/2134/4134 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25C, VS = 15V, R L = 2k, unless otherwise noted. HEADROOM - TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT AMPLITUDE TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 1 0.01 VS = 18V RL = 2k f = 1kHz 0.001 VS = 16 0.0001 VS = 17 0.010 OPA134 0.001 Baseline 0.0005 100 1k 10k 20k 0.1 20 Output Amplitude (Vrms) HARMONIC DISTORTION + NOISE vs FREQUENCY VOLTAGE NOISE vs SOURCE RESISTANCE 0.01 1k 2nd Harmonic 3rd Harmonic 0.001 Voltage Noise (nV/Hz) Amplitude (% of Fundamentals) 10 1 Frequency (Hz) 00 RL 0.0001 =6 RL 0.00001 k =2 OP176+ Resistor 100 10 OPA134+ Resistor 1 Resistor Noise Only VO = 1Vrms 0.000001 20 OPA134 OP176 VS = 18 0.00001 20 THD < 0.01% OPA134 - 11.7Vrms OP176 - 11.1Vrms 0.1 THD+Noise (%) THD+Noise (%) VO = 10Vrms RL = 2k 100 1k 10k Vn (total) = (inRS)2 + en2 + 4kTRS 0.1 20k 10 100 Frequency (Hz) 1k 10k 100k 1M 10M Source Resistance () INPUT-REFERRED NOISE VOLTAGE vs NOISE BANDWIDTH INPUT VOLTAGE AND CURRENT NOISE SPECTRAL DENSITY vs FREQUENCY 100 1k Noise Voltage (V) Current Noise (fA/Hz) Voltage Noise (nV/Hz) RS = 20 100 Voltage Noise 10 10 Peak-to-Peak 1 RMS Current Noise 1 0.1 10 1 100 1k 10k 100k 1 1M (R) OPA134/2134/4134 10 100 1k Noise Bandwidth (Hz) Frequency (Hz) 4 10k 100k TYPICAL PERFORMANCE CURVES (CONT) At TA = +25C, VS = 15V, RL = 2k, unless otherwise noted. OPEN-LOOP GAIN/PHASE vs FREQUENCY CLOSED-LOOP GAIN vs FREQUENCY 160 0 50 140 40 100 80 -90 60 40 -135 G 20 0 G = +100 Closed-Loop Gain (dB) -45 Phase Shift () Voltage Gain (dB) 120 30 20 G = +10 10 0 G = +1 -10 -180 -20 -20 0.1 1 10 100 1k 10k 100k 1M 1k 10M 10k POWER SUPPLY AND COMMON-MODE REJECTION vs FREQUENCY 10M 160 RL = 100 -PSR Channel Separation (dB) PSR, CMR (dB) 1M CHANNEL SEPARATION vs FREQUENCY 120 80 60 40 +PSR CMR 20 0 140 120 RL = 2k Dual and quad devices. G = 1, all channels. Quad measured channel A to D or B to C--other combinations yield improved rejection. 100 80 10 100 1k 10k 100k 1M 100 1k Frequency (Hz) 10 VS = 5V VS = 2.5V 10 Closed-Loop Output Impedance () Maximum output voltage without slew-rate induced distortion 20 0 100k CLOSED-LOOP OUTPUT IMPEDANCE vs FREQUENCY 30 VS = 15V 10k Frequency (Hz) MAXIMUM OUTPUT VOLTAGE vs FREQUENCY Output Voltage (Vp-p) 100k Frequency (Hz) Frequency (Hz) Note: Open-Loop Output Impedance at f = 10kHz is 10 1 0.1 G = +100 0.01 G = +10 0.001 G = +2 G = +1 0.0001 10k 100k 1M 10M 10 Frequency (Hz) 100 1k 10k 100k Frequency (Hz) (R) 5 OPA134/2134/4134 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25C, VS = 15V, R L = 2k, unless otherwise noted. INPUT BIAS CURRENT vs INPUT COMMON-MODE VOLTAGE INPUT BIAS CURRENT vs TEMPERATURE 10 100k High Speed Test Warmed Up 9 1k 100 Dual 10 1 High Speed Test 8 Input Bias Current (pA) Input Bias Current (pA) 10k 7 6 5 4 3 2 Single 1 0 0.1 -75 -50 -25 0 25 50 75 100 125 -15 -10 -5 0 5 10 15 Common-Mode Voltage (V) Ambient Temperature (C) OPEN-LOOP GAIN vs TEMPERATURE CMR, PSR vs TEMPERATURE 150 120 RL = 600 RL = 2k 130 CMR, PSR (dB) Open-Loop Gain (dB) 140 FPO 120 RL = 10k 110 PSR 100 110 CMR 100 90 -75 -50 -25 0 25 50 75 100 125 -75 -50 -25 Temperature (C) 4.3 60 25 50 75 100 125 4.2 50 OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 15 VIN = 15V 4.1 40 ISC 30 IQ 3.9 20 Output Voltage Swing (V) 14 Short-Circuit Current (mA) Quiescent Current Per Amp (mA) QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT vs TEMPERATURE 4.0 0 Ambient Temperature (C) -55C 13 12 25C 25C 125C 85C 11 10 -10 85C 125C -11 -12 25C -13 -55C -14 3.8 10 -75 -50 -25 0 25 50 75 100 125 0 Ambient Temperature (C) 10 20 30 40 Output Current (mA) (R) OPA134/2134/4134 VIN = -15V -15 6 50 60 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25C, VS = 15V, RL = 2k, unless otherwise noted. OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION OFFSET VOLTAGE PRODUCTION DISTRIBUTION 12 18 Typical production distribution of packaged units. 14 Typical production distribution of packaged units. 10 Percent of Amplifiers (%) Percent of Amplifiers (%) 16 12 10 8 6 4 8 6 4 2 2 SMALL-SIGNAL STEP RESPONSE G =1, CL = 100pF LARGE-SIGNAL STEP RESPONSE G = 1, CL = 100pF 12.5 5V/div 11.5 10.5 9.5 8.5 7.5 6.5 5.5 4.5 3.5 2.5 0.5 -2000 -1800 -1600 -1400 -1200 -1000 -800 -600 -400 -200 0 200 400 600 800 1000 1200 1400 1600 1800 2000 Offset Voltage Drift (V/C) 50mV/div Offset Voltage (V) 200ns/div 1s/div SETTLING TIME vs CLOSED-LOOP GAIN SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE 100 60 50 0.01% 10 Overshoot (%) Settling Time (s) 1.5 0 0 0.1% 1 40 G = +1 G = -1 30 20 G = 10 10 0.1 1 10 100 0 100pF 1000 Closed-Loop Gain (V/V) 1nF 10nF Load Capacitance (R) 7 OPA134/2134/4134 APPLICATIONS INFORMATION V+ Trim Range: 4mV typ OPA134 series op amps are unity-gain stable and suitable for a wide range of audio and general-purpose applications. All circuitry is completely independent in the dual version, assuring normal behavior when one amplifier in a package is overdriven or short-circuited. Power supply pins should be bypassed with 10nF ceramic capacitors or larger to minimize power supply noise. 10nF 100k 7 8 3 10nF OPERATING VOLTAGE OPA134 series op amps operate with power supplies from 2.5V to 18V with excellent performance. Although specifications are production tested with 15V supplies, most behavior remains unchanged throughout the full operating voltage range. Parameters which vary significantly with operating voltage are shown in the typical performance curves. OPA134 6 OPA134 single op amp only. Use offset adjust pins only to null offset voltage of op amp--see text. 4 V- FIGURE 1. OPA134 Offset Voltage Trim Circuit. In many ways headroom is a subjective measurement. It can be thought of as the maximum output amplitude allowed while still maintaining a very low level of distortion. In an attempt to quantify headroom, we have defined "very low distortion" as 0.01%. Headroom is expressed as a ratio which compares the maximum allowable output voltage level to a standard output level (1mW into 600, or 0.7746Vrms). Therefore, OPA134 series op amps, which have a maximum allowable output voltage level of 11.7Vrms (THD+Noise < 0.01%), have a headroom specification of 23.6dBu. See the typical curve "Headroom - Total Harmonic Distortion + Noise vs Output Amplitude." OFFSET VOLTAGE TRIM Offset voltage of OPA134 series amplifiers is laser trimmed and usually requires no user adjustment. The OPA134 (single op amp version) provides offset trim connections on pins 1 and 8, identical to 5534 amplifiers. Offset voltage can be adjusted by connecting a potentiometer as shown in Figure 1. This adjustment should be used only to null the offset of the op amp, not to adjust system offset or offset produced by the signal source. Nulling offset could change the offset voltage drift behavior of the op amp. While it is not possible to predict the exact change in drift, the effect is usually small. DISTORTION MEASUREMENTS The distortion produced by OPA134 series op amps is below the measurement limit of all known commercially available equipment. However, a special test circuit can be used to extend the measurement capabilities. TOTAL HARMONIC DISTORTION OPA134 series op amps have excellent distortion characteristics. THD+Noise is below 0.0004% throughout the audio frequency range, 20Hz to 20kHz, with a 2k load. In addition, distortion remains relatively flat through its wide output voltage swing range, providing increased headroom compared to other audio amplifiers, including the OP176/275. R1 1 2 Op amp distortion can be considered an internal error source which can be referred to the input. Figure 2 shows a circuit which causes the op amp distortion to be 101 times greater than normally produced by the op amp. The addition of R3 to the otherwise standard non-inverting amplifier R2 SIG. DIST. GAIN GAIN R1 R2 R3 101 1k 10 11 101 100 1k 11 101 101 10 1k 1 R3 Signal Gain = 1+ OPA134 VO = 3Vrms R2 R1 Distortion Gain = 1+ R2 R1 II R3 Generator Output Analyzer Input Audio Precision System One Analyzer(1) RL 1k NOTE: (1) Measurement BW = 80kHz FIGURE 2. Distortion Test Circuit. (R) OPA134/2134/4134 8 IBM PC or Compatible configuration alters the feedback factor or noise gain of the circuit. The closed-loop gain is unchanged, but the feedback available for error correction is reduced by a factor of 101, thus extending the resolution by 101. Note that the input signal and load applied to the op amp are the same as with conventional feedback without R3. The value of R3 should be kept small to minimize its effect on the distortion measurements. Validity of this technique can be verified by duplicating measurements at high gain and/or high frequency where the distortion is within the measurement capability of the test equipment. Measurements for this data sheet were made with an Audio Precision distortion/noise analyzer which greatly simplifies such repetitive measurements. The measurement technique can, however, be performed with manual distortion measurement instruments. NOISE PERFORMANCE Circuit noise is determined by the thermal noise of external resistors and op amp noise. Op amp noise is described by two parameters--noise voltage and noise current. The total noise is quantified by the equation: Vn (total) = (i n R S )2 + e n 2 + 4 kTR s With low source impedance, the current noise term is insignificant and voltage noise dominates the noise performance. At high source impedance, the current noise term becomes the dominant contributor. Low noise bipolar op amps such as the OPA27 and OPA37 provide very low voltage noise at the expense of a higher current noise. However, OPA134 series op amps are unique in providing very low voltage noise and very low current noise. This provides optimum noise performance over a wide range of sources, including reactive source impedances, refer to the typical curve, "Voltage Noise vs Source Resistance." Above 2k source resistance, the op amp contributes little additional noise--the voltage and current terms in the total noise equation become insignificant and the source resistance term dominates. Below 2k, op amp voltage noise dominates over the resistor noise, but compares favorably with other audio op amps such as OP176. SOURCE IMPEDANCE AND DISTORTION For lowest distortion with a source or feedback network which has an impedance greater than 2k, the impedance seen by the positive and negative inputs in noninverting applications should be matched. The p-channel JFETs in the FET input stage exhibit a varying input capacitance with applied common-mode input voltage. In inverting configurations the input does not vary with input voltage since the inverting input is held at virtual ground. However, in noninverting applications the inputs do vary, and the gateto-source voltage is not constant. The effect is increased distortion due to the varying capacitance for unmatched source impedances greater than 2k. To maintain low distortion, match unbalanced source impedance with appropriate values in the feedback network as shown in Figure 3. Of course, the unbalanced impedance may be from gain-setting resistors in the feedback path. If the parallel combination of R1 and R2 is greater than 2k, a matching impedance on the noninverting input should be used. As always, resistor values should be minimized to reduce the effects of thermal noise. R1 PHASE REVERSAL PROTECTION OPA134 series op amps are free from output phase-reversal problems. Many audio op amps, such as OP176, exhibit phase-reversal of the output when the input common-mode voltage range is exceeded. This can occur in voltage-follower circuits, causing serious problems in control loop applications. OPA134 series op amps are free from this undesirable behavior even with inputs of 10V beyond the input common-mode range. POWER DISSIPATION OPA134 series op amps are capable of driving 600 loads with power supply voltage up to 18V. Internal power dissipation is increased when operating at high supply voltages. Copper leadframe construction used in OPA134 series op amps improves heat dissipation compared to conventional materials. Circuit board layout can also help minimize junction temperature rise. Wide copper traces help dissipate the heat by acting as an additional heat sink. Temperature rise can be further minimized by soldering the devices to the circuit board rather than using a socket. R2 OPA134 VOUT VIN OUTPUT CURRENT LIMIT Output current is limited by internal circuitry to approximately 40mA at 25C. The limit current decreases with increasing temperature as shown in the typical performance curve "Short-Circuit Current vs Temperature." If RS > 2k or R1 II R2 > 2k RS = R1 II R2 FIGURE 3. Impedance Matching for Maintaining Low Distortion in Non-Inverting Circuits. (R) 9 OPA134/2134/4134 PACKAGE OPTION ADDENDUM www.ti.com 28-Mar-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty 50 Green (RoHS & no Sb/Br) OPA134PA ACTIVE PDIP P 8 Eco Plan (2) TBD Lead/ Ball Finish MSL Peak Temp (3) (Requires Login) CU NIPDAU N / A for Pkg Type OPA134PA3 OBSOLETE PDIP P 8 OPA134PAG4 ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type OPA134UA ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR OPA134UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR OPA134UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR TBD Call TI Call TI OPA134UA3 OBSOLETE PDIP P 8 OPA134UAE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR OPA134UAG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR OPA2134PA ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type OPA2134PAG4 ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type OPA2134UA ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR OPA2134UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR OPA2134UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR OPA2134UAE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR OPA2134UAG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR OPA4134PA OBSOLETE PDIP N 14 OPA4134UA ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) TBD Addendum-Page 1 Call TI Call TI Samples Call TI Call TI CU NIPDAU Level-3-260C-168 HR PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 28-Mar-2012 Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) OPA4134UA/2K5 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR OPA4134UA/2K5E4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR OPA4134UAE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR SN412008DRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing OPA134UA/2K5 SOIC D OPA2134UA/2K5 SOIC OPA4134UA/2K5 SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) OPA134UA/2K5 SOIC D 8 2500 367.0 367.0 35.0 OPA2134UA/2K5 SOIC D 8 2500 367.0 367.0 35.0 OPA4134UA/2K5 SOIC D 14 2500 367.0 367.0 38.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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