© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 7
1Publication Order Number:
MC100LVEL37/D
MC100LVEL37
3.3 V ECL 1:4 ÷1/÷2 Clock
Fanout Buffer
Description
The MC100LVEL37 is a fully differential 1:4 fanout buffer. The
device offers two outputs at ÷1 of the input frequency, and two outputs
at ÷2 of the input frequency. The Low Output-Output Skew of the
device makes it ideal for distributing 1x and 1/2x frequency
synchronous signals.
The differential inputs have special circuitry which ensures device
stability under open input conditions. When both differential inputs
are left open the CLKn input will pull down to VEE, The CLKn input
will bias around VCC/2 and the Qn output will go LOW.
Features
•700 ps Typical Propagation Delays
•50 ps Maximum Output-Output Skews
•ESD Protection:
♦> 2 kV Human Body Model
♦> 200 V Machine Model
•The 100 Series Contains Temperature Compensation
•PECL Mode Operating Range: VCC = 3.0 V to 3.8 V
with VEE = 0 V
•NECL Mode Operating Range: VCC = 0 V
with VEE = −3.0 V to −3.8 V
•Internal Input Pulldown Resistors
•Qn Output will Default LOW with Inputs Open or at VEE
•Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
•Moisture Sensitivity: Level 3 (Pb-Free)
(For Additional Information, see Application Note AND8003/D)
•Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index 28 to 34
•Transistor Count = 256 Devices
•These Devices are Pb-Free, Halogen Free and are RoHS Compliant
www.onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
MARKING DIAGRAM*
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb-Free Package
SOIC−20 WB
DW SUFFIX
CASE 751D−05
20
1
100LVEL37
AWLYYWWG
ORDERING INFORMATION
Device Package Shipping†
MC100LVEL37DWG 38 Units / Tube
MC100LVEL37DWR2G 1000Tape & Reel
SOIC−20 WB
(Pb-Free)
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
SOIC−20 WB
(Pb-Free)
MC100LVEL37
www.onsemi.com
2
Figure 1. 20-Lead Pinout (Top View)
Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3
VCC CLK0 CLK0 Clk_Sel CLK1 CLK1 MR VEE
1920 18 17 16 15 14
21 34567
VEE
13
8
12
9
11
10
VCC
VCC VEE
÷1÷2
Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.
FUNCTION
ECL Differential Clock ÷1 Outputs
ECL Differential Clock ÷2 Outputs
ECL Differential Clock Inputs
ECL Input Clock Selection
ECL Asynchronous Master Reset
Positive Supply
Negative Supply
PIN
Q0, Q0; Q1, Q1
Q2, Q2; Q3, Q3
CLKn, CLKn
Clk_Sel
MR
VCC
VEE
MR
L
L
H
Clk_Sel
L
H
X
Q0, 1
CLK0/÷1
CLK1/÷1
L
X = Don’t Care
Q2, 3
CLK0/÷2
CLK1/÷2
L
Table 1. TRUTH TABLE
Table 2. PIN DESCRIPTION
Table 3. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
VCC PECL Mode Power Supply VEE = 0 V 8 to 0 V
VEE NECL Mode Power Supply VCC = 0 V −8 to 0 V
VIPECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
VI ≤ VCC
VI ≥ VEE
6 to 0
−6 to 0
V
Iout Output Current Continuous
Surge
50
100
mA
TAOperating Temperature Range −40 to +85 °C
Tstg Storage Temperature Range −65 to +150 °C
qJA Thermal Resistance (Junction to Ambient) 0 lfpm
500 lfpm
SOIC−20 WB
SOIC−20 WB
90
60
°C/W
qJC Thermal Resistance (Junction to Case) Standard Board SOIC−20 WB 30 to 35 °C/W
Tsol Wave Solder (Pb-Free) < 2 to 3 sec @ 260°C 265 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
MC100LVEL37
www.onsemi.com
3
Table 4. LVPECL DC CHARACTERISTICS (VCC = 3.3 V; VEE = 0.0 V (Note 1))
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
IEE Power Supply Current 38 50 38 55 38 55 mA
VOH Output HIGH Voltage (Note 2) 2215 2295 2420 2275 2345 2420 2275 2345 2420 mV
VOL Output LOW Voltage (Note 2) 1470 1605 1745 1490 1595 1680 1490 1595 1680 mV
VIH Input HIGH Voltage (Single-Ended) 2135 2420 2135 2420 2135 2420 mV
VIL Input LOW Voltage (Single-Ended) 1490 1825 1490 1825 1490 1825 mV
VIHCMR Input HIGH Voltage Common Mode
Range (Differential) (Note 3)
VPP < 500 mV
VPP ≥ 500 mV
1.3
1.5
2.9
2.9
1.2
1.4
2.9
2.9
1.2
1.4
2.9
2.9
V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current
CLKn
CLKn
0.5
−300
0.5
−300
0.5
−300
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with VCC. VEE can vary ±0.3 V.
2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V.
3. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V.
Table 5. LVNECL DC CHARACTERISTICS (VCC = 0.0 V; VEE = −3.3 V (Note 1))
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
IEE Power Supply Current 38 50 38 55 38 55 mA
VOH Output HIGH Voltage (Note 2) −1085 −1005 −880 −1025 −955 −880 −1025 −955 −880 mV
VOL Output LOW Voltage (Note 2) −1830 −1695 −1555 −1810 −1705 −1620 −1810 −1705 −1620 mV
VIH Input HIGH Voltage (Single-Ended) −1165 −880 −1165 −880 −1165 −880 mV
VIL Input LOW Voltage (Single-Ended) −1810 −1475 −1810 −1475 −1810 −1475 mV
VIHCMR Input HIGH Voltage Common Mode
Range (Differential) (Note 3)
VPP < 500 mV
VPP ≥ 500 mV
−2.0
−1.8
−0.4
−0.4
−2.1
−1.9
−0.4
−0.4
−2.1
−1.9
−0.4
−0.4
V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current
CLKn
CLKn
0.5
−300
0.5
−300
0.5
−300
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with VCC. VEE can vary ±0.3 V.
2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V.
3. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V.
MC100LVEL37
www.onsemi.com
4
Table 6. AC CHARACTERISTICS (VCC = 3.3 V; VEE = 0.0 V or VCC = 0.0 V; VEE = −3.3 V (Note 1))
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
fmax Maximum Toggle Frequency TBD TBD TBD GHz
tPLH
tPHL
Propagation Delay
CLK to Q/Q (Diff)
CLK to Q/Q
MR to Q
640
620
640
940
920
920
680
680
680
700
700
700
920
940
920
720
720
720
980
970
980
ps
tSKEW Within-Device Skew (Note 2)
Duty Cycle Skew (Differential Configuration)
(Note 3)
50
50
50
50
50
50
ps
tJITTER Cycle-to-Cycle Jitter TBD TBD TBD ps
VPP Input Swing (Note 4) 150 1000 150 1000 150 1000 mV
tr
tf
Output Rise/Fall Times Q (20%−80%) 280 550 280 550 280 550 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. VEE can vary ±0.3 V.
2. Within-device skew defined as identical transitions on similar paths through a device.
3. Duty cycle skew is the difference between a TPLH and TPHL propagation delay through a device.
4. VPP(min) is minimum input swing for which AC parameters guaranteed. The device has a DC gain of ≈40.
MC100LVEL37
www.onsemi.com
5
Figure 2. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices)
Driver
Device
Receiver
Device
QD
Q D
Zo = 50 W
Zo = 50 W
50 W50 W
VTT
VTT = VCC − 2.0 V
Resource Reference of Application Notes
AN1405/D −ECL Clock Distribution Techniques
AN1406/D −Designing with PECL (ECL at +5.0 V)
AN1503/D −ECLinPSt I/O SPiCE Modeling Kit
AN1504/D −Metastability and the ECLinPS Family
AN1568/D −Interfacing Between LVDS and ECL
AN1672/D −The ECL Translator Guide
AND8001/D −Odd Number Counters Design
AND8002/D −Marking and Date Codes
AND8020/D −Termination of ECL Logic Devices
AND8066/D −Interfacing with ECLinPS
AND8090/D −AC Characteristics of ECL Devices
MC100LVEL37
www.onsemi.com
6
PACKAGE DIMENSIONS
SOIC−20 WB
DW SUFFIX
CASE 751D−05
ISSUE H
20
1
11
10
b20X
H
c
L
18X A1
A
SEATING
PLANE
q
hX 45_
E
D
M
0.25 M
B
M
0.25 S
AS
B
T
eT
B
A
DIM MIN MAX
MILLIMETERS
A2.35 2.65
A1 0.10 0.25
b0.35 0.49
c0.23 0.32
D12.65 12.95
E7.40 7.60
e1.27 BSC
H10.05 10.55
h0.25 0.75
L0.50 0.90
q0 7
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF B
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
__
11.00
20X
0.52
20X
1.30
1.27
DIMENSIONS: MILLIMETERS
1
PITCH
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
RECOMMENDED
10
20 11
MC100LVEL37
www.onsemi.com
7
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
MC100LVEL37/D
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
