©2001 Fairchild Semiconductor Corporation 2N6790 Rev. B
2N6790
3.5A, 200V, 0.800 Ohm, N-Channel Power
MOSFET
The 2N6790 is an N-Channel enhancement mode silicon
gate power MOS field effect transistor designed for
applications such as switching regulators, switching
converters, motor drivers, relay drivers, and drivers for high
power bipolar switching transistors requiring high speed and
low gate drive power. This device can be operated directly
from an integrated circuit.
Features
• 3.5A, 200V
•r
DS(ON)
= 0.800
Ω
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Majority Carrier Device
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Packaging
JEDEC TO-205AF
Ordering Information
PART NUMBER PACKAGE BRAND
2N6790 TO-205AF 2N6790
NOTE: When ordering, include the entire part number.
G
D
S
SOURCE
DRAIN
(CASE)
GATE
Data Sheet December 2001
©2001 Fairchild Semiconductor Corporation 2N6790 Rev. B
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
2N6790 UNITS
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DS
200 V
Drain to Gate Voltage (R
GS
= 20k
Ω)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DGR
200 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
D
3.5 A
T
C
= 100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
D
2.25 A
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
14 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
GS
±20 V
Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
S
3.5 A
Pulse Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
SM
14 A
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
20 W
Above T
C
= 25
o
C, Derate Linearly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.16 W/
o
C
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
-55 to 150
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
pkg
300
260
o
C
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 125
o
C.
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV
DSS
I
D
= 0.25mA, V
GS
= 0V 200 - - V
Gate to Threshold Voltage V
GS(TH)
V
GS
= V
DS
, I
D
= 1.0mA 2 - 4 V
Zero-Gate Voltage Drain Current I
DSS
V
DS
= 200V, V
GS
= 0V - - 250
µ
A
V
DS
= 160V, V
GS
= 0V T
C
= 125
o
C - - 1000
µ
A
Gate to Source Leakage Current I
GSS
V
GS
=
±
20V, V
DS
= 0 - - 100 nA
Drain to Source On-Voltage (Note 2) V
DS(ON)
I
D
= 3.5A, V
GS
= 10V - - 2.8 V
Drain to Source On Resistance r
DS(ON)
I
D
= 2.25A, V
GS
= 10V - .5 0.800
Ω
I
D
= 2.25A, V
GS
= 10V T
C
= 125
o
C - - 1.5
Ω
Diode Forward Voltage V
SD
I
S
= 3.5A, V
GS
= 0V 0.7 - 1.5 V
Forward Transconductance (Note 2) g
fs
I
D
= 2.25A, V
DS
= 5V 1.5 2.25 4.5 S
Input Capacitance C
ISS
V
GS
= 0V, V
DS
= 25V
f = 1MHz
200 450 600 pF
Output Capacitance C
OSS
60 150 300 pF
Reverse-Transfer Capacitance C
RSS
15 40 80 pF
Turn-On Delay Time t
d(ON)
I
D
= 2.25A
V
GS
≅
74V, R
G
= 50
Ω
- - 40 ns
Rise Time t
r
- - 50 ns
Turn-Off Delay Time t
d(OFF)
- - 50 ns
Fall Time t
f
- - 50 ns
Safe Operating Area SOA V
DS
= 160V, I
D
= 125mA 20 - - W
V
DS
= 5.7V, I
D
= 3.5A 20 - - W
Thermal Resistance Junction to Case R
θ
JC
- - 6.25
o
C/W
Thermal Resistance Junction to Ambient R
θ
JA
Free Air Operation - - 175
o
C/W
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Reverse Recovery Time t
rr
T
J
= 150
o
C, I
SD
= 3.5A, dl
SD
/dt = 100A/µs 350 - ns
Reverse Recovered Charge Q
RR
TJ = 150
o
C, I
SD
= 3.5A, dl
SD
/dt = 100A/µs 2.3 - µC
NOTES:
2. Pulse test: pulse width
≤
300
µ
s, duty cycle
≤
2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
2N6790
©2001 Fairchild Semiconductor Corporation 2N6790 Rev. B
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
FIGURE 4. FORWARD BIAS SAFE OPERATING AREAS FIGURE 5. OUTPUT CHARACTERISTICS
TC, CASE TEMPERATURE (oC)
POWER DISSIPATION MULTIPLIER
0
0 25 50 75 100 150
0.2
0.4
0.6
0.8
1.0
1.2
125
TC, CASE TEMPERATURE (oC)
50 75 10025 150
0
ID, DRAIN CURRENT (A)
125
1
2
3
4
5
ZθJC, NORMALIZED
2
1.0
0.1
0.01
10-2
10-5 10-4 10-3 0.1 1 10
T1, RECTANGULAR PULSE DURATION (s)
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x ZθJC x RθJC + TC
PDM
t1
t2
0.01
0.5
0.2
0.1
0.05
0.02
SINGLE PULSE
THERMAL IMPEDANCE
50
10
1
0.05 1 10 100 1000
ID, DRAIN CURRENT (A)
OPERATION IN THIS AREA
LIMITED BY rDS(ON)
VDS, DRAIN TO SOURCE (V)
DC
100ms
100µs
1.0ms
10ms
10µs
0.1
TC = 25oC
TJ = MAX RATED
SINGLE PULSE
VDS, DRAIN TO SOURCE VOLTAGE (V)
25 50 750 100
0
ID, DRAIN CURRENT (A)
10V
80µs PULSE TEST
4
8V
7V
VGS = 6V
5V
4V
8
12
2N6790
©2001 Fairchild Semiconductor Corporation 2N6790 Rev. B
FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
Typical Performance Curves Unless Otherwise Specified (Continued)
VDS, DRAIN TO SOURCE VOLTAGE (V)
2468010
4
0
ID, DRAIN CURRENT (A)
10V
8V
6V
VGS = 7V
5V
80µs PULSE TEST
9V
8
12
4V
ID(ON), ON-STATE DRAIN CURRENT (A)
8
4
24 8
VGS, GATE TO SOURCE VOLTAGE (V)
12
6
16
125oC
25oC
-55oC
0
VDS > ID(ON) x rDS(ON) MAX
80µs PULSE TEST
rDS(ON), DRAIN TO SOURCE ON
ID, DRAIN CURRENT (A)
1.0
0.5
0
01015
RESISTANCE (Ω)
VGS = 20V
VGS = 10V
1.5
20
5
PULSE DURATION = 2.0µs
INITIAL TJ = 25oC
1.4
1.0
0.6
-40 0 40 120 150
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED ON RESISTANCE
2.2
0.2
80
1.8
VGS = 10V
ID = 2A
1.25
1.05
0.85
0 160
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
1.15
0.95
0.75 -40 40 80 120
BREAKDOWN VOLTAGE
VDS, DRAIN TO SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
1000
800
600
400
200
0
10
CISS
COSS
CRSS
20 30 40 50
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS = CDS + CGD
0
2N6790
©2001 Fairchild Semiconductor Corporation 2N6790 Rev. B
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Typical Performance Curves Unless Otherwise Specified (Continued)
ID, DRAIN CURRENT (A)
24 6 8010
3.75
3.0
2.25
0
1.50
gfs, TRANSCONDUCTANCE (S)
80µs PULSE TEST
0.75
TJ = 125oC
TJ = 25oC
TJ = -55oC
12 14
4.25
5.0
TJ = 150oC
IDR, REVERSE DRAIN CURRENT (A)
VSD, SOURCE TO DRAIN VOLTAGE (V)
102
10
1
01234
TJ = 25oC
TJ = 150oC
TJ = 25oC
Qg, TOTAL GATE CHARGE (nC)
4 8 12 16020
20
15
0
10
VGS, GATE TO SOURCE VOLTAGE (V)
VDS = 160V
5
VDS = 100V
VDS = 40V
ID = 7A
2N6790
©2001 Fairchild Semiconductor Corporation 2N6790 Rev. B
Test Circuits and Waveforms
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
tP
VGS
0.01Ω
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS
RL
RG
DUT
+
-
VDD
tON
td(ON)
tr
90%
10%
VDS 90%
10%
tf
td(OFF)
tOFF
90%
50%
50%
10% PULSE WIDTH
VGS
0
0
0.3µF
12V
BATTERY 50kΩ
VDS
S
DUT
D
G
IG(REF)
0
(ISOLATED
VDS
0.2µF
CURRENT
REGULATOR
ID CURRENT
SAMPLING
IG CURRENT
SAMPLING
SUPPLY)
RESISTOR RESISTOR
SAME TYPE
AS DUT
Qg(TOT)
Qgd
Qgs
VDS
0
VGS
VDD
IG(REF)
0
2N6790
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER
FAST
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
Rev. H4
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET
STAR*POWER is used under license
VCX™