1. General description
The 74LVC08A provides four 2-input AND gates.
Inputs ca n be driven from e ither 3.3 V or 5 V device s. This f eature allows the use of these
devices as translators in mixed 3.3 V and 5 V applications.
2. Features and benefits
5 V tolerant inputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115 -B ex ce eds 20 0 V
CDM JESD22-C101E exceeds 1000 V
Specifie d from 40 C to +85 C and 40 C to +125 C
3. Ordering information
74LVC08A
Quad 2-input AND gate
Rev. 7 — 19 April 2016 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74LVC08AD 40 Cto+125C SO14 plastic small outline package; 14 leads;
body width 3.9 mm SOT108-1
74LVC08ADB 40 Cto+125C SSOP14 plastic shrink small outline package; 14 leads;
body width 5.3 mm SOT337-1
74LVC08APW 40 Cto+125C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm SOT402-1
74LVC08ABQ 40 Cto+125C DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 30.85 mm
SOT762-1
© Nexperia B.V. 2017. All rights reserved
74LVC08A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 19 April 2016 2 of 15
Nexperia 74LVC08A
Quad 2-input AND gate
4. Functional diagram
5. Pinning information
5.1 Pinning
Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram for one gate
PQD
$
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PQD
PQD
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(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 4. Pin configuration SO14 and (T)SSOP14 Fig 5. Pin configuration DHVQFN14
74LVC08A
1A VCC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y
001aac945
1
2
3
4
5
6
7 8
10
9
12
11
14
13
001aac946
74LVC08A
GND(1)
Transparent top view
2Y 3A
2B 3B
2A 4Y
1Y 4A
1B 4B
GND
3Y
1A
VCC
6 9
510
411
312
213
7
8
1
14
terminal 1
index area
© Nexperia B.V. 2017. All rights reserved
74LVC08A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 19 April 2016 3 of 15
Nexperia 74LVC08A
Quad 2-input AND gate
5.2 Pin description
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care
7. Limiting values
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO14 packages: above 70 C derate linearly with 8 mW/K.
For (T)SSOP14 packages: above 60 C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 C derate linearly with 4.5 mW/K.
Table 2. Pin description
Symbol Pin Description
1A to 4A 1, 4, 9, 12 data input
1B to 4B 2, 5, 10, 13 data input
1Y to 4Y 3, 6, 8, 11 data output
GND 7 ground (0 V)
VCC 14 supply voltage
Table 3. Function selection[1]
Input Output
nA nB nY
LXL
XLL
HHH
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +6.5 V
IIK input clamping current VI < 0 V 50 - mA
VIinput voltage [1] 0.5 +6.5 V
IOK output clamping current VO > VCC or VO < 0 V - 50 mA
VOoutput voltage output HIGH or LOW-state [2] 0.5 VCC + 0.5 V
IOoutput curren t VO = 0 V to VCC -50 mA
ICC supply current - 100 mA
IGND ground current 100 - mA
Ptot total power dissipation Tamb = 40 C to +125 C[3] -500mW
Tstg storage temperature 65 +150 C
© Nexperia B.V. 2017. All rights reserved
74LVC08A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 19 April 2016 4 of 15
Nexperia 74LVC08A
Quad 2-input AND gate
8. Recommended operating conditions
9. Static characteristics
Table 5. Recommended operating con ditions
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 1.65 - 3.6 V
functional 1.2 - - V
VIinput voltage 0 - 5.5 V
VOoutput voltage output HIGH or LOW-state 0 - VCC V
Tamb ambient temperature 40 - +125 C
t/V input transition rise and fall rate VCC = 1.65 V to 2.7 V 0 - 20 ns/V
VCC = 2.7 V to 3.6 V 0 - 10 ns/V
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
VIH HIGH-level
input voltage VCC = 1.2 V 1.08 - - 1.08 - V
VCC = 1.65 V to 1.95 V 0.65 VCC - - 0.65 VCC -V
VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VIL LOW-level
input voltage VCC = 1.2 V - - 0.12 - 0.12 V
VCC = 1.65 V to 1.95 V - - 0.35 VCC -0.35 VCC V
VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VOH HIGH-level
output
voltage
VI=V
IH or VIL
IO=100 A;
VCC =1.65Vto3.6V VCC 0.2 - - VCC 0.3 - V
IO=4mA; V
CC = 1.65 V 1.2 - - 1.05 - V
IO=8mA; V
CC = 2.3 V 1.8 - - 1.65 - V
IO=12 mA; VCC = 2.7 V 2.2 - - 2.05 - V
IO=18 mA; VCC = 3.0 V 2.4 - - 2.25 - V
IO=24 mA; VCC = 3.0 V 2.2 - - 2.0 - V
VOL LOW-level
output
voltage
VI=V
IH or VIL
IO= 100 A;
VCC = 1.65 V to 3.6 V - - 0.2 - 0.3 V
IO=4mA; V
CC = 1.65 V - - 0.45 - 0.65 V
IO=8mA; V
CC = 2.3 V - - 0.6 - 0.8 V
IO=12mA; V
CC = 2.7 V - - 0.4 - 0.6 V
IO=24mA; V
CC = 3.0 V - - 0.55 - 0.8 V
IIinput leakage
current VCC = 3.6 V; VI=5.5VorGND - 0.1 5-20 A
© Nexperia B.V. 2017. All rights reserved
74LVC08A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 19 April 2016 5 of 15
Nexperia 74LVC08A
Quad 2-input AND gate
[1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb =25C.
10. Dynamic characteristics
[1] Typical values are measured at Tamb =25C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] CPD is used to determine the dynamic power dissipation (PDin W).
PD=C
PD VCC2fiN+(CLVCC2fo) where:
fi= input frequency in MHz, fo= output frequency in MHz
CL= output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
(CLVCC2fo) = sum of the outputs.
ICC supply
current VCC = 3.6 V; VI=V
CC or GND;
IO=0A -0.110 - 40A
ICC additional
supply
current
per input pin;
VCC = 2.7 V to 3.6 V;
VI=V
CC 0.6 V; IO=0A
- 5 500 - 5000 A
CIinput
capacitance VCC = 0 V to 3.6 V;
VI=GNDtoV
CC
-4.0- - -pF
Table 6. Static characteristics …continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
tpd propagation delay nA, nB to nY; see Figure 6 [2]
VCC = 1.2 V - 11 .0 - - - ns
VCC = 1.65 V to 1.95 V 0.5 4.2 9.0 0.5 10.4 ns
VCC = 2.3 V to 2.7 V 1.0 2.5 6.9 1.0 8.0 ns
VCC = 2.7 V 1.5 2.5 4.8 1.5 5.6 ns
VCC = 3.0 V to 3.6 V 1.0 2.3 4.1 1.0 4.8 ns
tsk(o) output skew time VCC = 3.0 V to 3.6 V [3] - - 1.0 - 1.5 ns
CPD power dissipation
capacitance per gate; VI=GNDtoV
CC [4]
VCC = 1.65 V to 1.95 V - 4.4 - - - pF
VCC = 2.3 V to 2.7 V - 7.7 - - - pF
VCC = 3.0 V to 3.6 V - 10.5 - - - pF
© Nexperia B.V. 2017. All rights reserved
74LVC08A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 19 April 2016 6 of 15
Nexperia 74LVC08A
Quad 2-input AND gate
11. AC waveforms
VM= 1.5 V at VCC 2.7 V
VM=0.5 VCC at VCC <2.7V
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 6. The input nA, nB to output nY propagation delays
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© Nexperia B.V. 2017. All rights reserved
74LVC08A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 19 April 2016 7 of 15
Nexperia 74LVC08A
Quad 2-input AND gate
Test data is given in Table 8. Definitions for test circuit:
RL = Load resistance
CL = Load capacitance including jig and probe capacitance
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
Fig 7. Test circuit for measuring switching times
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Table 8. Test data
Supply voltage Input Load
VItr, tfCLRL
1.2 V VCC 2 ns 30 pF 1 k
1.65 V to 1.95 V VCC 2 ns 30 pF 1 k
2.3 V to 2.7 V VCC 2 ns 30 pF 500
2.7V 2.7V 2.5 ns 50 pF 500
3.0Vto3.6V 2.7V 2.5 ns 50 pF 500
© Nexperia B.V. 2017. All rights reserved
74LVC08A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 19 April 2016 8 of 15
Nexperia 74LVC08A
Quad 2-input AND gate
12. Package outline
Fig 8. Package outline SOT108-1 (SO14)
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© Nexperia B.V. 2017. All rights reserved
74LVC08A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 19 April 2016 9 of 15
Nexperia 74LVC08A
Quad 2-input AND gate
Fig 9. Package outline SOT337-1 (SSOP14)
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© Nexperia B.V. 2017. All rights reserved
74LVC08A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 19 April 2016 10 of 15
Nexperia 74LVC08A
Quad 2-input AND gate
Fig 10. Package outline SOT402-1 (TSSOP14)
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© Nexperia B.V. 2017. All rights reserved
74LVC08A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 19 April 2016 11 of 15
Nexperia 74LVC08A
Quad 2-input AND gate
Fig 11. Package outline SOT762-1 (DHVQFN14)
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© Nexperia B.V. 2017. All rights reserved
74LVC08A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 19 April 2016 12 of 15
Nexperia 74LVC08A
Quad 2-input AND gate
13. Abbreviations
14. Revision history
Table 9. Abbreviations
Acronym Description
CDM Charged Device Mo del
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 10. Revision history
Document ID Release date Data sheet status Cha nge notice Supersedes
74LVC08A v.7 20160419 Product data sheet 74LVC08A v.6
Modifications: •Table 2: Pin description for 1A to 4A inputs and 1Y to 4Y outputs swapped (errata).
74LVC08A v.6 20111216 Product data sheet 74LVC08A v.5
Modifications: •The format of this document has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•Legal texts have been adapted to the new company name where appropriate.
•Table 4, Table 5, Table 6, Table 7 and Table 8: va lues added for lower voltage ranges.
74LVC08A v.5 20030224 Product specification - 74LVC08A v.4
74LVC08A v.4 20021030 Product specification - 74LVC08A v.3
74LVC08A v.3 20020308 Product specification - 74LVC08A v.2
74LVC08A v.2 19970630 Product specification - 74LVC08A v.1
74LVC08A v.1 19970630 Product specification - -
© Nexperia B.V. 2017. All rights reserved
74LVC08A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 19 April 2016 13 of 15
Nexperia 74LVC08A
Quad 2-input AND gate
15. Legal information
15.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status o f device(s ) described i n this docu ment may have changed since this docum ent was pub lished and ma y dif fer in case of multiple devices. The latest product statu s
information is available on the Internet at URL http://www.nexperia.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre va il.
Product specificat ion — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
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Limited warr a nty and liability — Information in this document is believed to
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Notwithstanding any damages that customer might incur for any reason
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Right to make changes — Nexperia reserves the right to make
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Applications — Applications that are described herein for any of these
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representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using Nexperia products, and Nexperia
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
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Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
© Nexperia B.V. 2017. All rights reserved
74LVC08A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 7 — 19 April 2016 14 of 15
Nexperia 74LVC08A
Quad 2-input AND gate
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
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Non-automotive qualified products — Unless this data sheet expressly
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the product is not suitable for automotive use. It i s neit her qua lif ied nor test ed
in accordance with automotive testing or application requirements. Nexperia
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In the event that customer uses the product for design-in and use in
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(a) shall use the product without Nexperia’s warranty of the
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Translations — A non-English (translated) version of a document is for
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Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respective ow ners.
16. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Nexperia 74LVC08A
Quad 2-input AND gate
17. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Functional description . . . . . . . . . . . . . . . . . . . 3
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
8 Recommended operating conditions. . . . . . . . 4
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
11 AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 6
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12
14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
16 Contact information. . . . . . . . . . . . . . . . . . . . . 14
17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release:
19 April 2016