General Description
The MAX15068 offers ORing function and hot-swap
features for two input-supply-rail applications requiring the
safe insertion and removal of circuit line cards from a live
backplane. The device integrates dual ORing MOSFET
controllers, a single hot-swap controller, electronic circuit-
breaker protection, and power monitoring in a single
package. The device is designed to operate from 2.9V to
18V supply voltages.
The device regulates the forward voltage drop across the
ORing MOSFETs to ensure smooth current transfer from
one supply to the other without oscillation. The ORing
MOSFET turns on quickly to reduce the load voltage
drop during supply switchover. If the input supply fails
or is shorted, a fast turn-off minimizes reverse-current
transients.
The device implements a foldback current limit during hot-
swap startup in order to control inrush current, thereby
lowering di/dt and keeping the operation of the hot-swap
MOSFET under safe operating area (SOA). An internal
70ms timer starts counting when the device enters the
hot-swap startup phase. After the hot-swap startup cycle
is completed, on-chip comparators provide active current-
limit protection against short-circuit and overcurrent faults.
The load is disconnected from the input quickly in the
event of a fault condition.
The device provides current monitoring from 3A to 8A
(VIN = 12V, TA = +25°C with RSENSE = 3mΩ) with ±0.5%
accuracy. A voltage proportional to the input current
delivered to the system could be read directly at the
IPMON pin.
The device is factory-calibrated to deliver accurate
overcurrent protection with ±5% accuracy. During an
overcurrent-fault condition, the device enters an autoretry
mode. The device features an adjustable slew-rate control
during startup. Additional features include power-good
and fault-indicator outputs.
The MAX15068 is available in a 20-pin, (4mm x 5mm)
TQFN package and is specified from a -40°C to +125°C
operating temperature range.
Benets and Features
●2.9V to 18V Operating Voltage Range (ORing and
Hot Swap)
●4.8V to 18V Operating Voltage Range (Current
Monitor)
●Seamless Power Transition of Redundant Supplies
●Controls n-Channel MOSFETs
●< 0.5µs Reverse Turn-Off Time
● ±0.5% Current Monitoring (Typ)
●Programmable Slew-Rate Control
● Adjustable Current-Limit Fault Delay
●Programmable Circuit-Breaker Current Threshold
●Inrush Current Regulated at Startup with
Programmable SOA Control
●Programmable Undervoltage Lockout
●Small (4mm x 5mm) TQFN Package
Applications
●Baseband Station
●Redundant Power Supplies
●Supply Holdup
●Computer Systems and Servers
●Telecom Networks
●Storage Bridge Bay
Ordering Information appears at end of data sheet.
19-6872; Rev 2; 5/18
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
EVALUATION KIT AVAILABLE
Click here for production status of specific part numbers.
IN1, IN2 to GND .......................................................-1V to +24V
PG, EN, FAULT, CSN to GND ..............................-0.3V to +24V
CSP to GND ............................Max (-0.3V, VIN_ - 0.6V) to +24V
VS to GND ............................................................... -0.3V to +6V
ON, PC, IPMON, CB, CDLY to GND ..........-0.3V to (VS + 0.3V)
CSP to CSN .........................................................-0.3V to +0.3V
OUT to GND .......................................................... -0.3V to +24V
GATE to GND ........................................................ -0.3V to +36V
GATE to OUT ........................................................-0.3V to +20V
CP1 to GND ..........................................................-0.3V to +36V
CP1 to IN1 ............................................................. -0.3V to +14V
CP2 to GND ..........................................................-0.3V to +36V
CP2 to IN2 ............................................................. -0.3V to +14V
OG1 .............................................(VIN1 - 0.3V) to (VCP1 + 0.3V)
OG2 .............................................(VIN2 - 0.3V) to (VCP2 + 0.3V)
Current into EN, PG, FAULT ..............................................20mA
Continuous Power Dissipation (TA = +70°C)
20-Pin TQFN (derate 30mW/ºC above +70°C) .........2400mW
Operating Temperature Range ......................... -40°C to +125°C
Junction Temperature ...................................................... +150°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) ....................................... +260°C
(VIN1 = VIN2 = 12V, CIN1 = CIN2 = CVS = 1µF, TA = -40°C to +125°C. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SUPPLY VOLTAGE
Input Supply Voltage VIN
Hot swap and ORing 2.9 18 V
Current monitor 4.8 18
Input Supply Current IIN 4 mA
Internal LDO Output Voltage VS4.8 5 5.25 V
VS Undervoltage Lockout VUVLO VS rising 2.5 2.65 2.8 V
VS Undervoltage-Lockout
Hysteresis VUVLO_HYS 0.07 V
CSP Undervoltage Lockout VCSP_UVLO
VCSP rising 2.4 2.49 2.58 V
VCSP falling 2.25 2.35 2.42
PACKAGE TYPE: 20-PIN TQFN
Package Code T2045+1C
Outline Number 21-0726
Land Pattern Number 90-100091
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θJA) 33.5°C/W
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
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Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
Package Information
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
(VIN1 = VIN2 = 12V, CIN1 = CIN2 = CVS = 1µF, TA = -40°C to +125°C. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
ORING
ORing MOSFET Forward
Regulation Voltage (VIN_ - VCSP)VFWD_REG
7.5 10 12.5
mV
ORing MOSFET Reverse Bias
Turn-O Voltage VREV_OFF
VIN_- VCSP, VCSP rising (VCSP > VIN_),
VOG_ goes low
-25 -20 -15
mV
ORing MOSFET Reverse Bias
Turn-On Voltage VREV_ON
VIN_ - VCSP, VCSP falling, (VIN_ > VCSP_),
VOG_ goes to forward regulation
-20 -15 -10
mV
ORing MOSFET Reverse Bias
Hysteresis Voltage VREV_HYS VREV_OF
F
- VREV_ON
5
mV
Turn-O Switch Resistance RDS_OFF VIN_- VCSP = -50mV, I = 50mA 0.8 Ω
Turn-On Switch Resistance RDS_ON VIN_- VCSP_ = 120mV, I = 70mA 2 Ω
ORing MOSFET Gate Drive
(VOG_ - VIN_)VOG
_
2.9V < VIN_< 18V 5.2 11 12 V
ORing MOSFET Fast Turn-On
Threshold VFWD_ON VIN_- VCSP rising 80 mV
ORing MOSFET Fast Turn-O VFWD_OFF VIN_- VCSP falling, VOG_ goes to forward
regulation 40 mV
ORing MOSFET Turn-On Delay tON_OG_ CGATE = 10nF, VIN_ - VCSP = +0.05V 20 µs
ORing MOSFET Turn-O Delay tOFF_OG_
CGATE = 10nF, VIN_ - VCSP = -0.05V,
VOG_ = 0.1 x (VCP_ - VIN_)300 500 ns
PC to OG2 Delay tLH_DLY VPC falling edge to VOG2 going high 40 65 µs
HOT SWAP
Circuit-Breaker Accuracy VCB_TH VCSP - VCSN
VCB = 0V 32.9 35 37.1
mVVCB = Hi-Z 47.5 50 52.5
VCB = VS61.1 65 68.9
Active Current-Limit Sense
Voltage VACL
1.3 x
V
CB_TH
mV
Fast Comparator Threshold VFC_TH VCSP - VCSN
3 x
V
CB_TH
mV
Fast Comparator Response
Time tFC_DLY VCSP - VCSN = 300mV, CGATE = 10nF
(Note 3) 160 ns
GATE O Delay tOFF_GATE
VEN high to VGATE low 20 40 µs
VON low to VGATE low 10 20
GATE Propagation Delay tON_GATE_PD VON = step 0.8V to 2V 10 20 µs
GATE Drive Voltage
(VGATE - VOUT)VGATE 2.9V < VIN_< 18V
6
11 V
GATE Pullup Current IGATE_ON VGATE - VOUT = 0V
-13
-10 -7 µA
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
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Electrical Characteristics (continued)
(VIN1 = VIN2 = 12V, CIN1 = CIN2 = CVS = 1µF, TA = -40°C to +125°C. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
GATE Pulldown Current
(Timeout) IGATE_OFF VOUT = 12V, VGATE = VOUT + 5V
350
500 650 µA
GATE Fast Pulldown Current IGATE_FAST_
OFF
VOUT = 12V, VGATE = VOUT + 5V
75
200 260 mA
HOT-SWAP FOLDBACK
Minimum CB Voltage VCB_FBMAX (VCSP - VCSN) = 12V 3 6.7 10.7 %
V
CB_TH
Minimum FB Voltage VFBMIN VCSP - VOUT, at VCB = VCB_FBMAX 1 2.1 3.2 V
Maximum FB Voltage VFBMAX VCSP - VOUT, at VCB = VCB_TH 9 10 11 V
CURRENT-SENSING INPUT
CSP Input Current ICSP VCSP = 12V 0.5 1.0 mA
CSN Input Current ICSN VCSN = 12V 100 200 400 µA
CDLY
CDLY Upper Threshold VCDLY_U VCDLY rising 1.1 1.2 1.3 V
CDLY Lower Threshold
Hysteresis VCDLY_L VCDLY falling 0.2 V
CDLY Pullup Current ICDLY_UP -135 -100 -65 µA
CDLY Pulldown Current ICDLY_DOWN 1.1 2 2.8 µA
CDLY Ratio ICDLY_RATIO 1.2 2 3.2 %
POWER-GOOD (PG)
PG Threshold OUT VPG_OUT VGATE > (5V + VOUT) 0.9 x VCSP V
PG Threshold GATE VPG_GATE VGATE - VOUT 4.2 V
PG Detection Timeout tPG_STARTUP 55 70 85 ms
PG Assertion Delay tPG_DELAY 13 16 19 ms
OUTPUTS (FAULT, PG)
FAULT, PG Output Voltage Low VOL IPG = IFAULT = 1mA 0.4 V
FAULT, PG Output Voltage High VOH IPG = IFAULT = 1µA VS - 1 VS - 0.6 V
FAULT, PG Leakage Current IOH VPG = VFAULT = 18V -1 +20 µA
FAULT, PG Pullup Current IPU VPG = VFAULT = 1.5V -13 -10 -7 µA
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
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Electrical Characteristics (continued)
(VIN1 = VIN2 = 12V, CIN1 = CIN2 = CVS = 1µF, TA = -40°C to +125°C. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
INPUTS
ON, PC, EN Turn-On Threshold VON_TH VON, VPC, VEN rising 1.1 1.22 1.32 V
ON, PC, EN Turn-On Threshold
Hysteresis VON_HYS VON, VPC, VEN falling hysteresis 70 123 180 mV
ON Fault Reset Threshold
Voltage VON_RESET VON falling 0.5 0.6 0.7 V
ON, PC Input Leakage Current ILEAK VON, VPC = 0 to 2.5V -1 +1 µA
ON, PC Clamp Voltage ISINK = 1µA 3 V
ON, PC Clamp Sink VON, VPC = 5V 300 µA
EN Pullup Current IPU VEN = 0V -13 -10 -7 µA
CB THREE-STATE INPUT
CB Input Low Current IIN_LOW VCB = 0.4V -75 µA
CB Input High Current IIN_HIGH VCB = VS - 0.2V +75 µA
CB Input Open-Current Voltage VCB_OPEN Force ±4µA into unconnected CB pin; then
measure voltage on the CB pin 1.0 VS - 1 V
CB Low Voltage VIL VCB rising 0.4 V
CB High Voltage VIH VCB falling, relative to VSVS - 0.2
CURRENT MONITORING
Current Monitor vs.
Undervoltage Lockout VIPMON_UVLO
VS rising 4.1 4.16 4.23 V
Hysteresis 0.1
IPMON Oset (Note 2) VIPMON_O
VCSP = 12V
TA = +25°C -80 +80
µV
TA = 0°C to +85°C -200 +200
TA = -40°C to +125°C -240 +240
VCSP = 4.8V
to 18V TA = -40°C to +125°C -300 +300
IPMON Gain Error (Note 2) GIM_Error
VCSP = 12V,
GlM = 71.565
TA = +25°C -0.35 0.35
%
TA = 0°C to +85°C -0.6 0.6
TA = -40°C to +125°C -0.8 0.8
VCSP = 4.8V
to 18V TA = -40°C to +125°C -0.8 0.8
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
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Electrical Characteristics (continued)
(VIN1 = VIN2 = 12V, CIN1 = CIN2 = CVS = 1µF, TA = -40°C to +125°C. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Current Monitoring Total
Accuracy (Note 3)
VIPMON_
ACCURACY
VCSP = 12V, RSENSE = 3mΩ, ILOAD = 1A,
(VCSP - VCSN) = 3mV, TA = +25°C,
VIPMON_ACCURACY = ((VIPMON -
214.7mV)/214.7mV) x 100
-3 +3
%
VCSP = 12V, RSENSE = 3mΩ, ILOAD = 3A,
(VCSP - VCSN) = 9mV, TA = +25°C,
VIPMON_ACCURACY = ((VIPMON -
644.085mV)/644.085mV) x 100
-1 +1
VCSP =12V,RSENSE = 3mΩ, ILOAD =
5A, (VCSP - VCSN) = 15mV, TA
= +25°C,
VIPMON_ACCURACY = ((VIPMON -1.073V)
/1.073V) x 100
-0.65 +0.65
VCSP = 12V, RSENSE = 3mΩ, ILOAD = 8A,
(VCSP - VCSN) = 24mV, TA = +25°C,
VIPMON_ACCURACY = ((VIPMON -
1.7175V)/1.7175V) x 100
-0.5 +0.5
CMRR (Note 4) IPMON_CMRR VCSP = 4.8V to 18V 102 dB
Output Voltage Range VIPMONMAX VCSP = 4.8V to 18V, -40°C ≤ TA ≤ +125°C 1.72 V
IPMON Voltage Clamp VIPMON_CLMP
VCSP - VCSN ≥ 36mV, VCSP = 4.8V to 18V,
-40°C ≤ TA ≤ +125°C 2.1 2.3 2.5 V
Note 1: All devices are 100% production tested at TA = +25°C. Limits over temperature are guaranteed by design.
Note 2: Gain and offset are defined as VIPMON1 = VIPMON with Vi1 = (VCSP - VCSN) = 3mV, VIPMON2 = VIPMON with Vi2 =
(VCSP - VCSN) = 24mV, GIM = (VIPMON2 - VIPMON1)/(Vi2 - Vi1), VIPMON_OS = VIPMON1 - GIM x Vi1.
Note 3: Accuracy over the entire operating range can be determined combining the specified value of the related offset and gain in
the range.
Note 4: CMRR is calculated as:
VREF = VIPMON with VCSP - VCSN = 3mV at VREF = VCSP = 12V,
VCM = VIPMON with VCSP - VCSN = 3mV at 4.8V < VCSP < 18V,
CMRR = 20 x LOG(ABS((12 - VCSP)/(VREF - VCM)) x GIM),
where GIM is the differential gain defined in the Electrical Characteristics table.
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
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Electrical Characteristics (continued)
(VIN1 = VIN2 = 12V, CIN1 = CIN2 = CVS = 1µF, RSENSE = 3mΩ, unless otherwise noted.)
0
1
2
3
4
5
6
0246810
VS(V)
ILOAD (mA)
VSLOAD REGULATION
VIN_ = 12V or 18V
VIN_ = 5V
toc02
VIN_ = 3.7V
VIN_ = 2.9V
0
2
4
6
8
10
12
020 40 60 80 100 120 140
VOG_ - VIN_ (V)
IICP_ (µA)
ORing GATE DRIVE vs. CURRENT
toc03
VIN_ = 3.7V
VIN_ = 12V
VIN_ = 18V
VIN_= 2.9V
0
2
4
6
8
10
12
14
25811 14 17
VOG_- VIN_ (V)
VIN_ (V)
ORing GATE DRIVE vs. INPUT VOLTAGE
toc04
20
40
60
80
-40 -15 10 35 60 85 110
CIRCUIT-
BREAKER TRIP VOLTAGE (mV)
TEMPERATURE (ºC)
CIRCUIT-BREAKER TRIP VOLTAGE
vs. TEMPERATURE
toc07
125
CB = GND
CB = VS
CB = Hi-Z
40
60
80
100
-40 -15 10 35 60 85 110
ACTIVE CURRENT
-LIMIT SENSE VOLTAGE (mV)
TEMPERATURE (ºC)
ACTIVE CURRENT-LIMIT SENSE VOLTAGE
vs. TEMPERATURE
toc08
125
CB = VS
CB = GND
CB = Hi-Z
0
2
4
6
8
10
12
020 40 60 80 100 120 140
VOG_ - VIN_ (V)
IIOG_ (µA)
ORing GATE VOLTAGE vs. CURRENT
toc05
VIN_ = 3.7V
VIN_ = 18V
VIN_ = 12V
VIN_ = 2.9V
0
3
6
9
12
15
0 5 10 15
VGATE - VOUT (V)
IGATE (µA)
HOT-SWAP MOSFET GATE VOLTAGE
vs. CURRENT
VIN_ = 3.7V
VIN_ = 12V or 18V
VIN_ = 5V
VOUT = VIN_
toc06
VIN_ = 2.9V
0
2
4
6
036912 15 18
IIN_ (mA)
VIN_ (V)
IN_ SUPPLY CURRENT vs. VOLTAGE
IIN2
IIN1
toc01
MAX15068 Dual ORing, Single Hot-Swap Controller with
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Typical Operating Characteristics
(VIN1 = VIN2 = 12V, CIN1 = CIN2 = CVS = 1µF, RSENSE = 3mΩ, unless otherwise noted.)
-20
-15
-10
-5
0
5
0246810 12
IPMON OUTPUT ACCURACY (%)
CURRENT (A)
IPMON OUTPUT ACCURACY
(TA= +85ºC) toc15
VIN_ = 4.5V
VIN_ = 12V
VIN_ = 18V
VIN_ = 4.5V
VIN_ = 12V or 18V
-20
-15
-10
-5
0
5
0246810 12
IPMON OUTPUT ACCURACY (%)
CURRENT (A)
IPMON OUTPUT ACCURACY
(TA= +125ºC) toc16
VIN_ = 4.5V
VIN_ = 18V
VIN_ = 12V
VIN_ = 4.5V
VIN_ = 12V or 18V
0.01
0.1
1
10
100
050 100 150 200 250 300
ACTIVE CURRENT-LIMIT DELAY (µs)
SENSE VOLTAGE (VCSP - VCSN) (mV)
ACTIVE CURRENT-LIMIT DELAY
vs. SENSE VOLTAGE
toc09
CB = VS
CB = GND
CB = Hi-Z
0
10
20
30
40
50
0246810
OUTPUT LOW VOLTAGE (mV)
CURRENT (mA)
PG, FAULT OUTPUT LOW VOLTAGE
vs. CURRENT toc10
40
60
80
100
120
140
-40 -15 10 35 60 85 110
CDLY PULLUP CURRENT (µA)
TEMPERATURE (ºC)
CDLY PULLUP CURRENT
vs. TEMPERATURE
toc11
125
0
5
10
15
20
-40 -15 10 35 60 85 110
GATE PULLUP CURRENT (µA)
TEMPERATURE (ºC)
GATE PULLUP CURRENT
vs. TEMPERATURE
toc12
125 -20
-15
-10
-5
0
5
0246810 12
IPMON OUTPUT ACCURACY (%)
CURRENT (A)
IPMON OUTPUT ACCURACY
(TA= -40ºC) toc13
VIN_ = 4.5V
VIN_ = 12V
VIN_ = 18V
VIN_ = 4.5V
VIN_ = 18V
VIN_ = 12V
-20
-15
-10
-5
0
5
0246810 12
IPMON OUTPUT ACCURACY (%)
CURRENT (A)
IPMON OUTPUT ACCURACY
(TA= +25ºC) toc14
VIN_ = 4.5V
VIN_ = 12V
VIN_ = 18V VIN_ = 4.5V
VIN_ = 12V or 18V
MAX15068 Dual ORing, Single Hot-Swap Controller with
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Typical Operating Characteristics (continued)
(VIN1 = VIN2 = 12V, CIN1 = CIN2 = CVS = 1µF, RSENSE = 3mΩ, unless otherwise noted.)
OUT SHORT-CIRCUIT RESPONSE
10V/div
20V/div
10V/div
toc23
40µs/div
VIN1
VOUT
VGATE
IIN1 10A/div
AUTORETY WAVEFORM
10V/div
20V/div
10V/div
toc24
200ms/div
VIN1
VOUT
VGATE
IOUT
20A/div
STARTUP WAVEFORM
(VIN = 2.9V)
2V/div
5V/div
5V/div
toc17
40ms/div
VIN1
VOG1
VGATE
STARTUP WAVEFORM
(VIN = 12V)
5V/div
5V/div
10V/div
toc18
40ms/div
VIN1
VOG1
VGATE
STARTUP WAVEFORM
(VIN = 18V)
10V/div
10V/div
10V/div
toc19
40ms/div
VIN1
VOG1
VGATE
OVERCURRENT-FAULT WAVEFORM
(CB = GND)
10V/div
20V/div
10V/div
toc20
200µs/div
VIN1
VGATE
VOUT
IOUT 20A/div
OVERCURRENT-FAULT WAVEFORM
(CB = Hi-Z)
10V/div
20V/div
10V/div
toc21
200µs/div
VIN1
VGATE
VOUT
IOUT 20A/div
OVERCURRENT-FAULT WAVEFORM
(CB = VS)
10V/div
20V/div
10V/div
toc22
200µs/div
VIN1
VGATE
VOUT
IOUT
20A/div
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
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Typical Operating Characteristics (continued)
PIN NAME FUNCTION
1 CSN Input Current Sense Negative Input
2 CSP Input Current Sense Positive Input
3 IN1 Positive Supply 1 Input and MOSFET Gate Drive Return
4 VSInternal Regulator Output. Bypass VS to GND with a 1μF capacitor.
5GND Ground
6 IN2 Positive Supply 2 Input and MOSFET Gate Drive Return
7 OG2
ORing MOSFET 2 Gate Control Output. Connect this pin to the gate of an external n-channel
MOSFET for ideal diode control. The gate voltage is limited to approximately 11V above and a diode
voltage below IN2. During fast turn-on, a 1A pullup switch charges OG2 from CP2. During fast turn-
o, a 3A pulldown switch discharges OG2 to IN2.
8 CP2
Charge Pump 2 Output. Connect a capacitor from CP2 to IN2 pin. The value of this capacitor should
be approximately 10x the gate capacitance (CISS) of the external MOSFET for ORing diode control.
The charge stored on this capacitor is used to pull up the gate during a fast turn-on.
9 IPMON Analog Current Monitor Output Signal. Connect a 560pF/6.3V ceramic capacitor from IPMON to GND.
TQFN
(4mm × 5mm)
TOP VIEW
MAX15068
EP
+
OG1
CP1
GATE
OUT
7 8 910
1CSN
2CSP
3IN1
4VS
5
GND
6IN2
16 CB
15 ON
14 EN
13 CDLY
12 PC
11 FAULT
OG2
CP2
IPMON
PG
20 19 18 17
MAX15068 Dual ORing, Single Hot-Swap Controller with
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Pin Conguration
Pin Description
PIN NAME FUNCTION
10 PG
Power Status Output. Open-drain output that is normally pulled high by a 10µA current source to
a diode below VS. PG can be pulled above VS using an external pullup. PG pulls low when the
MOSFET gate drive between GATE and OUT exceeds the gate-to-source volt age of 4.2V and VOUT
is greater than 90% of VCSP. Leave PG unconnected if unused.
11 FAULT
Fault Status Output. Open-drain output that is normally pulled high by a 10µA current source to a
diode below VS. FAULT can be pulled above VS using an external pullup. FAULT pulls low when the
circuit breaker is tripped after an overcurrent fault timeout. Leave FAULT unconnected if unused.
12 PC
Priority Control Input. When low, it enables the external ideal diode MOSFET in the IN2 supply path
and a high turns it o. Connect PC to an external resistive divider from IN1 to make IN1 the higher
priority input supply when IN1 and IN2 are equal. Connect PC to GND if not used.
13 CDLY
Timer Capacitor Terminal. Connect a capacitor between CDLY and GND to set 12ms/µF duration
for current limit before the external hot-swap MOSFET is turned o. The duration of the o-time is
600ms/µF, resulting in a 2% duty cycle.
14 EN
Enable Input. Connect EN to GND to enable hot-swap control. If EN is pulled high, the hot-swap
MOSFET is not allowed to turn on. A 10µA current source pulls up EN to a diode below VS. Upon
EN going low when ON is high, an internal timer provides a 100ms startup delay for debounce, after
which the fault is cleared.
15 ON
On Control Input. When above 1.2V, it turns on the external hot-swap MOSFET and when below
1.1V, it turns it o. Connect ON to an external resistive divider from CSP to monitor the supply
undervoltage condition. Pulling voltage of ON pin below 0.6V resets the electronic circuit
breaker.
16 CB Current-Limit Threshold Setting. Connect the CB pin to VS, GND, or leave CB unconnected to set
the circuit-breaker threshold. See Table 1 for details.
17 OUT Load Output. Connect OUT to the source of the external hot-swap MOSFET.
18 GATE
Hot-Swap MOSFET Gate Drive Output. Connect this pin to the gate of the external n-channel
MOSFET for hot-swap control. An internal 10µA current source charges the MOSFET gate. An
internal clamp limits the gate voltage to 11V above OUT and a diode voltage below OUT. During
turn-o, a 500µA pulldown current discharges GATE to ground. During an output short to ground, a
fast 200mA pulldown current discharges GATE to OUT.
19 CP1
Charge Pump 1 Output. Connect a capacitor from CP1 to IN1 pin. The value of this capacitor should
be 10x or greater than the gate capacitance of the external MOSFET for ideal diode control. The
charge stored on this capacitor is used to pull up the gate during a fast turn-on.
20 OG1
ORing MOSFET 1 Gate Control Output. Connect OG1 to the gate of an external n-channel MOSFET
for ideal diode control. The gate voltage is set to approximately 11V above and a diode voltage
below IN1. During fast turn-on, a 1A pullup switch charges OG1 from CP1. During fast turn-o, a 3A
pulldown switch discharges OG1 to IN1.
— EP Exposed Pad. Connect EP to the ground plane to provide a low thermal resistance path from the IC
junction to the PCB. Do not use EP as an electrical connection to GND.
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
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│
11
Pin Description (continued)
LOGIC CONTROL
V
CB
0.9 x V
CSP
PG
GATE_OK
GATE
ON
V
S
PC
MAX15068 - CURRENT MONITOR
GATE ON
FAULT RESET
EN
CARD PRESENT
CDLY
GND
GATE
V
S
LDO
REGULATOR
REFERENCE
GENERATOR
1.2V
IN1
CP1
+
GATE
DRIVER
+
CHARGE
PUMP 2
+
CIRCUIT BREAKER
IPMON
OUT
FAULT
OVERCURRENT
VS
10mV
10µA
UV2
65mV
VCB
CB
MAX15068
OG1
VS
V
S
CHARGE
PUMP 3
10µA
CP2
OG2
+
-
10mV
2.49V
1.2V
+0.6V
V
S
100µA
1.2V
+0.2V
10µA10µA
+
-
+
-
+
-
+
-50mV 35mV
CSP CSN IN2
CHARGE
PUMP 1
V
S
+
-
+
-
1.3 x V
CB
UV1
2.65V
2µA
1.2V
1.2V
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
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│
12
Functional Diagram
Detailed Description
Startup
When input voltage is applied to IN_, CSP comes up to
one diode below the higher of IN1 or IN2. The internal
LDO regulator powers VS from the higher of two inputs as
well. When both VS and CSP reach their respective UVLO
thresholds, the internal charge pumps (CP1 or CP2)
for the ORing controller start operating. An internal time
starts when both ON is above its threshold and EN is
below its threshold. After the timer counts 85ms, the
ORing control (OG1 or OG2) begins operating. After
another 15ms have elapsed, the hot-swap control (GATE)
also starts operating.
ORing Control
ORing Control in Startup
During a normal power-up, the ORing MOSFETs turn
on first. As soon as the internally generated supply,
VS, rises above its undervoltage lockout threshold, the
internal charge pump is allowed to charge up the CP_
pins. Because the ideal diode MOSFETs are connected
in parallel as a diode-OR, the CSP pin voltage selects
the highest of the supplies at the IN1 and IN2 pins. The
MOSFET associated with the lower input supply voltage is
turned off by the corresponding gate drive amplifier.
At power-up the CP_ and OG_ pin voltages are at the
IN_ voltage level. CP_ starts ramping up after VS clears
its undervoltage lockout level. Afterward, OG_ ramps up
with CP_.
The gate drive amplifier monitors the voltage between the
IN and CSP pins and drives the respective OG_ pin.
If the amplifier senses a forward voltage drop greater than
80mV between IN and CSP then the OG_ pin is pulled to
CP to quickly turn on the MOSFET. If the amplifier senses
a reverse voltage drop greater than 10mV between CSP
and IN_, then the OG_pin is pulled to IN_ to quickly turn
off the MOSFET. With the ideal diode MOSFETs acting as
an input supply diode-OR, the CSP pin voltage rises to the
highest of the supplies at the IN1 and IN2 pins. The stored
charge in an external capacitor connected between the
CP_ and IN_ pins provides the charge needed to quickly
turn on and off the ideal diode MOSFET. An internal charge
pump charges the external capacitors at the CP pins.
The OG_ pin sources current from the CP_ pin and sinks
current into the IN_ and GND pins.
ORing MOSFET Regulation Mode
When the ideal diode MOSFET is turned on, the gate
drive amplifier controls OG_ to servo the forward voltage
drop (VIN - VCSP) across the MOSFET to 10mV. If the
load current causes more than 10mV of voltage drop,
across the FET, then the OG voltage rises to enhance the
MOSFET. For large output currents, the MOSFET’s gate
is driven fully on and the voltage drop is equal to ILOAD x
RDS(ON) of the MOSFET.
Hot-Swap Control
Hot-Swap in Startup
Once the output is enabled, the device provides controlled
application of power to the load. The voltage at OUT
begins to rise until the internal selected final maximum
current limit is reached, which is programmed through the
CB pin (Table 1). The low limit is approximately 1/12th of
the upper limit as shown in Figure 1. Once the power-
good threshold is achieved, the normalized hot-swap
electronic circuit-breaker (ECB) threshold goes to its full
value.
An external capacitor connected to the GATE pin allows
the user to program the slew rate to a value lower than the
default. During startup, a foldback current limit is active to
protect the external hot-swap MOSFET to operate within
the SOA (Figure 1).
An internal timer is activated to count for 70ms, which is
the maximum time duration for the startup phase. The
startup phase is completed when the voltage at OUT rises
above the power-good threshold (0.9 x VCSP typical)
and hot-swap GATE to OUT voltage exceeds 4.2V even
though the 70ms timeout has not yet elapsed.
Programmable Speed Circuit-Breaker Response
on Hot-Swap MOSFET
The device features an adjustable current limit with
circuit-breaker function that protects the external
MOSFETs against short circuits or excessive load current.
The voltage across the external sense resistor (RSENSE)
is monitored by an electronic circuit breaker (ECB) and
Figure 1. Inrush Current vs. Voltage Drop Across the Hot-Swap
Switch During Startup Period
Figure 1
VCB NORMALIZE
THRESHOLD
0.6
0.5
0.4
0.3
0.2
0.1
2V 10V 12V
VCSN - VOUT
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
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│
13
active current limit amplifier (ACL). The electronic circuit
breaker turns off the hot-swap MOSFET with a 500µA
current from GATE to OUT if the voltage across the sense
resistor exceeds VCB_TH (ECB) for longer than the fault
filter delay configured at the CDLY pin. Active current
limiting begins when the sense voltage exceeds the ACL
threshold VACL (ACL) (which is 1.3x the ECB threshold).
The gate of the hot-swap MOSFET is brought under
control by the ACL amplifier and the output current is
regulated to maintain the ACL threshold across the sense
resistor. At this point, the fault filter starts the timeout
with a 100µA current charging the CDLY pin capacitor.
If the CDLY pin voltage exceeds its threshold (1.2V), the
external MOSFET is turned off and the FAULT pin pulls
low.
After the hot-swap MOSFET turns off, the CDLY pin
capacitor is discharged with a 2µA pulldown current until
it reaches 0.2V. This is followed by a cool-off period of
14 timing cycles at the CDLY pin. For the autoretry part,
the latched fault is cleared automatically at the end of the
cool-off period and the GATE pin restarts charging up the
gate of the MOSFET.
In the event of a severe short-circuit fault on the 12V
output, the output current can surge to tens of amperes.
The device responds within 1µs to bring the current under
control by pulling the GATE to OUT voltage down with a
200mA current. Almost immediately, the gate of the hot-
swap MOSFET recovers rapidly due to the RGATE and
CGATE network, and load current is actively limited until
the electronic circuit breaker times out. Due to parasitic
supply lead inductance, an input supply without any bypass
capacitor may collapse during the high current surge and
then spike upwards when the current is interrupted.
Circuit-Breaker Comparator and Current Limit
The device features a programmable circuit-breaker
threshold. The current limit can be selected by the
connection of the CB pin. During startup, a foldback
current limit is active to protect the internal MOSFET to
operate within the SOA (Figure 1).
Programmable Circuit-Breaker Current Threshold
The device features a programmable current limit with
circuit-breaker function that protects the external
MOSFETs against short circuits or excessive load current.
The voltage across the external sense resistor, (RSENSE)
is monitored by an electronic circuit breaker (ECB) and
active current limit (ACL) amplifier. Connect the CB pin to
GND, VS, or leave unconnected to select the electronics
circuit-breaker threshold (Table 1).
The electronic circuit breaker turns off the hot-swap
MOSFET with a 500µA current from GATE to GND if the
voltage across the sense resistor exceeds VCB_TH (CB)
(50mV) for longer than the fault filter delay configured at
the CDLY pin.
Timer (CDLY)
An external capacitor connected from the CDLY pin to
GND serves as fault filtering when the supply output is in
active current limit. When the voltage across the sense
resistor exceeds the circuit-breaker trip threshold (50mV),
CDLY pulls up with 100µA. Otherwise, it pulls down
with 2µA. The fault filter times out when the 1.2V CDLY
threshold is exceeded, causing the corresponding FAULT
pin to pull low. The fault filter delay or circuit-breaker time
delay is:
tCB = CCDLY x 12[ms/µF]
After the circuit-breaker timeout, the CDLY pin capacitor
pulls down with 2µA from the 1.2V CDLY threshold until
it reaches 0.2V. Then it completes 14 cooling cycles
consisting of the CDLY pin capacitor charging to 1.2V
with a 100µA current and discharging to 0.2V with a 2µA
current. At that point, the GATE pin voltage is allowed to
start up if the fault has been cleared as described in the
Resetting Faults section. When the latched fault is cleared
during the cool-off period, the corresponding FAULT pin
pulls high. The total cool-off time for the MOSFET after an
overcurrent fault is:
tCOOL = CCDLY x 7.13[s/µF]
ORing/Hot-Swap Response in Overload
Condition
In the case where an overcurrent fault occurs on the output,
the current is limited to a programmed current limit set
through the CB pin. After a fault filter delay set by 100µA
current source in to the CDLY pin capacitor, the circuit
breaker trips, pulls the GATE pin low, and turns off the hot-
swap MOSFET. The FAULT output is latched low. During
the fault condition, the ORing MOSFET remains on.
Control Inputs
ON Input
The device drives the OG_ as soon as the VIN1 - VF1
(VF1 is the forward voltage drop of ORing MOSFET
connected to IN1) or VIN2 - VF2 (VF2 is the forward
voltage drop of the ORing MOSFET connected to IN2)
supply voltage generates a VON above the threshold
voltage. An external resistive divider from CSP to ON
and ground is used to set the turn-on voltage to any
desired voltage from 2.9V to 5.5V. The IC turns on the
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
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│
14
corresponding ORing MOSFET and then turns on the hot-
swap MOSFET when VON > 1.22V.
The device turns off the output when VON falls below
VUV_REF (1.22V - VON_HYS). An external resistive
divider from CSP to ON and ground is used to set
the undervoltage-lockout threshold to any desired level
between VUVLO and 18V. Pulling the ON pin voltage
below 0.6V resets the electronic circuit breaker.
Monitoring
Analog Current Monitor Output
IPMON monitors the system input current and provides
the best accuracy when VIPMON is less than 1.7V. For
best performance, add a 560pF/6.3V ceramic capacitor
between IPMON and GND.
The voltage at IPMON (VIPMON) is proportional to the
input current (VSYS) given by the following equation:
VIPMON = GIM x ISYS x RSENSE
where GIM = 71.565, a fixed voltage gain.
Adding an RC network at the IPMON output (Figure 2)
allows the overall VIPMON gain (G) to be adjusted per the
following equation:
G = GIM x R2/(R1+R2)
where R1 = 20kΩ, C1 = 560pF, and C2 = 1nF. The
resistive-divider equivalent resistance R1||R2 needs to be
carefully selected, as it affects accuracy due to the input
bias current of the system readout.
Output Signals
Fault Status Output (FAULT)
FAULT is an open-drain output that is internally pulled high
by a 10µA current source to a diode below VS, and can be
pulled above VS using an external pullup. FAULT asserts
low when the circuit breaker is tripped after an overcurrent
fault timeout. Leave FAULT unconnected if unused.
Power-Good Output (PG)
Internal circuitry monitors the hot-swap MOSFET gate
overdrive between the GATE and OUT pins and the
voltage at the OUT pin. The power-good status for the
supply is reported by the PG open-drain output. It is
normally pulled high by an external pullup resistor or
the internal 10µA pullup. The power-good output asserts
low when the gate overdrive exceeds 4.2V during the
GATE startup and the voltage at the OUT pin exceeds
(0.9 x VCSP). The PG signal is delayed by 16ms once
conditions for power-good are met.
Fault Management
Autoretry
When an overcurrent fault is latched after tripping the
circuit breaker, the FAULT pin is asserted low. Only the
hot-swap MOSFET is turned off, and the ideal diode
MOSFETs are not affected. The latched fault is reset
automatically after a cool-off timing cycle as described
in the Timer (CDLY) section. At the end of the cool-off
period, the fault latch is cleared and FAULT pulls high.
The GATE pin voltage is allowed to start up and turn on
the hot-swap MOSFET. If the output short persists, the
supply powers up into a short with active current limiting
until the circuit breaker times out and FAULT again pulls
low. A new cool-off cycle begins with CDLY ramping down
with a 2µA current. The whole process repeats itself until
the output short is removed. Since tCB and tCOOL are a
Table 1. Electronics Circuit-Breaker Threshold Programming
Figure 2. External RC Network to Adjust VIPMON
CB PIN CONNECTION ELECTRONIC CIRCUIT-BREAKER THRESHOLD (VCSP - VCSN) [mV]
CB = GND 35
CB = Hi-Z (unconnected) 50
CB = VS65
V
IPMON
R1
C1 R2 C2
TO SYSTEM
Figure 2
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
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│
15
function of CDLY capacitance, CCDLY, the autoretry duty
cycle is equal to 0.1%, irrespective of CCDLY.
Applications Information
Prioritizing Supplies with PC
Figure 2 shows an ORing application where a resistive
divider connected from IN1 at the PC pin controls the turn-
on of the ORing MOSFET, MD2, in the IN2 supply path.
When the IN1 supply voltage falls below 4.5V, it turns on
the ORing MOSFET, MD2, causing the ORing output to be
switched from the main 5.0V supply at IN1 to the auxiliary
5.0V supply at IN2. This configuration permits the load
to be supplied from a lower IN1 supply as compared to
IN2 until IN1 falls below the MD2 turn-on threshold. The
threshold value used should not allow the IN1 supply to
be operated at more than one diode voltage below IN2.
Otherwise, MD2 conducts through the MOSFET’s body
diode. The resistive divider connected from CSP at the
ON pin provides the undervoltage threshold of 2.6V for
the ORing output supply.
Figure 3. Plug-in Card IN1 Supply Controls the IN2 Supply Turn-On through the PC Pin
Figure 3
CP1 IN1 OG1 CP2 IN2 OG2 CSP CSN GATE
ON
EN
OUT
FAULT
PG
PC V
S
GND CDLY
CB
5V
5V 5V
IPMON
R
SENSE
MAX15068
0.003Ω
20kΩ
120kΩ
20kΩ
69.8kΩ
MD1
MD2
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
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│
16
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
PART OPERATING RANGE FUNCTION TEMP RANGE PIN-PACKAGE
MAX15068ATP+ 2.9V to 18V Autoretry, Current Monitor -40°C to +125°C 20 TQFN-EP*
CP1 IN1 OG1 CP2 IN2 OG2 CSP CSN GATE
ON
EN
OUT
FAULT
PG
V
S
GND CDLY
12V
12V 12V
IPMON
R
SENSE
MAX15068
0.003Ω
20kΩ
137kΩ
PC
CB
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
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│
17
Typical Application Circuit
Chip Information
PROCESS: BiCMOS
Ordering Information
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 12/13 Initial release —
1 2/16
Customer test spec changes: Updated General Description, Benets and
Features, Electrical Characteristics table; replaced TOC2–TOC6, TOC17,
and changed TOC13–TOC16 titles in Typical Operating Characteristics
section; updated IPMON pin 9 function in Pin Description table; updated
2nd equation in Timer (CDLY) section; replaced Analog Current Monitor
Output section, adding a new Figure 2; renumbered and replaced new
Figure 3 and replaced Typical Application Circuit; updated operating range
in Ordering Information table
1–9, 13–16
2 5/18 Updated the Package Information table. 2
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
MAX15068 Dual ORing, Single Hot-Swap Controller with
Accurate Current Monitoring
© 2018 Maxim Integrated Products, Inc.
│
18
Revision History
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
