LMX2541 Family
Ultra Low Noise Frequency Synthesizer with
Integrated VCO
Evaluation Board Operating Instructions
National Semiconductor Corporation
High Speed Signal Path Division
Precision Timing Devices
12-4-2009
TABLE OF CONTENTS
LOOP FILTER VALUES ...................................................................................6
CODELOADER SETUP....................................................................................7
SPURS.......................................................................................................10
LMX2541SQ2060E DEFAULT SETUP AND MEASURED PERFORMANCE..........13
LMX2541SQ2380E DEFAULT SETUP AND MEASURED PERFORMANCE..........16
LMX2541SQ2690E DEFAULT SETUP AND MEASURED PERFORMANCE..........19
LMX2541SQ3030E DEFAULT SETUP AND MEASURED PERFORMANCE..........22
LMX2541SQ3030E VCO PHASE NOISE.....................................................24
LMX2541SQ3320E DEFAULT SETUP AND MEASURED PERFORMANCE..........25
LMX2541S3320E SPURS FOR WORST CASE CHANNELS..........................26
LMX2541SQ3320E VCO PHASE NOISE.....................................................27
LMX2541SQ3740E DEFAULT SETUP AND MEASURED PERFORMANCE..........28
LMX2541S3740E SPURS FOR WORST CASE CHANNELS..........................29
LMX2541SQ3740E VCO PHASE NOISE.....................................................30
BILL OF MATERIALS.....................................................................................31
NO COMPONENTS ARE ASSEMBLED ON THE BOTTOM LAYER IN THE DEFAULT
SETUP.SCHEMATIC ......................................................................................33
SCHEMATIC ................................................................................................34
BOARD LAYER STACKUP .............................................................................35
QUICK SETUP
Laptop or PC
RFout uWire
3.4 V
Phase
Noise
Analyzer
LMX2541
Do Not Connect
RFout
Connect to a spectrum analyzer or phase noise analyzer. The Agilent E5052A was used for these
instructions.
Vcc
Connect to a 3.4 volt low noise power supply
uWire
Connect to a computer with CodeLoad er software
ExtVCOin
This is not used in the default setup, but is included to support the use of a n external VCO.
In Full Chip Mode, this device h as an on-chip VC O.
Ftest/LD
The LED is to ensure that the part is locked. T his output can be very useful for diagno stic purposes
OSCin/OSCin*
This is not used in the default setup, but is included to support the use of an external OSCin signal.
The board includes a 100 MHz TCXO, which has two varieties. The OSCin signal is absolutely critical
for the phase noise and spur per formance of the L MX2541.
Manufacturer Model Frequency Comments
Connor
Winfield CWX-813 100 MHz Good phase noise
Low Cost
Drifts a lot.
Crystek CVPD920 100 MHz
Good Phase Noise
Drifts much less
High Cost
National
Semiconductor
LMK01000
LMK02000
LMK03000
LMK04000
Any Eliminate drift issues
Potentially the best phase noise
Best for fractional spurs
Be very aware of the TCXO drift and the contribution that it can have to phase noise. Termination of
the TCXO has a large im pact on f ractional spurs a s well. The best resu lts can be achiev ed by driving
this board with an LMK01000 LVPECL output. Doing so results in about a 4 dB spur improvement.
Loop Filter Values
Parameter LMX2541
SQ2060E LMX2541
SQ2380E LMX2541
SQ2690E LMX2541
SQ3030E LMX2541
SQ3320E LMX2541
SQ3470E
VCO Frequency
(MHz) 1990 –
2240 2200 -
2530 2490 –
2865 2810 -
3230 3130 -
3600 3480 -
4000
VCO Gain
(MHz/V) 13-23 16-30 17-32 20-37 21-37 27 - 42
Charge Pump
Gain (mA) 3.2 3.2 3.2 3.2 3.2 3.2
Phase Detector
Frequency (MHz) 25 25 25 25 25 25
OSCin Frequency
(MHz) 100 100 100 100 100 100
Loop Bandwidth
(kHz) 37.3 –
54.6 40.8 –
61.7 38.7 –
58.6 40.0 –
59.9 38.1 –
54.7 43.1 –
55.7
Phase Margin
(deg) 52.7 –
52.8 53.1-
52 52.9 –
52.4 53.0 –
52.2 52.8 –
52.8 53.2 –
52.7
C1_LF (nF) 2.2 2.2 2.2 2.2 2.2 2.2
C2_LF (nF) 22 22 22 22 22 22
R2_LF (Kohm) 0.47 0.47 0.47 0.47 0.47 0.47
C3_LF (Internal)
(nF) 0.02 0.02 0.02 0.02 0.02 0.02
C4_LF (Internal)
(nF) 0.1 0.1 0.1 0.1 0.1 0.1
R3_LF (Internal)
(Kohm) 1 1 1 1 1 1
R4_LF (Internal)
(Kohm) 0.2 0.2 0.2 0.2 0.2 0.2
* Note that the VCO gai n do es change a fair am ount. Althou gh n ot demonst rated i n these instructi ons, the charge p ump
gain could be adj usted to a ccount for this v ariation.
CodeLoader Setup
Select the part. In this case, it is the LMX2 541SQ3320E.
Choose the correct startup mode. This is determined by the part option.
Load the part. You can load it from the menu or also pre ss Cntrl + L.
On the Port Setup tab, the user may select the type of communication port (USB or Parallel) that will be
used to program the device on the evaluation board. If parallel port is selected, the user should ensure
that the correct port address is entered.
The Pin Configuration field is hardware dependent and normally SHOULD NOT be changed by the user.
The evaluation board is typically shipped with a parallel port cable that is used to interconnect the board
to a PC LPT port, enabling the board to be programmed.
Separately available is a USB2UWIRE-IFACE board which simplifies evaluation by enabling the user to
establish a USB connection from the Codeloader 4 software to the evaluation board.
http://www.national.com/store/view_item/index.html?nsid=USB2UWIRE-IFACE
To view the function of any bit on the CodeLoader configuration tabs, place the cursor over the desired
bit register label and click the right mouse button on it for a description. This Bits/Pins configuration is
common to all options of the LMX2541 evaluation board.
S purs
Oscillator Spurs
Oscillator spurs occur at the oscillator frequency (100 MHz) offset from the carrier. They can be largely
impacted by the board layout. These were taken in 25 MHz increments.
-120
-115
-110
-105
-100
-95
-90
-85
-80
-75
-70
1975
2000
2025
2050
2075
2100
2125
2150
2175
2200
2225
2250
2275
2300
2325
2350
2375
2400
2425
2450
2475
2500
2525
2550
2575
2600
2625
2650
2675
2700
2725
2750
2775
2800
2825
2850
2875
2900
2925
2950
2975
3000
3025
3050
3075
3100
3125
3150
3175
3200
3225
3250
3275
3300
3325
3350
3375
3400
3425
3450
3475
3500
3525
3550
3575
3600
3625
3650
3675
3700
3725
3750
3775
3800
3825
3850
3875
3900
3925
3950
3975
4000
2060E
2380E
2690E
3030E
3320E
3740E
gp
Frequency
Option
Reference (Phase Detector) Spurs
Reference spurs occur at a multiple of the p hase detector frequ ency (25 MHz) from the carrier
-120
-115
-110
-105
-100
-95
-90
-85
-80
-75
-70
1975
2000
2025
2050
2075
2100
2125
2150
2175
2200
2225
2250
2275
2300
2325
2350
2375
2400
2425
2450
2475
2500
2525
2550
2575
2600
2625
2650
2675
2700
2725
2750
2775
2800
2825
2850
2875
2900
2925
2950
2975
3000
3025
3050
3075
3100
3125
3150
3175
3200
3225
3250
3275
3300
3325
3350
3375
3400
3425
3450
3475
3500
3525
3550
3575
3600
3625
3650
3675
3700
3725
3750
3775
3800
3825
3850
3875
3900
3925
3950
3975
4000
2060E
2380E
2690E
3030E
3320E
3740E
gp
Frequency
Option
Fractional Spurs
In-band spurs occur inside the loop bandwidth. These spurs were measured with a WORST CASE fraction
of 1/5000. The primary fractional spurs are at 5 kHz and the sub-fractional spurs are at 2.5 kHz. The actual
frequency is the frequency in the chart plus 5 kHz.
-70
-65
-60
-55
-50
-45
-40
-35
-30
1975
2000
2025
2050
2075
2100
2125
2150
2175
2200
2225
2250
2275
2300
2325
2350
2375
2400
2425
2450
2475
2500
2525
2550
2575
2600
2625
2650
2675
2700
2725
2750
2775
2800
2825
2850
2875
2900
2925
2950
2975
3000
3025
3050
3075
3100
3125
3150
3175
3200
3225
3250
3275
3300
3325
3350
3375
3400
3425
3450
3475
3500
3525
3550
3575
3600
3625
3650
3675
3700
3725
3750
3775
3800
3825
3850
3875
3900
3925
3950
3975
4000
2060E - Primary
2060E - SubFractional
2380E - Primary
2380E - SubFractional
2690E - Primary
2690E - SubFractional
3030E - Primary
3030E - SubFractional
3320E - Primary
3320E - SubFractional
3740E - Primary
3740E - SubFractional
gp
Frequency
Option
Spur Order
Out-band spurs occur inside the loop bandwidth. These spurs were measured with a WORST CASE
fraction of 1/100. The primary fractional spurs are at 250 kHz and the sub-fractional spurs are at 125 kHz.
The actual frequency is the frequency in t he chart plus 250 kHz.
-70
-65
-60
-55
-50
-45
-40
-35
-30
1975
2000
2025
2050
2075
2100
2125
2150
2175
2200
2225
2250
2275
2300
2325
2350
2375
2400
2425
2450
2475
2500
2525
2550
2575
2600
2625
2650
2675
2700
2725
2750
2775
2800
2825
2850
2875
2900
2925
2950
2975
3000
3025
3050
3075
3100
3125
3150
3175
3200
3225
3250
3275
3300
3325
3350
3375
3400
3425
3450
3475
3500
3525
3550
3575
3600
3625
3650
3675
3700
3725
3750
3775
3800
3825
3850
3875
3900
3925
3950
3975
4000
2060E - Prim ary
2060E - SubFrac tional
2380E - Prim ary
2380E - SubFrac tional
2690E - Prim ary
2690E - SubFrac tional
3030E - Prim ary
3030E - SubFrac tional
3320E - Prim ary
3320E - SubFrac tional
3740E - Prim ary
3740E - SubFrac tional
gp
Frequency
Option
Spur Order
Minimizing Fractional Spurs
Both fractional and sub-fractional spurs are highly sensitive to the OSCin signal. Higher slew rates
are desired. Also, the termination makes a big difference. For this evaluation board, a series 120
ohm resistor had a large impact.
The best results have been achieved when driving the part differentially with an LVPECL output of
the LMK01000/2000/3000/400 series of clock conditioner d evices from National Semicon ductor.
The spurs on this evaluation board are relatively high because the loop bandwidth is very wide. This
wide loop bandwidth takes advantage of the close-in phase noise, but it does expose the fractional
spurs more. The fractional spurs can be reduced by orders of magnitude by reducing the loop
bandwidth. This requires a re-design of the loo p filter.
To eliminate the SubFractional spurs entirely, choose a fractional denominator with no factors of 2 or
3. For this 100 MHz TCXO and 250 kHz channel spacing, a phase detector frequency of 6.25 MHz
and a fractional denominator of 25 would work. However, the higher N value does degrade the
phase noise. An ideal scenario would be to use a TCXO frequency of something like 125 MHz.
Then the sub-fractional spurs are e liminate d if the phase detector is ch osen to b e 3 0.25 MHz and the
fractional denominator is chosen to be 125.
In the plot below, one was taken with the default 100 MHz TCXO and another was taken with a 125
MHz signal. The phase detector frequency was changed to 31.25 MHz, but the charge pump gain
was reduced to 26X to compensate for this. This is the same part, board, and frequency (3030.25
MHz). Although the fraction is different, notice that the fractional denominator of 125 has no sub
fractional spurs at 125 kHz, 375 kHz, and so on. An LMK01000 evaluation board driven by a 1250
MHz signal was used to produce th is 125 MHz signal.
-160
-140
-120
-100
-80
-60
1.E+04 1.E+05 1.E+06 1.E+07 1.E+08
Of f s e t ( H z)
Phase Noise (dBc/Hz )
F DE N = 125 FDEN = 100
LMX2541SQ2060E Default Setup and Measured Performance
LMX2541SQ2060E Spurs for WORST CASE Channels
(Fraction = 1/100)
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-300
-250
-200
-150
-100
-50
0
50
100
150
200
250
300
Offset fr o m Carr ier (kHz)
Power (dBm)
1975. 25 M Hz
2000. 25 M Hz
2025. 25 M Hz
2050. 25 M Hz
2075. 25 M Hz
2100. 25 M Hz
2125. 25 M Hz
2150. 25 M Hz
2175. 25 M Hz
2200. 25 M Hz
2225. 25 M Hz
2250. 25 M Hz
This graph has been normalized to the average carrier power.
LMX2541SQ2060E VCO Phase Noise
The plots show the VCO phase noise at low,
middle, and high freq uency.
To measure the VCO phase noise, a simple
technique is to lock the PLL to the desired
frequency and set the charge pump state to
“Tri-State”, by clicking this on the PLL tab on
Codeloader. If the phase noise analyzer can
track the signal, a reasonable measurement
can be made. To ensure that this
measurement is of the VCO noise, omit the the
spurs and disconnect the microwire
programming cable .
LMX2541SQ2380E Default Setup and Measured Performance
LMX2541SQ2380E Spurs for WORST CASE Channels
(Fraction = 1/100)
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-300
-250
-200
-150
-100
-50
0
50
100
150
200
250
300
Offset fr o m Carr ier (kHz)
Power (dBm)
2200. 25 M Hz
2225. 25 M Hz
2250. 25 M Hz
2275. 25 M Hz
2300. 25 M Hz
2325. 25 M Hz
2350. 25 M Hz
2375. 25 M Hz
2400. 25 M Hz
2425. 25 M Hz
2450. 25 M Hz
2475. 25 M Hz
2500. 25 M Hz
2525. 25 M Hz
2550. 25 M Hz
This graph has been normalized to the average carrier power.
LMX2541SQ2380E VCO Phase Noise
The plots show the VCO phase noise at low,
middle, and high freq uency.
To measure the VCO phase noise, a simple
technique is to lock the PLL to the desired
frequency and set the charge pump state to
“Tri-State”, by clicking this on the PLL tab on
Codeloader. If the phase noise analyzer can
track the signal, a reasonable measurement
can be made. To ensure that this
measurement is of the VCO noise, omit the the
spurs and disconnect the microwire
programming cable .
LMX2541SQ2690E Default Setup and Measured Performance
LMX2541SQ2690E Spurs for WORST CASE Channels
(Fraction = 1/100)
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-300
-250
-200
-150
-100
-50
0
50
100
150
200
250
300
Offset (kHz)
Power (dBm)
2475. 25 M Hz
2500. 25 M Hz
2525. 25 M Hz
2550. 25 M Hz
2575. 25 M Hz
2600. 25 M Hz
2625. 25 M Hz
2650. 25 M Hz
2675. 25 M Hz
2700. 25 M Hz
2725. 25 M Hz
2750. 25 M Hz
2775. 25 M Hz
2800. 25 M Hz
2825. 25 M Hz
2850. 25 M Hz
2875. 25 M Hz
This graph has been normalized to the average carrier power.
LMX2541SQ2690E VCO Phase Noise
The plots show the VCO phase noise at low,
middle, and high freq uency.
To measure the VCO phase noise, a simple
technique is to lock the PLL to the desired
frequency and set the charge pump state to
“Tri-State”, by clicking this on the PLL tab on
Codeloader. If the phase noise analyzer can
track the signal, a reasonable measurement
can be made. To ensure that this
measurement is of the VCO noise, omit the the
spurs and disconnect the microwire
programming cable .
LMX2541SQ3030E Default Setup and Measured Performance
LMX2541S3030E Spurs for WORST CASE Channels
(Fraction = 1/100)
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-300
-250
-200
-150
-100
-50
0
50
100
150
200
250
300
Offset (kHz )
Power (dBm)
2800. 25 M Hz
2825. 25 M Hz
2850. 25 M Hz
2875. 25 M Hz
2900. 25 M Hz
2925. 25 M Hz
2950. 25 M Hz
2975. 25 M Hz
3000. 25 M Hz
3025. 25 M Hz
3050. 25 M Hz
3075. 25 M Hz
3100. 25 M Hz
3125. 25 M Hz
3150. 25 M Hz
3175. 25 M Hz
3200. 25 M Hz
3225. 25 M Hz
3250. 25 M Hz
This graph ha s been normal ized the average carrier power.
LMX2541SQ3030E VCO Phase Noise
The plots show the VCO phase noise at low,
middle, and high freq uency.
To measure the VCO phase noise, a simple
technique is to lock the PLL to the desired
frequency and set the charge pump state to
“Tri-State”, by clicking this on the PLL tab on
Codeloader. If the phase noise analyzer can
track the signal, a reasonable measurement
can be made. To ensure that this
measurement is of the VCO noise, omit the the
spurs and disconnect the microwire
programming cable .
LMX2541SQ3320E Default Setup and Measured Performance
LMX2541S3320E S purs for WORST CASE Channels
(Fraction = 1/100)
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-300
-250
-200
-150
-100
-50
0
50
100
150
200
250
300
Offset (kHz)
Power (dBm)
3125. 25 M Hz
3150. 25 M Hz
3175. 25 M Hz
3200. 25 M Hz
3225. 25 M Hz
3250. 25 M Hz
3275. 25 M Hz
3300. 25 M Hz
3325. 25 M Hz
3350. 25 M Hz
3375. 25 M Hz
3400. 25 M Hz
3425. 25 M Hz
3450. 25 M Hz
3475. 25 M Hz
3500. 25 M Hz
3525. 25 M Hz
3550. 25 M Hz
3575. 25 M Hz
3600. 25 M Hz
Note that the grap hs have all be en normalize d the average ca rrier power.
LMX2541SQ3320E VCO Phase Noise
The plots show the VCO phase noise at low,
middle, and high freq uency.
To measure the VCO phase noise, a simple
technique is to lock the PLL to the desired
frequency and set the charge pump state to
“Tri-State”, by clicking this on the PLL tab on
Codeloader. If the phase noise analyzer can
track the signal, a reasonable measurement
can be made. To ensure that this
measurement is of the VCO noise, omit the the
spurs and disconnect the microwire
programming cable .
LMX2541SQ3740E Default Setup and Measured Performance
LMX2541S3740E S purs for WORST CASE Channels
(Fraction = 1/100)
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-300
-250
-200
-150
-100
-50
0
50
100
150
200
250
300
Offset (kHz )
Power (dBm)
3475. 25 M Hz
3500. 25 M Hz
3525. 25 M Hz
3550. 25 M Hz
3575. 25 M Hz
3600. 25 M Hz
3625. 25 M Hz
3650. 25 M Hz
3675. 25 M Hz
3700. 25 M Hz
3725. 25 M Hz
3750. 25 M Hz
3775. 25 M Hz
3800. 25 M Hz
3825. 25 M Hz
3850. 25 M Hz
3875. 25 M Hz
3900. 25 M Hz
3925. 25 M Hz
3950. 25 M Hz
3975. 25 M Hz
4000. 25 M Hz
Note that the grap hs have all be en normalize d the average ca rrier power.
LMX2541SQ3740E VCO Phase Noise
The plots show the VCO phase noise at low,
middle, and high freq uency.
To measure the VCO phase noise, a simple
technique is to lock the PLL to the desired
frequency and set the charge pump state to
“Tri-State”, by clicking this on the PLL tab on
Codeloader. If the phase noise analyzer can
track the signal, a reasonable measurement
can be made. To ensure that this
measurement is of the VCO noise, omit the the
spurs and disconnect the microwire
programming cable .
Bill of Materials
Revision 9/30/2009
Part Manufacturer Part Number Qty Identifier
Capacitors
100 pF Kemet C0603C101J5GAC 4 C1, C5, C33, C35
2.2 nF Kemet C0603C222J5GAC 1 C3_LF
22 nF Kemet C0603C223K5RAC 1 C2_LF
0.1 uF Kemet C0603C104K5RAC 19 C2, C6, C9, C10, C11, C12, C13, C17, C18, C21, C24, C25,
C26, C27, C28, C32, C36, C40, C49
1 uF Kemet C0603C105K8VAC 10 C3, C7, C16, C19, C31, C37, C41, C42, C43, C50
4.7 uF Kemet C0603C475K9PAC 4 C14, C15, C20, C34
10 uF Kemet C0805C106K9PAC 6 C4, C8, C30, C38, C39, C48
Resistors
0 ohm Vishay/Dale CRCW06030000Z0EA 7 R3_LF, R12, R21, R39, R41, R42, R46
4.7 ohm Vishay/Dale CRCW06034R7JNEA 2 R49, R50
10 ohm Vishay/Dale CRCW060310R0JNEA 3 R6, R47, R48
18 ohm Vishay/Dale CRCW060318R0JNEA 1 R2
51 ohm Vishay/Dale CRCW060351R0JNEA 2 R10, R14
120 ohm Vishay/Dale CRCW0603120RJNEA 3 R7, R8, R51
180 ohm Vishay/Dale CRCW0603180RJNEA 1 R36
330 ohm Vishay/Dale CRCW0603330RJNEA 2 R1, R3
470 ohm Vishay/Dale CRCW0603470RJNEA 1 R2_LF
2.2 k Vishay/Dale CRCW06032K20JNEA 1 R35
15 k Vishay/Dale CRCW060315K0JNEA 3 R30, R32, R34
27 k Vishay/Dale CRCW060327K0JNEA 5 R29, R31, R33, R37, R38
100 k Vishay/Dale CRCW0603100KJNEA 2 R4, R5
Other
Ferrite Digikey 490-1015-1-ND 7 L1, L2, L3, L4, L5, L6, L7
3.3 V zener Comchip CZRU52C3V3 1 D2
HEADER_2X5
(POLARIZED) FCI Electronics 52601-S10-8 1 uWire
Green LED Lumex SML-LX2832GC-TR 1 D1
POWER_SMALL Weidmuller 1594540000.0 1 P1
SMA Johnson
Components 142-0701-851 4 OSCin, OSCin*, RFout, Vcc
TCXO - 100
MHz Connor-Winfield CWX813 - 100 MHz 1 Y1
NFET Fairchild BSS138 1 U5
VCXO - 100
MHz CRYSTEK CVPD-920 – 100 MHz 1 U4
LMX2541 National
Semiconductor LMX2541SQxxxx 1 U1
Standoffs SPC Technology SPCS-6 4 Place in Holes at the corners of the board.
Open
Open - Open Capacitor 14 C1_LF, C2pLF, C4_LF, C22, C23, C29, C44, C45, C46, C47
Open Open Capacitor 6 C100, C101, C102, C103, C104, C105
Open - Open Resistor 22
R2pLF,R4_LF, R9, R11, R13, R15, R16, R17, R18, R19,
R20, R22, R23, R24, R25, R26, R27, R28, R40, R43, R44,
R45
Open - Open Resistor 9
R100, R101, R102, R103, R104, R105, R106, R107, R108,
R109
Open - Open Crystal 1 Y100
Open - Open IC 3 U2, U3, U100
Open - Open SMA 3 ExtVCOin, Ftest/LD, VccAux
32
Top Assembly Diagram
234
33
Bottom Assembly Diagram
No Components are assembled on the bottom layer in the default setup.
34
Schematic
Vcc
SMA
C33
100 pF
1 2
3 4
5 6
7 8
910
uWire
HEADER_2X5(POLARIZED)
R35
2.2 k
R36
180 ohm
R33
27 k
R32
15 k
R30
15 k R34
15 k
C32
0.1 uF
C31
1 uF
C30
10 uF
VccPlane
VccPlane
R42
0 ohm
R29
27 k
R43
Open
C22
Open
C29
Open
C15
4.7 uF
C12
0.1 uF
C42
1 uF
R28
Open
R26
Open
R22
Open
R14
51 ohm
R2pLF
Open
R21
0 ohm
R27
Open
ExtVCOin
Open
C1_LF
Open
C2_LF
22 nF
C3_LF
2.2 nF
C4_LF
Open
R3_LF
0 ohm
R2_LF
470 ohm
R4_LF
Open
VccPlane
OSCin
SMA
R10
51 ohm
OSCin*
SMA
Readback
R20
Open
Readback
VccAux
C2
0.1 uF
C7
1 uF
C5
100 pF
C3
1 uF
C1
100 pF
C35
100 pF C36
0.1 uF
C6
0.1 uF
GND
VccPlane
VccPlane
VccPlane
RFout
SMA
R1
330 ohm
R3
330 ohm
C9
0.1 uF
R2
18 ohm
C8
10 uF
C4
10 uF
R101
Open
C20
4.7 uF
C21
0.1 uF
C18
0.1 uF
EN_RFOUT
CECLK
R37
27 k
R38
27 k
EN_RFOUT
CLK
DATA
DATA
LE
LE
VccPlane VccPlane
VccPlane
VccPlane
VccPlane
C16
1 uF
VccPlane2
C28
0.1 uF
VccPlane2
CE
C19
1 uF
C25
0.1 uF
C24
0.1 uF
C26
0.1 uF
VccPlane
VccPlane2
VccAux
R41
0 ohm
VccAux
FRAME
SMA_FRAME
VccPlane
R23
Open
R24
Open R25
Open
D2
3.3 V zener
Y100
Open
C100
Open C101
Open
VccAux
R19
Open C34
4.7 uF
C23
Open
R49
4.7 ohm
R50
4.7 ohm
R48
10 ohm
C27
0.1 uF
C17
0.1 uF
Ftest/LD
Open
R40
Open
R45
Open
C47
open
VccDig
28
VccBias
29
Bypass
30
VccDiv
31
DATA
32
CLK
33
LE
34
NC
35
RFout
36
GND
1
VregRFout
2
VccRFout
3
L1
4
Lmid
5
L2
6
VccVCO
7
VregVCO
8
VrefVCO
9
GND 10
CE 11
ExtVCOin 12
VccPLL1 13
VccCP1 14
Vtune 15
CPout 16
FLout 17
VccCP2 18
VccFRAC 25
Ftest/LD 20
OSCin 21
OSCin* 22
VccOSCin 23
RFoutEN 24
VregFRAC 26
GND 27
VccPLL2 19
DAP
0
U1
LMX2541
VccAux
Open
11
22
P1
POWER_SMALL
D1
Green LED
R51
120 ohm
R46
0 ohm
C2pLF
Open
Out
3GND 2
Vcont 1
Vcc
4
Y1
TCXO
R17
Open
R18
Open
R104
Open
R105
Open
DATA
Vtune
R100
Open
GND 0
Bypass 1
NC 2
GND 3
INPUT 4
OUTPUT
5
ADJ
6
NC
7
SHUTDOWN
8
U3
Open
C44
Open
R44
Open
R31
27 k
C46
Open
R47
10 ohm
CLK
DATA
LE
CE
RFoutEN
Vout
1
V-
2
IN+
3IN- 4
V+ 5
U100
Open
R102
Open
R108
Open
R103
Open
R109
Open
R107
Open
C104
Open
VccAux
VccPlane
Series resistance on VregRFout improv es the noise floor
when used in divided m ode.
To use w ith a VCO, use 3 components to mak e a T-splitter and
don't use the Pi-Pad. For sensitivity testing, put components in
the Pi-Pad and zero out resistors in the T-Pad. Also, for
fractional spurs outside the loop bandw idth w ith the external
VCO option, there is some ev idence that putting a resistive pad
can im prov e fractional spurs outside the loop bandw idth.
- Monitor the Ftest/LD pin
- Provisions for Analog Lock Detect
- Supply power for an op-am p for an active filter
- Allow the user to apply FSK modulation
- Monitor CPout Pin
- Monitor or Drive the Vtune pin
1 . Inte rna l V C O
D o n ot use an y b o tto m co mp o n e nts fo r th is.
2 . E x te rn a l VC O with P a s siv e Filter
Disconnecting Vtune isolates Vtune. Might not be necessary
3. Ex ternal VCO with Active Filter
Use the com ponents on the back.
Op AMP can be supplied with Ftest/LD pin or with VccAux voltage.
Use C1 _ LF a nd b ack side resisto rs fo r slow slew rate d esign.
3rd Pole is form ed with C3_LF and resistor back to top of board.
4th Pole is already on top of board.
4. Monitor CPout through Ftest/LD
Discon ne ct V tun e p in for m o re a ccurate results.
5. Monitor or Drive Vtune
Use test point or Ftest/LD SMA and back layer resistors.
Rem ove R3_LF or Tri-state charge pump to drive v oltage.
CPout_Net
CPout_Net
C103
Open
C105
Open
C102 Open
R106
Open
GND 3
Vtune 2
GND 1
GND
7Mod
6GND
5
GND
8
GND 4
GND
9
Fout
10
GND
11
GND
12
GND 13
Vcc 14
GND 15
GND 16
U2
Open
VccAuxTP
VregRFout
Pad and External VCO O p tion s
Loop Filter Options
Ftest/LD Pin Options
1. TCXO Mode
Terminate OSCin* if this is done
2. VCXO Mode
Connect VCXO and tie pow er dupply to Vcc/2.
Drive and terminate differentially.
3. Differential Mode
Use 100 ohm or 2x 51 ohm resistors for term ination.
4. Ex ternal Crystal Mode
Use back side of board. May hav e to bend leads of crystal to fit.
5. Use external signal source like LMK04000 evaluation board to drive OSCin/OSCin*
6. Special provisions on GND plane
GND plane isolated below OSCin and connected by a single trace on the bottom layer.
Cut this trace toexperiment further withOSCin isolation
OSCin/OSCin* Options
Vtune 1
NC 2
GND 3
RF
4
RF*
5
Vs
6
U4
VCXO - 100 MHz
R7
120 ohm
R8
120 ohm
R6
10 ohm
R5
100 k
R4
100 k
C11
0.1 uF
VccAux
L4
Ferrite
L3
Ferrite
L6
Ferrite
L7
Ferrite
L5
Ferrite
L2
Ferrite
L1
Ferrite
VccPlane2
Gate 1
Drain
2
Source 3
U5
NFET
VccAux
R39
0 ohm
C49
0.1 uF
C50
1 uF C48
10 uF
VccPlane2
R9
Open R12
0 ohm
R11
Open R13
Open
R16
Open
C10
0.1 uF R15
Open
C13
0.1 uF
C14
4.7 uF
C37
1 uF C38
10 uF
C39
10 uF
C40
0.1 uF
C41
1 uF
C45
Open
C43
1 uF
VccPlane
Additional Comments
- Any part w ith designator 100 or higher is on the bottom layer and not assem bled by default.
35
Board Layer S tackup
Board Material Rogers RO4003
Number of Layers 6
Board Thickness 0.062”
Copper Weight 1 oz Finished
Finish Immersion Gold
Solder Mask Color Green/Gloss
Testing 100% Electrical
Testing
RO4003 (εr = 3.38, Tand = 0.0022)
CONTROLLED THICKNESS of
16 mils thick
Top Layer 1oz thick
GND1 Layer
FR4 (εr = ~4.6)
?? mils thick, but thinner is
p
referable
VccPlane Layer
FR4
?? mils thick
62 mils thick total
Mid Layer 1
FR4 (εr = ~4.6)
?? mils thick, but thinner is
p
referable
GND2 Layer
FR4 (εr = ~4.6) = ~4.6)
?? mils thick
Bottom Layer
36
Top Layer and Silkscreen
37
GND1 Layer
Beneath the TCXO, the ground plane is separated. It is believed that this may improve spurs, especially at offset frequencies
equal to the TCXO frequency. These planes are connected on the bottom layer by a small trace.
38
VccPlane Layer
Beneath the TCXO, the power plane is removed to minimize the chance of any noise getting onto this plane.
39
MidLayer 1
Certain pins like VccFRAC and the TCXO supply pins could potentially be sources of noise. These traces were put on this
separate layer to try to isolate them more from the
40
GND2 Layer
Beneath the TCXO, the ground plane is separated. It is believed that this may improve spurs, especially at offset frequencies
equal to the TCXO frequency. These planes are connected on the bottom layer by a small trace.
41
Bottom Layer and Silkscreen
This layer has the small trace that connects the grounded pieces in the GND1 layer. It has options for an active filter and crystal as
well.