BAL/STRB
COL OUT
IN−
IN+
BALANCE
EMIT OUT
+
−
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM111
,
LM211
,
LM311
SLCS007K –SEPTEMBER 1973–REVISED MARCH 2017
LM111, LM211, LM311 Differential Comparators
1
1 Features
1• Fast Response Time: 165 ns
• Strobe Capability
• Maximum Input Bias Current: 300 nA
• Maximum Input Offset Current: 70 nA
• Can Operate From Single 5-V Supply
• Available in Q-Temp Automotive
– High-Reliability Automotive Applications
– Configuration Control and Print Support
– Qualification to Automotive Standards
• On Products Compliant to MIL-PRF-38535,
All Parameters Are Tested Unless Otherwise
Noted. On All Other Products, Production
Processing Does Not Necessarily Include Testing
of All Parameters.
2 Applications
• Desktop PCs
• Body Control Modules
• White Goods
• Building Automation
• Oscillators
• Peak Detectors
3 Description
The LM111, LM211, and LM311 devices are single
high-speed voltage comparators. These devices are
designed to operate from a wide range of power-
supply voltages, including ±15-V supplies for
operational amplifiers and 5-V supplies for logic
systems. The output levels are compatible with most
TTL and MOS circuits. These comparators are
capable of driving lamps or relays and switching
voltages up to 50 V at 50 mA. All inputs and outputs
can be isolated from system ground. The outputs can
drive loads referenced to ground, VCC+ or VCC−. Offset
balancing and strobe capabilities are available, and
the outputs can be wire-OR connected. If the strobe
is low, the output is in the off state, regardless of the
differential input.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE
LM111FK LCCC (20) 8.89 mm × 8.89 mm
LM111JG CDIP (8) 9.60 mm × 6.67 mm
LM311PS SO (8) 6.20 mm × 5.30 mm
LM211D SOIC (8) 4.90 mm × 3.91 mm
LM311D
LM211P PDIP (8) 9.81 mm × 6.35 mm
LM311P
LM211PW TSSOP (8) 3.00 mm × 4.40 mm
LM311PW
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
SPACER
Simplified Schematic
2
LM111
,
LM211
,
LM311
SLCS007K –SEPTEMBER 1973–REVISED MARCH 2017
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Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information (8-Pin Packages)..................... 5
6.5 Thermal Information (20-Pin Package)..................... 5
6.6 Electrical Characteristics........................................... 6
6.7 Switching Characteristics.......................................... 6
6.8 Typical Characteristics.............................................. 7
7 Parameter Measurement Information .................. 9
8 Detailed Description............................................ 10
8.1 Overview................................................................. 10
8.2 Functional Block Diagram....................................... 10
8.3 Feature Description................................................. 11
8.4 Device Functional Modes........................................ 11
9 Application and Implementation ........................ 12
9.1 Application Information............................................ 12
9.2 Typical Application ................................................. 12
9.3 System Examples ................................................... 14
10 Power Supply Recommendations ..................... 22
11 Layout................................................................... 22
11.1 Layout Guidelines ................................................. 22
11.2 Layout Example .................................................... 22
12 Device and Documentation Support................. 23
12.1 Related Links ........................................................ 23
12.2 Receiving Notification of Documentation Updates 23
12.3 Community Resources.......................................... 23
12.4 Trademarks........................................................... 23
12.5 Electrostatic Discharge Caution............................ 23
12.6 Glossary................................................................ 23
13 Mechanical, Packaging, and Orderable
Information........................................................... 23
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision J (January 2017) to Revision K Page
• Changed Human body model (HBM) from: ±1000 to: ±500 in ESD Ratings table ................................................................ 4
Changes from Revision I (June 2015) to Revision J Page
• Changed the data sheet title From: LMx11 Quad Differential Comparators To: LM111, LM211, LM311 Differential
Comparators .......................................................................................................................................................................... 1
• Updated the Applications list ................................................................................................................................................. 1
• Updated the Thermal Information (8-Pin Packages) table..................................................................................................... 5
• Changed text From: "over a −25°C to +85°C temperature range..." To: ""over a −40°C to +85°C temperature
range..." in the Overview section.......................................................................................................................................... 10
• Added text "The LM311 has a temperature range of −40°C to +125°C." to the Overview section...................................... 10
Changes from Revision H (August 2003) to Revision I Page
• Updated Features with Military Disclaimer............................................................................................................................. 1
• Added Applications,Device Information table, Pin Configuration and Functions section, ESD Ratings table, Feature
Description section, Device Functional Modes,Application and Implementation section, Power Supply
Recommendations section, Layout section, Device and Documentation Support section, and Mechanical,
Packaging, and Orderable Information section. No specification changes............................................................................ 1
3 2 1 20 19
910 11 12 13
4
5
6
7
8
18
17
16
15
14
NC
COL OUT
NC
BAL/STRB
NC
NC
IN+
NC
IN−
NC
NC
EMIT OUT
NC
BALANCE
NC NC
NC
NC
CC−
V
CC+
V
1
2
3
4
8
7
6
5
EMIT OUT
IN+
IN−
VCC−
VCC+
COL OUT
BAL/STRB
BALANCE
3
LM111
,
LM211
,
LM311
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5 Pin Configuration and Functions
LMx11 D, JG, P, PS, or PW Package
8-Pin SOIC, CDIP, PDIP, SO or TSSOP
Top View
LM111 FK Package
20-Pin LCCC(1)
Top View
(1) NC = No internal connection
(1) I = Input, O = Output
Pin Functions
PIN
I/O(1) DESCRIPTION
NAME
LM211,
LM311 LM311 LM111 LM111
SOIC, PDIP,
TSSOP SO CDIP LCCC
IN+ 2 2 2 5 I Noninverting comparator
IN– 3 3 3 7 I Inverting input comparator
BALANCE 5 5 5 12 I Balance
BAL/STRB 6 6 6 15 I Strobe
COL OUT 7 7 7 17 O Output collector comparator
EMIT OUT 1 1 1 2 O Output emitter comparator
VCC– 4 4 4 10 — Negative supply
VCC+ 8 8 8 20 — Positive supply
NC — — —
1
— No connect (No internal connection)
3
4
6
8
9
11
13
14
16
18
19
4
LM111
,
LM211
,
LM311
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(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, unless otherwise noted, are with respect to the midpoint between VCC+ and VCC–.
(3) Differential voltages are at IN+ with respect to IN–.
(4) The magnitude of the input voltage must never exceed the magnitude of the supply voltage or ±15 V, whichever is less.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage VCC+(2) 18 VVCC–(2) –18
VCC+ – VCC– 36
VID Differential input voltage(3) ±30 V
VIInput voltage (either input)(2)(4) ±15 V
Voltage from emitter output to VCC– 30 V
Voltage from collector output to VCC–
LM111 50
V
LM211 50
LM211Q 50
LM311 40
Duration of output short circuit to ground 10 s
TJOperating virtual-junction temperature 150 °C
Case temperature for 60 s FK package 260 °C
Lead temperature 1,6 mm (1/16 inch) from case, 10 s JG package 300 °C
Lead temperature 1,6 mm (1/16 inch) from case, 60 s D, P, PS, or PW
package 260 °C
Tstg Storage temperature −65 150 °C
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings VALUE UNIT
V(ESD) Electrostatic
discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±500 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±750
6.3 Recommended Operating Conditions
MIN MAX UNIT
VCC+ – VCC– Supply voltage 3.5 30 V
VIInput voltage (|VCC+|≤15 V) VCC– + 0.5 VCC+ – 1.5 V
TAOperating free-air temperature range
LM111 –55 125
°C
LM211 –40 85
LM211Q –40 125
LM311 0 70
5
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,
LM211
,
LM311
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(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.4 Thermal Information (8-Pin Packages)
THERMAL METRIC(1)
LM211, LM311 LM311 LM111
UNITD (SOIC) P (PDIP) PW
(TSSOP) PS (SO) JG (CDIP)
8 PINS 8 PINS 8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 114.3 57.5 162 121.8 — °C/W
RθJC(top) Junction-to-case (top) thermal resistance 60.7 47.3 44.6 81.6 14.5 °C/W
RθJB Junction-to-board thermal resistance 54.5 34.6 93 66.5 — °C/W
ψJT Junction-to-top characterization parameter 17.4 24.9 2.6 31.4 — °C/W
ψJB Junction-to-board characterization parameter 54 34.5 90.8 65.8 — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Thermal Information (20-Pin Package)
THERMAL METRIC(1) LM111
UNITFK (LCCC)
20 PINS
RθJC(top) Junction-to-case (top) thermal resistance 5.61 °C/W
6
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,
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,
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(1) Unless otherwise noted, all characteristics are measured with BALANCE and BAL/STRB open and EMIT OUT grounded. Full range for
LM111 is –55°C to 125°C, for LM211 is –40°C to 85°C, for LM211Q is –40°C to 125°C, and for LM311 is 0°C to 70°C.
(2) All typical values are at TA= 25°C.
(3) The offset voltages and offset currents given are the maximum values required to drive the collector output up to 14 V or down to 1 V
with a pullup resistor of 7.5 kΩto VCC+. These parameters actually define an error band and take into account the worst-case effects of
voltage gain and input impedance.
(4) The strobe must not be shorted to ground; it must be current driven at –3 mA to –5 mA (see Figure 18 and Figure 31).
6.6 Electrical Characteristics
at specified free-air temperature, VCC± = ±15 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA(1)
LM111
LM211
LM211Q LM311 UNIT
MIN TYP(2) MAX MIN TYP(2) MAX
VIO Input offset voltage See(3) 25°C 0.7 3 2 7.5 mV
Full range 4 10
IIO Input offset current See(3) 25°C 4 10 6 50 nA
Full range 20 70
IIB Input bias current 1 V ≤VO≤14 V 25°C 75 100 100 250 nA
Full range 150 300
IIL(S) Low-level
strobe current(4) V(strobe) = 0.3 V,
VID ≤–10 mV 25°C –3 –3 mA
VICR Common-mode
input-voltage
range(3)
Lower range Full range –14.7 –14.5 –14.7 –14.5 V
Upper range 13 13.8 13 13.8
AVD Large-signal
differential-voltage
amplification 5 V ≤VO≤35 V, RL= 1 kΩ25°C 40 200 40 200 V/mV
IOH
High-level
(collector)
output leakage
current
I(strobe) = –3 mA,
VID = 5 mV VOH = 35 V 25°C 0.2 10 nA
Full range 0.5 μA
VID = 5 mV, VOH = 35 V 25°C 0.2 50 nA
VOL
Low-level
(collector-to-
emitter)
output voltage
IOL = 50 mA VID = –5 mV 25°C 0.75 1.5
V
VID = –10 mV 25°C 0.75 1.5
VCC+ = 4.5 V,
VCC– = 0 V,
IOL = 8 mA
VID = –6 mV Full range 0.23 0.4
VID = –10 mV Full range 0.23 0.4
ICC+Supply current from
VCC+
output low VID = –10 mV, No load 25°C 5.1 6 5.1 7.5 mA
ICC–Supply current from
VCC–
output high VID = 10 mV, No load 25°C –4.1 –5 –4.1 –5 mA
(1) The response time specified is for a 100-mV input step with 5-mV overdrive and is the interval between the input step function and the
instant when the output crosses 1.4 V.
(2) The package thermal impedance is calculated in accordance with MIL-STD-883.
6.7 Switching Characteristics
VCC± = ±15 V, TA= 25°C
PARAMETER TEST CONDITIONS
LM111
LM211
LM211Q
LM311 UNIT
TYP
Response time, low-to-high-level outputSee(1) RC= 500 Ωto 5 V, CL= 5 pF, see (2) 115 ns
Response time, high-to-low-level outputSee(1) 165 ns
7
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,
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,
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6.8 Typical Characteristics
Condition 1 is with BALANCE and BAL/STRB open.
Condition 2 is with BALANCE and BAL/STRB connected to VCC+.
Figure 1. Input Offset Current vs Free-Air Temperature
Condition 1 is with BALANCE and BAL/STRB open.
Condition 2 is with BALANCE and BAL/STRB connected to VCC+.
Figure 2. Input Bias Current vs Free-Air Temperature
Figure 3. Output Response for Various Input Overdrives Figure 4. Output Response for Various Input Overdrives
Figure 5. Output Current and Dissipation vs Output Voltage Figure 6. Positive Supply Current vs Positive Supply
Voltage
30
20
10
0
−1 −0.5 0
− Output Voltage − V
40
50
60
0.5 1
VO
VID − Differential Input Voltage − mV
Collector
Output
RL= 1 kΩ
LM111
LM211
LM311
Emitter Output
RL= 600 Ω
VCC+= 30 V
VCC− = 0
TA= 25°C
8
LM111
,
LM211
,
LM311
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Typical Characteristics (continued)
Figure 7. Negative Supply Current vs Negative Supply
Voltage Figure 8. Voltage Transfer Characteristics and Test Circuits
VID
VCC+ = 15 V
RE= 2 kΩ
VO
VCC− = −15 V
Copyright © 2016, Texas Instruments Incorporated
VID
VCC+ = 15 V
500 Ω
VO
VCC− = −15 V
5 V
Copyright © 2016, Texas Instruments Incorporated
VID
VCC+ = 30 V
1 kΩ
Output
VCC−
VI= 50 V (LM111, LM211)
40 V (LM311)
Copyright © 2016, Texas Instruments Incorporated
VID
VCC+ = 30 V
600 Ω
VCC−
Output
Copyright © 2016, Texas Instruments Incorporated
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7 Parameter Measurement Information
Figure 9. Collector Output Transfer Characteristic
Test Circuit Figure 10. Emitter Output Transfer Characteristic
Test Circuit
Figure 11. Test Circuit for Figure 3 and Figure 4 Figure 12. Test Circuit for Figure 14 and Figure 15
BAL/STRB BALANCE
IN+
IN−
450 Ω450 Ω
2.4
kΩ
1.2 kΩ
70 Ω
2.4
kΩ
1.2 kΩ
60 Ω
400 Ω
450 Ω
2 kΩ
200 Ω250 Ω
600 Ω
130 Ω
4Ω
4 kΩ
VCC+
VCC−
EMIT OUT
COL OUT
750 Ω600 Ω
Component Count
Resistors 20
Diodes 2
EPI FET 1
Transistors 22
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10
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,
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,
LM311
SLCS007K –SEPTEMBER 1973–REVISED MARCH 2017
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8 Detailed Description
8.1 Overview
The LM111, LM211 and LM311 are voltage comparators that have input currents nearly a thousand times lower
than legacy standard devices. They are also designed to operate over a wider range of supply voltages: from
standard ±15V op amp supplies down to the single 5-V supply used for IC logic. Their output is compatible with
RTL, DTL and TTL as well as MOS circuits. Further, they can drive lamps or relays, switching voltages up to 50
V at currents as high as 50 mA.
Both the inputs and the outputs of the LM111, LM211 or the LM311 can be isolated from system ground, and the
output can drive loads referred to ground, the positive supply or the negative supply. Offset balancing and strobe
capability are provided and outputs can be wire ORed. The LM211 is identical to the LM111, except that its
performance is specified over a −40°C to +85°C temperature range instead of −55°C to +125°C. The LM311 has
a temperature range of 0°C to +70°C. The LM211Q has a temperature range of −40°C to +125°C.
8.2 Functional Block Diagram
11
LM111
,
LM211
,
LM311
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8.3 Feature Description
LMx11 consists of a PNP input stage to sense voltages near VCC–. It also contains balance and strobe pins for
external offset adjustment or trimming.
The input stage is followed by a very high gain stage for very fast response after a voltage difference on the input
pins have been sensed.
This is then followed by the output stage that consists of an open collector NPN (pulldown or low-side) transistor.
Unlike most open drain comparators, this NPN output stage has an isolated emitter from VCC–, allowing this
device to set the VOL output value for collector output.
8.4 Device Functional Modes
8.4.1 Voltage Comparison
The LMx11 operates solely as a voltage comparator, comparing the differential voltage between the positive and
negative pins and outputting a logic low or high impedance (logic high with pullup) based on the input differential
polarity.
VCC+
Input
VCC−
20 kΩ
Output
Copyright © 2016, Texas Instruments Incorporated
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LM111
,
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,
LM311
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Validate and test
the design implementation to confirm system functionality.
9.1 Application Information
A typical LMx11 application compares a single signal to a reference or two signals against each other. Many
users take advantage of the open-drain output to drive the comparison logic output to a logic voltage level to an
MCU or logic device. The wide supply range and high voltage capability makes LMx11 optimal for level shifting to
a higher or lower voltage.
9.2 Typical Application
Figure 13. Zero-Crossing Detector
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters.
Table 1. Design Parameters
PARAMETER MIN TYP MAX UNIT
VIN Input voltage range –15 13 V
VCC+ Positive supply voltage 15 V
VCC– Negative supply voltage –15
IOUT Output current 20 mA
9.2.2 Detailed Design Procedure
When using LMx11 in a general comparator application, determine the following:
• Input voltage range
• Minimum overdrive voltage
• Output and drive current
• Response time
OL
CE
OUT
V
R
I
=
N CE L
R Ct @ ´
P PULLUP L
R Ct @ ´
13
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,
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,
LM311
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9.2.2.1 Input Voltage Range
When choosing the input voltage range, consider the input common mode voltage range (VICR). Operation
outside of this range can yield incorrect comparisons.
The following list describes the outcomes of some input voltage situations.
• When both IN– and IN+ are both within the common-mode range:
– If IN– is higher than IN+ and the offset voltage, the output is low and the output transistor is sinking
current
– If IN– is lower than IN+ and the offset voltage, the output is high impedance and the output transistor is
not conducting
• When IN– is higher than common mode and IN+ is within common mode, the output is low and the output
transistor is sinking current
• When IN+ is higher than common mode and IN– is within common mode, the output is high impedance and
the output transistor is not conducting
• When IN– and IN+ are both higher than common mode, the output is undefined
9.2.2.2 Minimum Overdrive Voltage
Overdrive voltage is the differential voltage produced between the positive and negative inputs of the comparator
over the offset voltage (VIO). To make an accurate comparison the Overdrive voltage (VOD) must be higher than
the input offset voltage (VIO). Overdrive voltage can also determine the response time of the comparator, with the
response time decreasing with increasing overdrive. Figure 14 and Figure 15 show positive and negative
response times with respect to overdrive voltage.
9.2.2.3 Output and Drive Current
Output current is determined by the pullup resistance and pullup voltage. The output current produces a output
low voltage (VOL) from the comparator, in which VOL is proportional to the output current. Use Figure 5 to
determine VOL based on the output current.
The output current can also effect the transient response.
9.2.2.4 Response Time
The load capacitance (CL), pullup resistance (RPULLUP), and equivalent collector-emitter resistance (RCE) levels
determine the transient response. Equation 1 approximates the positive response time. Equation 2 approximates
the negative response time. RCE can be determine by taking the slope of Figure 5 in the linear region at the
desired temperature, or by Equation 3.
(1)
(2)
where
• VOL is the low-level output voltage
• IOUT is the output current (3)
VCC+
39 kΩ
1200 pF
20 kΩ1 kΩ
10 kΩ
20 kΩ
Square Wave
Output
(fanout to two
Series 54 gates,
or equivalent)
Copyright © 2016, Texas Instruments Incorporated
µ
µ
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,
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,
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9.2.3 Application Curves
Figure 14. Output Response for Various Input Overdrives Figure 15. Output Response for Various Input Overdrives
9.3 System Examples
Figure 16 through Figure 33 show various applications for the LM111, LM211, and LM311 comparators.
Figure 16. 100-kHz Free-Running Multivibrator
1 kΩ
BAL/STRB
TTL
Strobe 2N2222
Copyright © 2016, Texas Instruments Incorporated
3 kΩ
3 kΩ
VCC+
BALANCE
BAL/
STRB
Copyright © 2016, Texas Instruments Incorporated
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System Examples (continued)
If offset balancing is not used, the BALANCE and BAL/STRB pins must be unconnected. It is also acceptable to short
pins together.
Figure 17. Offset Balancing
Do not connect strobe pin directly to ground, because the output is turned off whenever current is pulled from the
strobe pin.
Figure 18. Strobing
0.1 Fµ
50 kΩ
VCC+
2 kΩ
100 kΩ
100 kΩ
100 kHz
Output
10 pF
Copyright © 2016, Texas Instruments Incorporated
5 V
2 kΩ
4.5 kΩ
1 kΩ
Magnetic
Transducer
Output
to TTL
Copyright © 2016, Texas Instruments Incorporated
†Resistor values shown are for a 0- to 30-V logic swing and a 15-V threshold.
‡May be added to control speed and reduce susceptibility to noise spikes
5 V
1 kΩ
240 kΩ
82 kΩ
47 kΩ
82 kΩ
Output to TTL
Input
‡
†
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System Examples (continued)
Figure 19. TTL Interface With High-Level Logic
Figure 20. Detector for Magnetic Transducer Figure 21. 100-kHz Crystal Oscillator
500 Ω3.9 kΩ
10 kΩ
1.5 µF
+
VCC+
Output
2N2222
2N3708
1 kΩ
Copyright © 2016, Texas Instruments Incorporated
3 kΩ
3 kΩ
VCC+ = 5 V
Input
10 kΩ
VCC− = −10 V
Output
to MOS
BAL/
STRB
BALANCE
Copyright © 2016, Texas Instruments Incorporated
†Typical input current is 50 pA with inputs strobed off.
VCC+
1 kΩ
From D/A Network
0.1 µF
Sample
Analog
Input
2N2222
†
TTL
Strobe
BAL/STRBBALANCE
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Input
22 kΩ
Output
VCC+
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,
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www.ti.com
SLCS007K –SEPTEMBER 1973–REVISED MARCH 2017
Product Folder Links: LM111 LM211 LM311
Submit Documentation FeedbackCopyright © 1973–2017, Texas Instruments Incorporated
System Examples (continued)
Figure 22. Comparator and Solenoid Driver Figure 23. Strobing Both Input and Output Stages
Simultaneously
Figure 24. Low-Voltage Adjustable Reference
Supply Figure 25. Zero-Crossing Detector Driving MOS
Logic
5 kΩ
0.01 µF
TTL
Output
1 kΩ
1 kΩ
1 kΩ
100 Ω
From
TTL
Gate
50 kΩ
Opto Isolator
5 V
VCC+ = 5 V
Copyright © 2016, Texas Instruments Incorporated
†Adjust to set clamp level
3.9 kΩ
30 kن
1.5 µF
+
VCC+ = 5 V
Input
From
TTL
2N2222
2N3708
Output
510 Ω
1 kΩ1 kΩ
2N2222
2N2222
2.2 kΩ
1N914
1N914
2.7 kΩ
Copyright © 2016, Texas Instruments Incorporated
18
LM111
,
LM211
,
LM311
SLCS007K –SEPTEMBER 1973–REVISED MARCH 2017
www.ti.com
Product Folder Links: LM111 LM211 LM311
Submit Documentation Feedback Copyright © 1973–2017, Texas Instruments Incorporated
System Examples (continued)
Figure 26. Precision Squarer
Figure 27. Digital Transmission Isolator
15 Fµ
+
10 kΩ
1 MΩ
VCC+ = 15 V
TL081
Output
Input
VCC− = −15 V
2 kΩ+
−
Copyright © 2016, Texas Instruments Incorporated
1.5 Fµ
+
10 kΩ
2 kΩ
VCC+ = 15 V
TL081
Output
Input
1 MΩ
VCC− = −15 V
−
+
Copyright © 2016, Texas Instruments Incorporated
19
LM111
,
LM211
,
LM311
www.ti.com
SLCS007K –SEPTEMBER 1973–REVISED MARCH 2017
Product Folder Links: LM111 LM211 LM311
Submit Documentation FeedbackCopyright © 1973–2017, Texas Instruments Incorporated
System Examples (continued)
Figure 28. Positive-Peak Detector
Figure 29. Negative-Peak Detector
‡Transient voltage and inductive kickback protection
2N3708
VCC+
Inputs
TTL
Strobe
VCC−
‡
1 kΩ
BAL/STRB
Copyright © 2016, Texas Instruments Incorporated
†R1 sets the comparison level. At comparison, the photodiode has less than 5 mV across it, decreasing dark current by an order of magnitude.
2N2222
2N3708
R1†
30 kΩ
3.9 kΩ
1 kΩ
Output
to TTL
VCC+ = 5 V
1N2175
Copyright © 2016, Texas Instruments Incorporated
20
LM111
,
LM211
,
LM311
SLCS007K –SEPTEMBER 1973–REVISED MARCH 2017
www.ti.com
Product Folder Links: LM111 LM211 LM311
Submit Documentation Feedback Copyright © 1973–2017, Texas Instruments Incorporated
System Examples (continued)
Figure 30. Precision Photodiode Comparator
Figure 31. Relay Driver With Strobe
V+
0.22 Fµ
300 kΩ
620 Ω
1
VCC−
2
VCC−
620 Ω
620 Ω
620 Ω
620 Ω
620 Ω
39 kΩ
510 Ω
510 Ω
15 kΩ
15 kΩ
39 kΩ
300 kΩ
Outputs
VCC+
Input
Reference
BAL/STRB
BAL/STRB
Copyright © 2016, Texas Instruments Incorporated
300 Ω
VCC+
VCC−
100 kΩOutput
100 kΩ
47 Ω
10 kΩ
620 Ω
Input
0.1 µF 300 Ω620 Ω
1
2
BAL/STRB
BAL/STRB
Copyright © 2016, Texas Instruments Incorporated
21
LM111
,
LM211
,
LM311
www.ti.com
SLCS007K –SEPTEMBER 1973–REVISED MARCH 2017
Product Folder Links: LM111 LM211 LM311
Submit Documentation FeedbackCopyright © 1973–2017, Texas Instruments Incorporated
System Examples (continued)
Figure 32. Switching Power Amplifier
Figure 33. Switching Power Amplifiers
EMIT OUT 1
1INí
2
1IN+
3
VCC- 4
8VCC+
7COL OUT
6BAL/STROB
5BALANCE
0.1µF
Ground
Bypass
Capacitor
Negative Supply or Ground
Positive Supply
0.1µF
Ground
Only needed
for dual power
supplies
Copyright © 2016, Texas Instruments Incorporated
22
LM111
,
LM211
,
LM311
SLCS007K –SEPTEMBER 1973–REVISED MARCH 2017
www.ti.com
Product Folder Links: LM111 LM211 LM311
Submit Documentation Feedback Copyright © 1973–2017, Texas Instruments Incorporated
10 Power Supply Recommendations
For fast response and comparison applications with noisy or AC inputs, use a bypass capacitor on the supply pin
to reject any variation on the supply voltage. This variation can affect the common-mode range of the comparator
input and create an inaccurate comparison.
11 Layout
11.1 Layout Guidelines
To create an accurate comparator application without hysteresis, maintain a stable power supply with minimized
noise and glitches, which can affect the high level input common-mode voltage range. To achieve this accuracy,
add a bypass capacitor between the supply voltage and ground. Place a bypass capacitor on the positive power
supply and negative supply (if available).
11.2 Layout Example
Figure 34. LMx11 Layout Example
23
LM111
,
LM211
,
LM311
www.ti.com
SLCS007K –SEPTEMBER 1973–REVISED MARCH 2017
Product Folder Links: LM111 LM211 LM311
Submit Documentation FeedbackCopyright © 1973–2017, Texas Instruments Incorporated
12 Device and Documentation Support
12.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 2. Related Links
PARTS PRODUCT FOLDER ORDER NOW TECHNICAL
DOCUMENTS TOOLS &
SOFTWARE SUPPORT &
COMMUNITY
LM111 Click here Click here Click here Click here Click here
LM211 Click here Click here Click here Click here Click here
LM311 Click here Click here Click here Click here Click here
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser based versions of this data sheet, refer to the left hand navigation.
PACKAGE OPTION ADDENDUM
www.ti.com 21-Jan-2021
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
JM38510/10304BPA ACTIVE CDIP JG 8 1 Non-RoHS
& Green SNPB N / A for Pkg Type -55 to 125 JM38510
/10304BPA
LM111FKB ACTIVE LCCC FK 20 1 Non-RoHS
& Green POST-PLATE N / A for Pkg Type -55 to 125 LM111FKB
LM111JG ACTIVE CDIP JG 8 1 Non-RoHS
& Green SNPB N / A for Pkg Type -55 to 125 LM111JG
LM111JGB ACTIVE CDIP JG 8 1 Non-RoHS
& Green SNPB N / A for Pkg Type -55 to 125 LM111JGB
LM211D ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LM211
LM211DE4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LM211
LM211DG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LM211
LM211DR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LM211
LM211DRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LM211
LM211P ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 LM211P
LM211PE4 ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 LM211P
LM211PW ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 L211
LM211PWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 L211
LM211PWRE4 ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 L211
LM211QD ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q
LM211QDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q
LM211QDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q
LM211QDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q
LM311D ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 LM311
PACKAGE OPTION ADDENDUM
www.ti.com 21-Jan-2021
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM311DE4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 LM311
LM311DG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 LM311
LM311DR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM 0 to 70 LM311
LM311DRE4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 LM311
LM311DRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 LM311
LM311P ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 LM311P
LM311PE4 ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 LM311P
LM311PSR ACTIVE SO PS 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 L311
LM311PSRE4 ACTIVE SO PS 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 L311
LM311PW ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 L311
LM311PWG4 ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 L311
LM311PWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 L311
LM311PWRG4 ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 L311
M38510/10304BPA ACTIVE CDIP JG 8 1 Non-RoHS
& Green SNPB N / A for Pkg Type -55 to 125 JM38510
/10304BPA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
PACKAGE OPTION ADDENDUM
www.ti.com 21-Jan-2021
Addendum-Page 3
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM211 :
•Automotive: LM211-Q1
•Enhanced Product: LM211-EP
NOTE: Qualified Version Definitions:
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•Enhanced Product - Supports Defense, Aerospace and Medical Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM211DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
LM211DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
LM211DRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
LM211DRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
LM211PWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1
LM211QDR SOIC D 8 2500 330.0 12.5 6.4 5.2 2.1 8.0 12.0 Q1
LM311DR SOIC D 8 2500 330.0 12.8 6.4 5.2 2.1 8.0 12.0 Q1
LM311DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
LM311DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
LM311DRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
LM311DRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
LM311PWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Oct-2020
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM211DR SOIC D 8 2500 340.5 338.1 20.6
LM211DR SOIC D 8 2500 853.0 449.0 35.0
LM211DRG4 SOIC D 8 2500 853.0 449.0 35.0
LM211DRG4 SOIC D 8 2500 340.5 338.1 20.6
LM211PWR TSSOP PW 8 2000 853.0 449.0 35.0
LM211QDR SOIC D 8 2500 340.5 338.1 20.6
LM311DR SOIC D 8 2500 364.0 364.0 27.0
LM311DR SOIC D 8 2500 340.5 338.1 20.6
LM311DR SOIC D 8 2500 853.0 449.0 35.0
LM311DRG4 SOIC D 8 2500 340.5 338.1 20.6
LM311DRG4 SOIC D 8 2500 853.0 449.0 35.0
LM311PWR TSSOP PW 8 2000 853.0 449.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Oct-2020
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
.228-.244 TYP
[5.80-6.19]
.069 MAX
[1.75]
6X .050
[1.27]
8X .012-.020
[0.31-0.51]
2X
.150
[3.81]
.005-.010 TYP
[0.13-0.25]
0 - 8 .004-.010
[0.11-0.25]
.010
[0.25]
.016-.050
[0.41-1.27]
4X (0 -15 )
A
.189-.197
[4.81-5.00]
NOTE 3
B .150-.157
[3.81-3.98]
NOTE 4
4X (0 -15 )
(.041)
[1.04]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
18
.010 [0.25] C A B
5
4
PIN 1 ID AREA
SEATING PLANE
.004 [0.1] C
SEE DETAIL A
DETAIL A
TYPICAL
SCALE 2.800
www.ti.com
EXAMPLE BOARD LAYOUT
.0028 MAX
[0.07]
ALL AROUND
.0028 MIN
[0.07]
ALL AROUND
(.213)
[5.4]
6X (.050 )
[1.27]
8X (.061 )
[1.55]
8X (.024)
[0.6]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
METAL SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
EXPOSED
METAL
OPENING
SOLDER MASK METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED
METAL
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SYMM
1
45
8
SEE
DETAILS
SYMM
www.ti.com
EXAMPLE STENCIL DESIGN
8X (.061 )
[1.55]
8X (.024)
[0.6]
6X (.050 )
[1.27] (.213)
[5.4]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
SYMM
SYMM
1
45
8
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUAR Y 1997
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE
0.310 (7,87)
0.290 (7,37)
0.014 (0,36)
0.008 (0,20)
Seating Plane
4040107/C 08/96
5
4
0.065 (1,65)
0.045 (1,14)
8
1
0.020 (0,51) MIN
0.400 (10,16)
0.355 (9,00)
0.015 (0,38)
0.023 (0,58)
0.063 (1,60)
0.015 (0,38)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.245 (6,22)
0.280 (7,11)
0.100 (2,54)
0°–15°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
www.ti.com
PACKAGE OUTLINE
C
TYP
6.6
6.2
1.2 MAX
6X 0.65
8X 0.30
0.19
2X
1.95
0.15
0.05
(0.15) TYP
0 - 8
0.25
GAGE PLANE
0.75
0.50
A
NOTE 3
3.1
2.9
B
NOTE 4
4.5
4.3
4221848/A 02/2015
TSSOP - 1.2 mm max heightPW0008A
SMALL OUTLINE PACKAGE
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153, variation AA.
18
0.1 C A B
5
4
PIN 1 ID
AREA
SEATING PLANE
0.1 C
SEE DETAIL A
DETAIL A
TYPICAL
SCALE 2.800
www.ti.com
EXAMPLE BOARD LAYOUT
(5.8)
0.05 MAX
ALL AROUND 0.05 MIN
ALL AROUND
8X (1.5)
8X (0.45)
6X (0.65)
(R )
TYP
0.05
4221848/A 02/2015
TSSOP - 1.2 mm max heightPW0008A
SMALL OUTLINE PACKAGE
SYMM
SYMM
LAND PATTERN EXAMPLE
SCALE:10X
1
45
8
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
www.ti.com
EXAMPLE STENCIL DESIGN
(5.8)
6X (0.65)
8X (0.45)
8X (1.5)
(R ) TYP0.05
4221848/A 02/2015
TSSOP - 1.2 mm max heightPW0008A
SMALL OUTLINE PACKAGE
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SYMM
SYMM
1
45
8
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:10X
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
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on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s
applicable warranties or warranty disclaimers for TI products.IMPORTANT NOTICE
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Copyright © 2021, Texas Instruments Incorporated
