INTEGRATED CIRCUITS DATA SHEET 74AHC14; 74AHCT14 Hex inverting Schmitt trigger Product specification Supersedes data of 1999 Sep 27 2003 May 26 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 FEATURES DESCRIPTION * Balanced propagation delays The 74AHC14 and 74AHCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. * Inputs accepts voltages higher than VCC * For 74AHC only: operates with CMOS input levels * For 74AHCT only: operates with TTL input levels The 74AHC14 and 74AHCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. * ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. * Specified from -40 to +85 C and -40 to +125 C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf 3.0 ns. TYPICAL SYMBOL PARAMETER CONDITIONS UNIT AHC AHCT tPHL/tPLH propagation delay nA to nY CL = 15 pF; VCC = 5 V 3.2 4.0 ns CI input capacitance VI = VCC or GND 3.0 3.0 pF CO output capacitance 4.0 4.0 pF CPD power dissipation capacitance per buffer 10 12 pF CL = 50 pF; f = 1 MHz; notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; (CL x VCC2 x fo) = sum of the outputs. 2. The condition is VI = GND to VCC. FUNCTION TABLE See note 1. INPUT OUTPUT nA nY L H H L Note 1. H = HIGH voltage level; L = LOW voltage level. 2003 May 26 2 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 ORDERING INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE 74AHC14D -40 to +125 C 14 SO14 plastic SOT108-1 74AHCT14D -40 to +125 C 14 SO14 plastic SOT108-1 74AHC14PW -40 to +125 C 14 TSSOP14 plastic SOT402-1 74AHCT14PW -40 to +125 C 14 TSSOP14 plastic SOT402-1 74AHC14BQ -40 to +125 C 14 DHVQFN14 plastic SOT762-1 74AHCT14BQ -40 to +125 C 14 DHVQFN14 plastic SOT762-1 PINNING PIN PIN SYMBOL DESCRIPTION SYMBOL DESCRIPTION 8 4Y data output 1 1A data input 9 4A data input 2 1Y data output 10 5Y data output 3 2A data input 11 5A data input 4 2Y data output 12 6Y data output 5 3A data input 13 6A data input 6 3Y data output 14 VCC supply voltage 7 GND ground (0 V) handbook, halfpage handbook, halfpage 1A 1 14 VCC 1Y 2 13 6A 2A 3 12 6Y 2Y 4 11 5A 3A 5 10 5Y 3Y 6 9 GND 7 8 4Y 14 4A VCC 1 14 1Y 2 13 6A 2A 3 12 6Y 2Y 4 11 5A 3A 5 10 5Y 3Y 6 9 4A Top view MNA203 1A GND(1) 7 8 GND 4Y MCE196 (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig.1 Pin configuration SO14 and TSSOP14. 2003 May 26 Fig.2 Pin configuration DHVQFN14. 3 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 handbook, halfpage 1 3 5 9 11 13 1A 1Y 2A 2Y 3A 3Y 4A 4Y 5A 5Y 6A 6Y handbook, halfpage 1 2 3 4 6 5 6 8 9 8 10 11 10 12 13 12 2 4 MNB034 MNA204 Fig.3 Logic symbol. handbook, halfpage A Fig.4 IEC logic symbol. Y MNA205 Fig.5 Logic diagram (one Schmitt trigger). 2003 May 26 4 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 RECOMMENDED OPERATING CONDITIONS 74AHC SYMBOL PARAMETER 74AHCT CONDITIONS UNIT MIN. TYP. MAX. MIN. TYP. MAX. 4.5 5.0 5.5 V VCC supply voltage 2.0 5.0 5.5 VI input voltage 0 - 5.5 0 - 5.5 V VO output voltage 0 - VCC 0 - VCC V Tamb operating ambient temperature - +25 - - +25 - C -40 - +125 -40 - +125 C -40 - +125 -40 - +125 C see DC and AC characteristics per device LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage -0.5 +7.0 V VI input voltage -0.5 +7.0 V IIK input diode current - -20 mA VI < -0.5 V; note 1 IOK output diode current VO < -0.5 V or VO > VCC + 0.5 V; note 1 - 20 mA IO output source or sink current -0.5 V < VO < VCC + 0.5 V - 25 mA ICC, IGND VCC or GND current - 75 mA Tstg storage temperature -65 +150 C PD power dissipation - 500 Tamb = -40 to +125 C; note 2 Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. For SO14 packages: above 70 C the value of PD derates linearly with 8 mW/K. For TSSOP14 packages: above 60 C the value of PD derates linearly with 5.5 mW/K. For DHVQFN14 packages: above 60 C the value of PD derates linearly with 4.5 mW/K. 2003 May 26 5 mW Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 DC CHARACTERISTICS Type 74AHC14 At recommended operating conditions; voltage are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER MIN. TYP. MAX. UNIT VCC (V) OTHER Tamb = 25 C VT+ VT- VH VOH positive going threshold negative going threshold hysteresis (VT+ - VT-) 3.0 - - 2.2 V 4.5 - - 3.15 V 5.5 - - 3.85 V 3.0 0.9 - - V 4.5 1.35 - - V 5.5 1.65 - - V 3.0 0.3 - 1.2 V 4.5 0.4 - 1.4 V 5.5 0.5 - 1.6 V 2.0 1.9 2.0 - V 3.0 2.9 3.0 - V 4.5 4.4 4.5 - V IO = -4.0 mA 3.0 2.58 - - V IO = -8.0 mA 4.5 3.94 - - V VI = VIH or VIL; IO = 50 A 2.0 - 0 0.1 V 3.0 - 0 0.1 V 4.5 - 0 0.1 V 3.0 - - 0.36 V HIGH-level output voltage; all outputs VI = VIH or VIL; IO = -50 A HIGH-level output voltage VI = VIH or VIL LOW-level output voltage; all outputs LOW-level output voltage VI = VIH or VIL IO = 8.0 mA 4.5 - - 0.36 V ILI input leakage current VI = VCC or GND 5.5 - - 0.1 A ICC quiescent supply current VI = VCC or GND; IO = 0 5.5 - - 2.0 A CI input capacitance - 3 10 pF VOH VOL VOL 2003 May 26 IO = 4.0 mA 6 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 TEST CONDITIONS SYMBOL PARAMETER MIN. TYP. MAX. UNIT VCC (V) OTHER Tamb = -40 to +85 C VT+ VT- VH VOH VOH VOL VOL positive going threshold negative going threshold hysteresis (VT+ - VT-) - 2.2 V 4.5 - - 3.15 V 5.5 - - 3.85 V 3.0 0.9 - - V 4.5 1.35 - - V 5.5 1.65 - - V 3.0 0.3 - 1.2 V 4.5 0.4 - 1.4 V 5.5 0.5 - 1.6 V 1.9 - - V 3.0 2.9 - - V 4.5 4.4 - - V IO = -4.0 mA 3.0 2.48 - - V IO = -8.0 mA 4.5 3.8 - - V VI = VIH or VIL; IO = 50 A 2.0 - - 0.1 V 3.0 - - 0.1 V 4.5 - - 0.1 V IO = 4.0 mA 3.0 - - 0.44 V IO = 8.0 mA 4.5 - - 0.44 V VI = VIH or VIL; IO = -50 A HIGH-level output voltage VI = VIH or VIL LOW-level output voltage - 2.0 HIGH-level output voltage; all outputs LOW-level output voltage; all outputs 3.0 VI = VIH or VIL ILI input leakage current VI = VCC or GND 5.5 - - 1.0 A ICC quiescent supply current VI = VCC or GND; IO = 0 5.5 - - 20 A CI input capacitance - - 10 pF 2003 May 26 7 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 TEST CONDITIONS SYMBOL PARAMETER MIN. TYP. MAX. UNIT VCC (V) OTHER Tamb = -40 to +125 C VT+ VT- VH VOH VOH VOL VOL positive going threshold negative going threshold hysteresis (VT+ - VT-) - 2.2 V 4.5 - - 3.15 V 5.5 - - 3.85 V 3.0 0.9 - - V 4.5 1.35 - - V 5.5 1.65 - - V 3.0 0.25 - 1.2 V 4.5 0.35 - 1.4 V 5.5 0.45 - 1.6 V 1.9 - - V 3.0 2.9 - - V 4.5 4.4 - - V IO = -4.0 mA 3.0 2.40 - - V IO = -8.0 mA 4.5 3.70 - - V VI = VIH or VIL; IO = 50 A 2.0 - - 0.1 V 3.0 - - 0.1 V 4.5 - - 0.1 V IO = 4.0 mA 3.0 - - 0.55 V IO = 8.0 mA 4.5 - - 0.55 V VI = VIH or VIL; IO = -50 A HIGH-level output voltage VI = VIH or VIL LOW-level output voltage - 2.0 HIGH-level output voltage; all outputs LOW-level output voltage; all outputs 3.0 VI = VIH or VIL ILI input leakage current VI = VCC or GND 5.5 - - 2.0 A ICC quiescent supply current VI = VCC or GND; IO = 0 5.5 - - 40 A CI input capacitance - - 10 pF 2003 May 26 8 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 Type 74AHCT14 At recommended operating conditions; voltage are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER MIN. TYP. MAX. UNIT VCC (V) OTHER Tamb = 25 C VT+ positive going threshold 4.5 - - 1.9 V 5.5 - - 2.1 V VT- negative going threshold 4.5 0.5 - - V 5.5 0.6 - - V VH hysteresis (VT+ - VT-) 4.5 0.4 - 1.4 V 5.5 0.4 - 1.5 V VOH HIGH-level output voltage; all outputs VI = VIH or VIL; IO = -50 A 4.5 4.4 4.5 - V VOH HIGH-level output voltage VI = VIH or VIL; IO = -8.0 mA 4.5 3.94 - - V VOL LOW-level output voltage; all outputs VI = VIH or VIL; IO = 50 A 4.5 - 0 0.1 V VOL LOW-level output voltage VI = VIH or VIL; IO = 8 mA 4.5 - - 0.36 V ILI input leakage current VI = VCC or GND 5.5 - - 0.1 A ICC quiescent supply current VI = VCC or GND; IO = 0 5.5 - - 2.0 A ICC additional quiescent VI = VCC - 2.1 V other supply current per input inputs at VCC or GND; pin IO = 0 4.5 to 5.5 - - 1.35 mA CI input capacitance - 3 10 pF 2003 May 26 9 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 TEST CONDITIONS SYMBOL PARAMETER MIN. TYP. MAX. UNIT VCC (V) OTHER Tamb = -40 to +85 C 4.5 - - 1.9 V 5.5 - - 2.1 V negative going threshold 4.5 0.5 - - V 5.5 0.6 - - V VH hysteresis (VT+ - VT-) 4.5 0.4 - 1.4 V 5.5 0.4 - 1.5 V VOH HIGH-level output voltage; all outputs VI = VIH or VIL; IO = -50 A 4.5 4.4 - - V VOH HIGH-level output voltage VI = VIH or VIL; IO = -8.0 mA 4.5 3.8 - - V VOL LOW-level output voltage; all outputs VI = VIH or VIL; IO = 50 A 4.5 - - 0.1 V VOL LOW-level output voltage VI = VIH or VIL; IO = 8 mA 4.5 - - 0.44 V ILI input leakage current VI = VCC or GND 5.5 - - 1.0 A ICC quiescent supply current VI = VCC or GND; IO = 0 5.5 - - 20 A ICC additional quiescent VI = VCC - 2.1 V other supply current per input inputs at VCC or GND; pin IO = 0 4.5 to 5.5 - - 1.5 mA CI input capacitance - - 10 pF VT+ VT- 2003 May 26 positive going threshold 10 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 TEST CONDITIONS SYMBOL PARAMETER MIN. TYP. MAX. UNIT VCC (V) OTHER Tamb = -40 to +125 C 4.5 - - 1.9 V 5.5 - - 2.1 V negative going threshold 4.5 0.5 - - V 5.5 0.6 - - V VH hysteresis (VT+ - VT-) 4.5 0.35 - 1.4 V 5.5 0.35 - 1.5 V VOH HIGH-level output voltage; all outputs VI = VIH or VIL; IO = -50 A 4.5 4.4 - - V VOH HIGH-level output voltage VI = VIH or VIL; IO = -8.0 mA 4.5 3.7 - - V VOL LOW-level output voltage; all outputs VI = VIH or VIL; IO = 50 A 4.5 - - 0.1 V VOL LOW-level output voltage VI = VIH or VIL; IO = 8 mA 4.5 - - 0.55 V ILI input leakage current VI = VCC or GND 5.5 - - 2.0 A ICC quiescent supply current VI = VCC or GND; IO = 0 5.5 - - 40 A ICC additional quiescent VI = VCC - 2.1 V other supply current per input inputs at VCC or GND; pin IO = 0 4.5 to 5.5 - - 1.5 mA CI input capacitance - - 10 pF VT+ VT- 2003 May 26 positive going threshold 11 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 AC CHARACTERISTICS Type 74AHC14 GND = 0 V; tr = tf 3.0 ns. TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER CL (pF) TYP. MAX. UNIT VCC (V) Tamb = 25 C tPHL/tPLH propagation delay nA to nY see Figs 6 and 7 15 3.3 - 4.3 - ns 15 3.0 to 3.6 - - 12.8 ns 50 3.3 - 5.8 - ns 50 3.0 to 3.6 - - 16.3 ns 15 5.0 - 3.2 - ns 15 4.5 to 5.5 - - 8.6 ns 50 5.0 - 4.2 - ns 50 4.5 to 5.5 - - 10.6 ns 15 3.0 to 3.6 1.0 - 15.0 ns 50 3.0 to 3.6 1.0 - 18.0 ns 15 4.5 to 5.5 1.0 - 10.0 ns 50 4.5 to 5.5 1.0 - 12.0 ns 15 3.0 to 3.6 1.0 - 16.0 ns 50 3.0 to 3.6 1.0 - 20.5 ns 15 4.5 to 5.5 1.0 - 11.0 ns 50 4.5 to 5.5 1.0 - 13.5 ns Tamb = -40 to +85 C tPHL/tPLH propagation delay nA to nY see Figs 6 and 7 Tamb = -40 to +125 C tPHL/tPLH 2003 May 26 propagation delay nA to nY see Figs 6 and 7 12 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 Type 74AHCT14 GND = 0 V; tr = tf 3.0 ns. TEST CONDITIONS SYMBOL PARAMETER MIN. CL (pF) OTHER TYP. MAX. UNIT VCC (V) Tamb = 25 C tPHL/tPLH propagation delay nA to nY see Figs 6 and 7 15 5.0 - 4.0 - ns 15 4.5 to 5.5 50 5.0 - - 7.0 ns - 5.4 - ns 50 4.5 to 5.5 - - 8.0 ns 15 4.5 to 5.5 1.0 - 8.0 ns 50 4.5 to 5.5 1.0 - 9.0 ns 15 4.5 to 5.5 1.0 - 9.0 ns 50 4.5 to 5.5 1.0 - 10.0 ns Tamb = -40 to +85 C tPHL/tPLH propagation delay nA to nY see Figs 6 and 7 Tamb = -40 to +125 C tPHL/tPLH propagation delay nA to nY see Figs 6 and 7 AC WAVEFORMS handbook, halfpage nA input VM tPHL tPLH VM nY output MNA209 FAMILY VI INPUT REQUIREMENTS VM INPUT VM OUTPUT 74AHC14 GND to VCC 0.5VCC 0.5VCC 74AHCT14 GND to 3.0 V 1.5 V 0.5VCC Fig.6 The input (nA) to output (nY) propagation delays. 2003 May 26 13 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 S1 handbook, full pagewidth VCC PULSE GENERATOR RL = VI 1 k VO D.U.T. CL RT MNA219 TEST S1 tPLH/tPHL open tPLZ/tPZL VCC tPHZ/tPZH GND Definitions for test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig.7 Load circuitry for switching times. 2003 May 26 14 VCC open GND Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 TRANSFER CHARACTERISTIC WAVEFORMS VO handbook, halfpage VI VT- VT- VH VO VI VH VT+ MNA208 VT+ MNA207 VT+ and VT- are between limits of 20% and 70%. Fig.8 Transfer characteristic. Fig.9 The definition of VT+, VT- and VH. MNA411 1.5 MNA412 5 I CC handbook, halfpage handbook, halfpage I CC (mA) (mA) 4 1 3 2 0.5 1 0 0 1 2 VI (V) 0 3 0 VCC = 3.0 V. 2 3 4 V (V) 5 I VCC = 4.5 V. Fig.10 Typical 74AHC transfer characteristic. 2003 May 26 1 Fig.11 Typical 74AHC transfer characteristic. 15 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 MNA413 6 MNA414 6 handbook, halfpage handbook, halfpage I CC (mA) I CC (mA) 4 4 2 2 0 0 0 2 4 VI (V) 6 0 VCC = 5.5 V. 1 2 3 4 V (V) 5 I VCC = 4.5 V. Fig.12 Typical AHC transfer characteristic. Fig.13 Typical 74AHCT transfer characteristic. MNA415 8 handbook, halfpage I CC (mA) R handbook, halfpage 6 4 C MNA206 2 0 0 2 4 VI (V) 6 1 1 74AHC14: f = --- --------------------T 0.55RC 1 1 74AHCT14: f = --- --------------------T 0.60RC VCC = 5.5 V. Fig.14 Typical 74AHCT transfer characteristics. 2003 May 26 Fig.15 Relaxation oscillator. 16 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 PACKAGE OUTLINES SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.35 0.014 0.0075 0.34 0.16 0.15 0.05 0.028 0.024 0.01 0.01 0.004 0.028 0.012 inches 0.069 0.244 0.039 0.041 0.228 0.016 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT108-1 076E06 MS-012 2003 May 26 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 17 o 8 0o Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index Lp L 1 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.72 0.38 8 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 2003 May 26 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 18 o Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 6 y y1 C v M C A B w M C b L 1 7 Eh e 14 8 13 9 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 3.1 2.9 1.65 1.35 2.6 2.4 1.15 0.85 0.5 2 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT762-1 --- MO-241 --- 2003 May 26 19 EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 To overcome these problems the double-wave soldering method was specifically developed. SOLDERING Introduction to soldering surface mount packages If wave soldering is used the following conditions must be observed for optimal results: This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical reflow peak temperatures range from 215 to 270 C depending on solder paste material. The top-surface temperature of the packages should preferably be kept: Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 C or 265 C, depending on solder material applied, SnPb or Pb-free respectively. * below 220 C (SnPb process) or below 245 C (Pb-free process) A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. - for all the BGA packages - for packages with a thickness 2.5 mm Manual soldering - for packages with a thickness < 2.5 mm and a volume 350 mm3 so called thick/large packages. Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. * below 235 C (SnPb process) or below 260 C (Pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C. Moisture sensitivity precautions, as indicated on packing, must be respected at all times. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. 2003 May 26 20 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE(1) WAVE BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable suitable(3) DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS not PLCC(4), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP REFLOW(2) suitable suitable suitable not recommended(4)(5) suitable not recommended(6) suitable Notes 1. For more detailed information on the BGA packages refer to the "(LF)BGA Application Note" (AN01026); order a copy from your Philips Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 4. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2003 May 26 21 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2003 May 26 22 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74AHC14; 74AHCT14 NOTES 2003 May 26 23 Philips Semiconductors - a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. SCA75 (c) Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613508/03/pp24 Date of release: 2003 May 26 Document order number: 9397 750 11221