NDS355AN_Q - ON SEMICONDUCTOR - Datasheet.Technology

NDS355AN

N-Channel Logic Level Enhancement Mode Field Effect Transistor

Features

Absolute Maximum Ratings TA = 25°C unless otherwise noted

Symbol Parameter NDS355ANUnits

VDSS Drain-Source Voltage 30 V

VGSS Gate-Source Voltage - Continuous ±20 V

IDMaximum Drain Current - Continuous (Note 1a) 1.7 A

- Pulsed 10

PDMaximum Power Dissipation (Note 1a)0.5 W

(Note 1b) 0.46

TJ,TSTG Operating and Storage Temperature Range -55 to 150 °C

THERMAL CHARACTERISTICS

RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 250 °C/W

RθJC Thermal Resistance, Junction-to-Case (Note 1) 75 °C/W

Publication Order Number:

NDS355AN/D

1.7A, 30 V, RDS(ON) = 0.125 Ω @ VGS = 4.5 V

RDS(ON) = 0.085 Ω @ VGS = 10 V.

Industry standard outline SOT-23 surface mount package

using proprietary SuperSOTTM-3 design for superior

thermal and electrical capabilities.

High density cell design for extremely low RDS(ON).

Exceptional on-resistance and maximum DC current

capability.

Compact industry standard SOT-23 surface mount

package.

_______________________________________________________________________________

General Description

SuperSOTTM-3 N-Channel logic level enhancement

mode power field effect transistors are produced using ON

Semiconductor's proprietary, high cell density, DMOS

technology. This very high density process is especially

tailored to minimize on-state resistance. These devices are

particularly suited for low voltage applications in notebook

computers, portable phones, PCMCIA cards, and other

battery powered circuits where fast switching, and low in-

line power loss are needed in a very small outline surface

mount package.

October-2017, Rev. 3

Electrical Characteristics (TA = 25°C unless otherwise noted)

Symbol Parameter Conditions Min Typ Max Units

OFF CHARACTERISTICS

BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 30 V

IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1µA

TJ =125°C 10 µA

IGSSF Gate - Body Leakage, Forward VGS = 20 VDS = 0 V 100 nA

IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS = 0 V -100 nA

ON CHARACTERISTICS (Note 2)

VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA11.6 2V

TJ =125°C 0.5 1.2 1.5

RDS(ON) Static Drain-Source On-Resistance VGS = 4.5 V, ID = 1.7 A0.105 0.125 Ω

TJ =125°C 0.16 0.23

VGS = 10 V, ID = 1.9 A0.065 0.085

ID(ON) On-State Drain Current VGS = 4.5 V, VDS = 5 V 6A

gFS Forward Transconductance VDS = 5 V, ID= 1.7 A 3.5 S

DYNAMIC CHARACTERISTICS

Ciss Input Capacitance VDS = 15 V, VGS = 0 V,

f = 1.0 MHz 195 pF

Coss Output Capacitance 135 pF

Crss Reverse Transfer Capacitance 48 pF

SWITCHING CHARACTERISTICS (Note 2)

td(on)Turn - On Delay Time VDD = 10 V, ID = 1 A,

VGS = 10 V, RGEN = 6 Ω10 20 ns

trTurn - On Rise Time 13 25 ns

td(off) Turn - Off Delay Time 13 25 ns

tfTurn - Off Fall Time 4 10 ns

td(on)Turn - On Delay Time VDD = 5 V, ID = 1 A,

VGS = 4.5 V, RGEN = 6 Ω10 20 ns

trTurn - On Rise Time 32 60 ns

td(off) Turn - Off Delay Time 10 20 ns

tfTurn - Off Fall Time 5 10 ns

QgTotal Gate Charge VDS = 10 V, ID = 1.7 A,

VGS = 5 V 3.5 5nC

Qgs Gate-Source Charge 0.8 nC

Qgd Gate-Drain Charge 1.7 nC

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Electrical Characteristics (TA = 25°C unless otherwise noted)

Symbol Parameter Conditions Min Typ Max Units

DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS

ISMaximum Continuous Drain-Source Diode Forward Current 0.42 A

ISM Maximum Pulsed Drain-Source Diode Forward Current 10 A

VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS =0.42 A (Note 2)0.8 1.2 V

Notes:

1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by

design while RθCA is determined by the user's board design.

PD(t)=TJ−TA

RθJA

(t)=TJ−TA

RθJC

+RθCA

(t)=ID

2(t)×RDS(ON)TJ

Typical RθJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:

a. 250oC/W when mounted on a 0.02 in2 pad of 2oz copper.

b. 270oC/W when mounted on a 0.001 in2 pad of 2oz copper.

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.

1a 1b

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Figure 1. On-Region Characteristics.

00.5 11.5 22.5 3

V , DRAIN-SOURCE VOLTAGE (V)

I , DRAIN-SOURCE CURRENT (A)

3.5

3.0

5.0

V =10V

4.5

4.0

6.0

7.0

Figure 2. On-Resistance Variation

with Drain Current and Gate Voltage.

0 1 2 3 4 5

0.4

0.6

0.8

1.2

1.4

1.6

1.8

I , DRAIN CURRENT (A)

DRAIN-SOURCE ON-RESISTANCE

T = 125°C

25°C

V = 4.5 V

-55°C

R , NORMALIZED

DS(on)

Figure 4. On-Resistance Variation

with Drain Current and Temperature.

-50 -25 025 50 75 100 125 150

0.6

0.8

1.2

1.4

1.6

T , JUNCTION TEMPERATURE (°C)

DRAIN-SOURCE ON-RESISTANCE

R , NORMALIZED

DS(ON)

ID= 1.6A

VGS = 4.5V

Figure 3. On-Resistance Variation

with Temperature.

11.5 22.5 33.5 4

V , GATE TO SOURCE VOLTAGE (V)

I , DRAIN CURRENT (A)

25°C

125°C

V = 5.0V

T = -55°C

Figure 5. Transfer Characteristics.

-50 -25 025 50 75 100 125 150

0.6

0.7

0.8

0.9

1.1

1.2

T , JUNCTION TEMPERATURE (°C)

GATE-SOURCE THRESHOLD VOLTAGE

I = 250µA

V = V

DS GS

V , NORMALIZED

Figure 6. Gate Threshold Variation

with Temperature.

0 2 4 6 8 10

0.4

0.6

0.8

1.2

1.4

1.6

1.8

I , DRAIN CURRENT (A)

DRAIN-SOURCE ON-RESISTANCE

V = 3.5V

R , NORMALIZED

DS(on)

4.0

6.0 7

5.0

4.5

Typical Electrical Characteristics

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Typical Electrical Characteristics (continued)

-50 -25 0 25 50 75 100 125 150

0.92

0.96

1.04

1.08

1.12

T , JUNCTION TEMPERATURE (°C)

DRAIN-SOURCE BREAKDOWN VOLTAGE

I = 250µA

BV , NORMALIZED

DSS

Figure 7. Breakdown Voltage Variation with

Temperature.

0.1 0.2 0.5 1 2 5 10 20 30

100

200

300

500

V , DRAIN TO SOURCE VOLTAGE (V)

CAPACITANCE (pF)

iss

f = 1 MHz

V = 0V

oss

rss

Figure 9. Capacitance Characteristics.

00.2 0.4 0.6 0.8 11.2

0.0001

0.001

0.01

0.1

V , BODY DIODE FORWARD VOLTAGE (V)

I , REVERSE DRAIN CURRENT (A)

T = 125°C

25°C

-55°C

V = 0V

Figure 8. Body Diode Forward Voltage Variation with

Source Current and Temperature.

0 2 4 6 8

Q , GATE CHARGE (nC)

V , GATE-SOURCE VOLTAGE (V)

I = 1.6A

D10V

15V

V = 5V

Figure 10. Gate Charge Characteristics.

VDD

OUT

VGS DUT

RGEN

Figure 11. Switching Test Circuit. Figure 12. Switching Waveforms.

10%

50%

90%

10%

90%

50%

VIN

VOUT

on off

d(off) f

d(on)

t t

ttt

INVERTED

10%

PULSE WIDTH

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Typical Electrical Characteristics (continued)

0246810

I , DRAIN CURRENT (A)

g , TRANSCONDUCTANCE (SIEMENS)

T = -55°C

25°C

V = 5.0V

125°C

Figure 13. Transconductance Variation with Drain

Current and Temperature.

00.1 0.2 0.3 0.4

0.2

0.4

0.6

0.8

2oz COPPER MOUNTING PAD AREA (in )

STEADY-STATE POWER DISSIPATION (W)

4.5"x5" FR-4 Board

T = 25 C

Still Air

Figue 15. SuperSOTTM _ 3 Maximum

Steady-State Power Dissipation versus Copper

Mounting Pad Area.

0.1 0.2 0.5 1 2 5 10 20 30 50

0.01

0.03

0.1

0.3

V , DRAI N-SOURCE VOLTAGE (V)

I , DRAIN CURRENT (A)

10ms

100ms

1ms

RDS(ON) LIMIT

V = 4.5V

SINGLE PULSE

R =See Note1b

T = 25°C

θJA

100us

Figure 14. Maximum Safe Operating Area.

00.1 0.2 0.3 0.4

1.2

1.4

1.6

1.8

2oz COPPER MOUNTING PAD AREA (in )

I , STEADY-STATE DRAIN CURRENT (A)

4.5"x5" FR-4 Board

T = 25 C

Still Air

V = 4.5V

Figure 16. Maximum Steady-State Drain

Current versus Copper Mounting Pad Area.

0.0001 0.001 0.01 0.1 110 100 300

0.001

0.002

0.005

0.01

0.02

0.05

0.1

0.2

0.5

t , TIME (sec)

TRANSIENT THERMAL RESISTANCE

Duty Cycle, D = t /t

R (t) = r(t) * R

R = See Note 1b

θJA

T - T = P * R (t)

θJA

P(pk)

1 t

r(t), NORMALIZED EFFECTIVE

Single Pulse

D = 0.5

0.1

0.05

0.02

0.01

0.2

Figure 17. Transient Thermal Response Curve.

Note : Characterization performed using the conditions described in note 1b. Transient thermal response will

change depending on the circuit board design.

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