SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES584A - JUNE 2005 - REVISED AUGUST 2005 FEATURES * Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 - 4000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) VCCA DIR A1 A2 A3 A4 A5 A6 A7 A8 GND GND 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCCB VCCB OE B1 B2 B3 B4 B5 B6 B7 B8 GND DIR A1 A2 A3 A4 A5 A6 A7 A8 GND VCCB RHL PACKAGE (TOP VIEW) DB, DBQ, DGV, OR PW PACKAGE (TOP VIEW) 1 24 3 4 23 VCCB 22 OE 21 B1 5 6 20 B2 19 B3 7 8 18 B4 17 B5 9 10 16 B6 15 B7 2 14 B8 11 12 13 GND * * VCCA * Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage VCC Isolation Feature - If Either VCC Input Is at GND, All Are in the High-Impedance State Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range GND * DESCRIPTION/ORDERING INFORMATION This 8-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74LVC8T245 is optimized to operate with VCCA and VCCB set at 1.65 V to 5.5 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5.5-V voltage nodes. ORDERING INFORMATION PACKAGE (1) TA -40C to 85C TOP-SIDE MARKING QFN - RHL Tape and reel SN74LVC8T245RHLR NH245 SSOP - DBR Tape and reel SN74LVC8T245DBR NH245 SSOP (QSOP) - DBQ Tape and reel SN74LVC8T245DBQR NH245 Tube SN74LVC8T245PW Tape and reel SN74LVC8T245PWR Tape and reel SN74LVC8T245DGVR TSSOP - PW TVSOP - DGV (1) ORDERABLE PART NUMBER NH245 NH245 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2005, Texas Instruments Incorporated SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES584A - JUNE 2005 - REVISED AUGUST 2005 DESCRIPTION/ORDERING INFORMATION (CONTINUED) The SN74LVC8T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ. The SN74LVC8T245 is designed so that the control pins (DIR and OE) are supplied by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, all outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. FUNCTION TABLE (1) (EACH 8-BIT SECTION) CONTROL INPUTS OE (1) OUTPUT CIRCUITS B PORT OPERATION DIR A PORT L L Enabled Hi-Z B data to A bus L H Hi-Z Enabled A data to B bus H X Hi-Z Hi-Z Isolation Input circuits of the data I/Os are always active. LOGIC DIAGRAM (POSITIVE LOGIC) DIR 2 22 OE A1 3 21 To Seven Other Channels 2 B1 SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES584A - JUNE 2005 - REVISED AUGUST 2005 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCCA VCCB Supply voltage range VI Input voltage range (2) MIN MAX -0.5 6.5 I/O ports (A port) -0.5 6.5 I/O ports (B port) -0.5 6.5 Control inputs -0.5 6.5 A port -0.5 6.5 B port -0.5 6.5 A port -0.5 VCCA + 0.5 B port -0.5 VCCB + 0.5 UNIT V V VO Voltage range applied to any output in the high-impedance or power-off state (2) VO Voltage range applied to any output in the high or low state (2) (3) IIK Input clamp current VI < 0 -50 mA IOK Output clamp current VO < 0 -50 mA IO Continuous output current 50 mA 100 mA Continuous current through each VCCA, VCCB, and GND JA Package thermal impedance (4) DB package 63 DBQ package 61 DGV package 86 PW package 88 RHL package Tstg (1) (2) (3) (4) Storage temperature range V V C/W 43 -65 150 C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The output positive-voltage rating may be exceeded up to 6.5 V maximum if the output current rating is observed. The package thermal impedance is calculated in accordance with JESD 51-7. 3 SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES584A - JUNE 2005 - REVISED AUGUST 2005 Recommended Operating Conditions (1) (2) (3) (4) VCCI VCCA VCCB VCCO Supply voltage High-level input voltage Data inputs (5) MAX 1.65 5.5 1.65 5.5 2.3 V to 2.7 V 1.7 3 V to 3.6 V VCCI x 0.7 VCCI x 0.35 1.65 V to 1.95 V VIL Data inputs (5) 2.3 V to 2.7 V 0.7 3 V to 3.6 V 0.8 VCCA x 0.65 1.65 V to 1.95 V High-level input voltage Control inputs (referenced to VCCA) (6) V VCCI x 0.3 4.5 V to 5.5 V VIH V V 2 4.5 V to 5.5 V Low-level input voltage UNIT VCCI x 0.65 1.65 V to 1.95 V VIH MIN 2.3 V to 2.7 V 1.7 3 V to 3.6 V V 2 VCCA x 0.7 4.5 V to 5.5 V VCCA x 0.35 1.65 V to 1.95 V 2.3 V to 2.7 V 0.7 3 V to 3.6 V 0.8 VIL Low-level input voltage Control inputs (referenced to VCCA) (6) VI Input voltage Control inputs 0 5.5 V Input/output voltage Active state 0 VCCO V 0 5.5 V VCCA x 0.3 4.5 V to 5.5 V VI/O IOH 3-State High-level output current 1.65 V to 1.95 V -4 2.3 V to 2.7 V -8 3 V to 3.6 V -24 4.5 V to 5.5 V -32 1.65 V to 1.95 V IOL Low-level output current t/v TA (1) (2) (3) (4) (5) (6) 4 Input transition rise or fall rate Data inputs Operating free-air temperature V mA 4 2.3 V to 2.7 V 8 3 V to 3.6 V 24 4.5 V to 5.5 V 32 1.65 V to 1.95 V 20 2.3 V to 2.7 V 20 3 V to 3.6 V 10 4.5 V to 5.5 V 5 -40 85 mA ns/V C VCCI is the VCC associated with the data input port. VCCO is the VCC associated with the output port. All unused or driven (floating) data inputs (I/Os) of the device must be held at logic HIGH or LOW (preferably VCCI or GND) to ensure proper device operation and minimize power. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. All unused control inputs must be held at VCCA or GND to ensure proper device operation and minimize power comsumption. For VCCI values not specified in the data sheet, VIH min = VCCI x 0.7 V, VIL max = VCCI x 0.3 V. For VCCA values not specified in the data sheet, VIH min = VCCA x 0.7 V, VIL max = VCCA x 0.3 V. SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES584A - JUNE 2005 - REVISED AUGUST 2005 Electrical Characteristics (1) (2) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOH VOL II DIR VCCA VCCB IOH = -100 A, TEST CONDITIONS VI = VIH 1.65 V to 4.5 V 1.65 V to 4.5 V IOH = -4 mA, VI = VIH 1.65 V 1.65 V 1.2 IOH = -8 mA, VI = VIH 2.3 V 2.3 V 1.9 IOH = -24 mA, VI = VIH 3V 3V 2.4 IOH = -32 mA, VI = VIH 4.5 V 4.5 V 3.8 IOL = 100 A, VI = VIL 1.65 V to 4.5 V 1.65 V to 4.5 V 0.1 IOL = 4 mA, VI = VIL 1.65 V 1.65 V 0.45 IOL = 8 mA, VI = VIL 2.3 V 2.3 V 0.3 IOL = 24 mA, VI = VIL 3V 3V 0.55 IOL = 32 mA, VI = VIL 4.5 V 4.5 V 1.65 V to 5.5 V 1.65 V to 5.5 V 1 2 0V 0 to 5.5 V 1 2 0 to 5.5 V 0V 1 2 1.65 V to 5.5 V 1.65 V to 5.5 V 1 2 1.65 V to 5.5 V 1.65 V to 5.5 V 15 5V 0V 15 0V 5V -2 1.65 V to 5.5 V 1.65 V to 5.5 V 15 5V 0V -2 0V 5V 15 1.65 V to 5.5 V 1.65 V to 5.5 V 25 VI = VCCA or GND Ioff A or B port VI or VO = 0 to 5.5 V IOZ A or B port VO = VCCO or GND, OE = VIH ICCA VI = VCCI or GND, ICCB VI = VCCI or GND, ICCA + ICCB VI = VCCI or GND, IO = 0 IO = 0 IO = 0 A port One A port at VCCA - 0.6 V, DIR at VCCA, B port = open DIR DIR at VCCA - 0.6 V, B port = open, A port at VCCA or GND ICCB B port One B port at VCCB - 0.6 V, DIR at GND, A port = open Ci Control inputs Cio A or B port ICCA (1) (2) MIN TYP MAX MIN MAX UNIT VCCO - 0.1 V V 0.55 A A A A A A 50 3 V to 5.5 V A 3 V to 5.5 V 50 3 V to 5.5 V 3 V to 5.5 V VI = VCCA or GND 3.3 V 3.3 V VO = VCCA/B or GND 3.3 V 3.3 V 50 A 4 5 pF 8.5 10 pF VCCO is the VCC associated with the output port. VCCI is the VCC associated with the input port. 5 SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES584A - JUNE 2005 - REVISED AUGUST 2005 Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.8 V 0.15 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPHZ tPLZ tPHZ tPLZ tPZH tPZL tPZH tPZL VCCB = 1.8 V 0.15 V FROM (INPUT) TO (OUTPUT) A B 1.7 B A OE MIN MAX VCCB = 2.5 V 0.2 V VCCB = 3.3 V 0.3 V VCCB = 5 V 0.5 V UNIT MIN MAX MIN MAX MIN MAX 21.9 1.3 9.2 1 7.4 0.8 7.1 ns 0.9 23.8 0.8 23.6 0.7 23.4 0.7 23.4 ns A 1.5 29.6 1.5 29.4 1.5 29.3 1.4 29.2 ns OE B 2.4 32.2 1.9 13.1 1.7 12 1.3 10.3 ns OE A 0.4 24 0.4 23.8 0.4 23.7 0.4 23.7 ns OE B 1.8 32 1.5 16 1.2 12.6 0.9 10.8 ns Switching Characteristics over recommended operating free-air temperature range, VCCA = 2.5 V 0.2 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPHZ tPLZ tPHZ tPLZ tPZH tPZL tPZH tPZL 6 FROM (INPUT) TO (OUTPUT) A VCCB = 1.8 V 0.15 V VCCB = 2.5 V 0.2 V VCCB = 3.3 V 0.3 V VCCB = 5 V 0.5 V UNIT MIN MAX MIN MAX MIN MAX MIN MAX B 1.5 21.4 1.2 9 0.8 6.2 0.6 4.8 ns B A 1.2 9.3 1 9.1 1 8.9 0.9 8.8 ns OE A 1.4 9 1.4 9 1.4 9 1.4 9 ns OE B 2.3 29.6 1.8 11 1.7 9.3 0.9 6.9 ns OE A 1 10.9 1 10.9 1 10.9 1 10.9 ns OE B 1.7 28.2 1.5 12.9 1.2 9.4 1 6.9 ns SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES584A - JUNE 2005 - REVISED AUGUST 2005 Switching Characteristics over recommended operating free-air temperature range, VCCA = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPHZ tPLZ tPHZ tPLZ tPZH tPZL tPZH tPZL VCCB = 1.8 V 0.15 V FROM (INPUT) TO (OUTPUT) A B 1.5 B A OE VCCB = 2.5 V 0.2 V MIN MAX VCCB = 3.3 V 0.3 V VCCB = 5 V 0.5 V UNIT MIN MAX MIN MAX MIN MAX 21.2 1.1 8.8 0.8 6.3 0.5 4.4 ns 0.8 7.2 0.8 6.2 0.7 6.1 0.6 6 ns A 1.6 8.2 1.6 8.2 1.6 8.2 1.6 8.2 ns OE B 2.1 29 1.7 10.3 1.5 8.6 0.8 6.3 ns OE A 0.8 8.1 0.8 8.1 0.8 8.1 0.8 8.1 ns OE B 1.8 27.7 1.4 12.4 1.1 8.5 0.9 6.4 ns Switching Characteristics over recommended operating free-air temperature range, VCCA = 5 V 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPHZ tPLZ tPHZ tPLZ tPZH tPZL tPZH tPZL FROM (INPUT) TO (OUTPUT) A VCC = 1.8 V 0.15 V VCC = 2.5 V 0.2 V VCC = 3.3 V 0.3 V VCC = 5 V 0.5 V MIN MAX UNIT MIN MAX MIN MAX MIN MAX B 1.5 21.4 1 8.8 0.7 6 0.4 4.2 ns B A 0.7 7 0.4 4.8 0.3 4.5 0.3 4.3 ns OE A 0.3 5.4 0.3 5.4 0.3 5.4 0.3 5.4 ns OE B 2 28.7 1.6 9.7 1.4 8 0.7 5.7 ns OE A 0.7 6.4 0.7 6.4 0.7 6.4 0.7 6.4 ns OE B 1.5 27.6 1.3 11.4 1 8.1 0.9 6 ns Operating Characteristics TA = 25C PARAMETER CpdA (1) CpdB (1) (1) TEST CONDITIONS A-port input, B-port output B-port input, A-port output A-port input, B-port output CL = 0, f = 10 MHz, tr = tf = 1 ns B-port input, A-port output VCCA = VCCB = 1.8 V VCCA = VCCB = 2.5 V VCCA = VCCB = 3.3 V VCCA = VCCB = 5 V TYP TYP TYP TYP 2 2 2 3 12 13 13 16 13 13 14 16 2 2 2 3 UNIT pF Power dissipation capacitance per transceiver 7 SN74LVC8T245 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES584A - JUNE 2005 - REVISED AUGUST 2005 PARAMETER MEASUREMENT INFORMATION 2 x VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 x VCCO GND RL tw LOAD CIRCUIT VCCI VCCI/2 Input VCCO CL RL VTP 1.8 V 0.15 V 2.5 V 0.2 V 3.3 V 0.3 V 5 V 0.5 V 15 pF 15 pF 15 pF 15 pF 2 k 2 k 2 k 2 k 0.15 V 0.15 V 0.3 V 0.3 V VCCI/2 0V VOLTAGE WAVEFORMS PULSE DURATION VCCA Output Control (low-level enabling) VCCA/2 VCCA/2 0V tPZL VCCI Input VCCI/2 VCCI/2 0V tPLH Output tPHL VCCO/2 VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOH VCCO/2 VOL tPLZ VCCO Output Waveform 1 S1 at 2 x VCCO (see Note B) VCCO/2 VOL + VTP VOL tPZH Output Waveform 2 S1 at GND (see Note B) tPHZ VCCO/2 VOH - VTP VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR10 MHz, ZO = 50 , dv/dt 1 V/ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. VCCI is the VCC associated with the input port. I. VCCO is the VCC associated with the output port. J. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 8 PACKAGE OPTION ADDENDUM www.ti.com 16-Aug-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) 74LVC8T245DBQRG4 ACTIVE SSOP DBQ 24 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 74LVC8T245RHLRG4 ACTIVE QFN RHL 24 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN74LVC8T245DBQR ACTIVE SSOP DBQ 24 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN74LVC8T245DBR ACTIVE SSOP DB 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC8T245DBRE4 ACTIVE SSOP DB 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC8T245DBRG4 ACTIVE SSOP DB 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC8T245DGVR ACTIVE TVSOP DGV 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC8T245DGVRG4 ACTIVE TVSOP DGV 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC8T245DWR ACTIVE SOIC DW 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC8T245DWRG4 ACTIVE SOIC DW 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC8T245NSR ACTIVE SO NS 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC8T245NSRG4 ACTIVE SO NS 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC8T245PW ACTIVE TSSOP PW 24 60 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC8T245PWE4 ACTIVE TSSOP PW 24 60 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC8T245PWG4 ACTIVE TSSOP PW 24 60 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC8T245PWR ACTIVE TSSOP PW 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC8T245PWRE4 ACTIVE TSSOP PW 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Samples (Requires Login) PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 16-Aug-2012 Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) SN74LVC8T245PWRG4 ACTIVE TSSOP PW 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC8T245RHLR ACTIVE QFN RHL 24 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74LVC8T245 : * Automotive: SN74LVC8T245-Q1 * Enhanced Product: SN74LVC8T245-EP NOTE: Qualified Version Definitions: Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 16-Aug-2012 * Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects * Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74LVC8T245DBQR Package Package Pins Type Drawing SSOP SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DBQ 24 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74LVC8T245DBR SSOP DB 24 2000 330.0 16.4 8.2 8.8 2.5 12.0 16.0 Q1 SN74LVC8T245DGVR TVSOP DGV 24 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LVC8T245DWR SOIC DW 24 2000 330.0 24.4 10.75 15.7 2.7 12.0 24.0 Q1 SN74LVC8T245NSR SO NS 24 2000 330.0 24.4 8.2 15.4 2.5 12.0 24.0 Q1 SN74LVC8T245PWR TSSOP PW 24 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1 SN74LVC8T245RHLR QFN RHL 24 1000 180.0 12.4 3.8 5.8 1.2 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVC8T245DBQR SSOP DBQ 24 2500 367.0 367.0 38.0 SN74LVC8T245DBR SSOP DB 24 2000 367.0 367.0 38.0 SN74LVC8T245DGVR TVSOP DGV 24 2000 367.0 367.0 35.0 SN74LVC8T245DWR SOIC DW 24 2000 367.0 367.0 45.0 SN74LVC8T245NSR SO NS 24 2000 367.0 367.0 45.0 SN74LVC8T245PWR TSSOP PW 24 2000 367.0 367.0 38.0 SN74LVC8T245RHLR QFN RHL 24 1000 210.0 185.0 35.0 Pack Materials-Page 2 MECHANICAL DATA MPDS006C - FEBRUARY 1996 - REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0-8 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins - MO-153 14/16/20/56 Pins - MO-194 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E - JANUARY 1995 - REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0-8 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. 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