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TIP110 / TIP111 / TIP112 — NPN Epitaxial Silicon Darlington Transistor
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
TIP110 / TIP111 / TIP112 Rev. 1.1.0
November 2014
TIP110 / TIP111 / TIP112
NPN Epitaxial Silicon Darlington Transistor
Features
• Monolithic Constructi on with Built-in Base -Emitte r
Shunt Resistors
• Complementary to TIP115 / TIP116 / TIP117
• High DC Current Gain:
hFE = 1000 @ VCE = 4 V, IC = 1 A (Minimum)
• Low Collector-Emitter Saturation Voltage
• Industr ial Use
Ordering Information
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the re co mmen ded operating conditions and s tres si ng the parts to these level s i s not recommended. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. Values are at TC = 25°C unless otherwise noted.
Part Number Top Mark Package Packing Method
TIP110 TIP110 TO-220 3L (Single Gauge) Bulk
TIP110TU TIP110 TO-220 3L (Single Gauge) Rail
TIP111TU TIP111 TO-220 3L (Single Gauge) Rail
TIP112 TIP112 TO-220 3L (Single Gauge) Bulk
TIP112TU TIP112 TO-220 3L (Single Gauge) Rail
Symbol Parameter Value Unit
VCBO Collector-Base Voltage TIP110 60 VTIP111 80
TIP112 100
VCEO Collector-Emitter Voltage TIP110 60 VTIP111 80
TIP112 100
VEBO Emitter-Base Voltage 5 V
ICCollector Current (DC) 2 A
ICP Collector Current (Pulse) 4 A
IBBase Current (DC) 50 mA
TJJunction Temperat ure 150 °C
TSTG Storage Temperature Range -65 to 150 °C
1.Base 2.Collector 3.Emitter
1TO-220
Equivalent Circuit
B
E
C
R1 R2
R1 10kΩ≅
R2 0.6kΩ≅
TIP110 / TIP111 / TIP112 — NPN Epitaxial Silicon Darlington Transistor
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
TIP110 / TIP111 / TIP112 Rev. 1.1.0 2
Thermal Characteristics
Values are at TC = 25°C unless otherwise noted.
Electrical Characteristics(1)
Values are at TC = 25°C unless otherwise noted.
Note:
1. Pulse test: pw ≤ 300 μs, duty cycle ≤ 2%.
Symbol Parameter Value Unit
PC Collector Dissipation (TA = 25°C) 2 W
Collector Dissipation (TC = 25°C) 50
Symbol Parameter Conditions Min. Max. Unit
VCEO(sus) Collector-Emitter Sustaining
Voltage
TIP110 IC = 30 mA, IB = 0 60 V TIP111 80
TIP112 100
ICEO Collector Cut-Off Current TIP110 VCE = 30 V, IB = 02
mA TIP111 VCE = 40 V, IB = 02
TIP112 VCE = 50 V, IB = 02
ICBO Collector Cut-Off Current TIP110 VCB = 60 V, IE = 0 1 mA TIP111 VCB = 80 V, IE = 0 1
TIP112 VCB = 100 V, IE = 0 1
IEBO Emitter Cut-Off Current VEB = 5 V, IC = 0 2 mA
hFE DC Current Gain VCE = 4 V, IC = 1 A 1000
VCE = 4 V, IC = 2 A 500
VCE(sat) Collector-Emitter Saturation Voltage IC = 2 A, IB = 8 mA 2.5 V
VBE(on) Base-Emitter On Voltage VCE = 4 V, IC = 2 A 2.8 V
Cob Output Capacitance VCB = 10 V, IE = 0,
f = 0.1 MHz 100 pF
TIP110 / TIP111 / TIP112 — NPN Epitaxial Silicon Darlington Transistor
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
TIP110 / TIP111 / TIP112 Rev. 1.1.0 3
Typical Performance Characteristics
Figure 1. Static Characteristic Figure 2. DC Current Gain
Figure 3. Base-Emitter Saturation Voltage and
Collector-Emitter Saturation Voltage Figure 4. Collector Output Capacitance
Figure 5. Safe Operating Area Figure 6. Power Derating
012345
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
IB = 4 00 μA
IB = 450μA
IB = 500μA
I
B
= 350
μ
A
I
B
= 300μA
I
B
= 250
μ
A
IB = 200μA
IB = 150μA
IC[A], COLLECTOR CURRENT
VCE[V], COLLECTOR-EMITTER VOLTAGE
0.01 0.1 1 10
10
100
1000
10000
VCE = 4V
hFE, DC CURRENT GAIN
IC[A], COLLECTOR CURRENT
0.01 0.1 1 10
0.1
1
10
100
IC = 500 IB
VCE(sat)
VBE(sat)
VBE(sat), VCE(sat)[V], SATURATION VOLTAGE
IC[A], COLLECTOR CURRENT
0.01 0.1 1 10 100
1
10
100
1000
f = 0.1 MHz
Cob[pF], CAPACITANCE
VCB[V], COLLECTOR-BASE VOLTAGE
1 10 100
0.1
1
10
1mS
5mS
DC
TIP 110
TIP 111
TIP 112
IC[A], COLLECTOR CURRENT
VCE[V], COLLECTOR-EMITTER VOLTAGE
0 25 50 75 100 125 150 175
0
10
20
30
40
50
60
70
80
PC[W], POWER DISSIPATION
TC[oC], CASE TEMPERATURE
TIP110 / TIP111 / TIP112 — NPN Epitaxial Silicon Darlington Transistor
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
TIP110 / TIP111 / TIP112 Rev. 1.1.0 4
Physical Dimensions
Figure 7. TO-220, MOLDED, 3LEAD, JEDEC VARIATION AB
© Fairchild Semiconductor Corporation www.fairchildsemi.com
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Rev. I72
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ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
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application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
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