PD-9.909 International Rectifier IRL530S HEXFET Power MOSFET Surface Mount Available in Tape & Reel Dynamic dv/dt Rating Repetitive Avalanche Rated @ Logic-Level Gate Drive G Rpsion) Specified at Vas=4V & 5V @ 175C Operating Temperature 3 Ip =15A Voss = 100V Rpsvon) = 0.1 60 Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SMD-220 is a surface mount power package capable of accommodating die sizes up to HEX-4. it provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The SMD-220 is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. SMD-220 Absolute Maximum Ratings | Parameter Max. Units lp @ To = 25C __ | Continuous Drain Current, Vas @ 5.0 V 15 Ip @ Te= 100C | Continuous Drain Current, Ves @ 5.0 V 11 A IDM Pulsed Drain Current 60 Pp @ Tc = 25C _| Power Dissipation 88 W Pp @ Ta= 25C __| Power Dissipation (PCB Mount)** 3.7 Linear Derating Factor 0.59 wre Linear Derating Factor (PCB Mount)** 0.025 Vas Gate-to-Source Voltage +10 Vv Eas Single Pulse Avalanche Energy @ 290 mJ lan Avalanche Current 15 A Ear Repetitive Avalanche Energy 8.8 mJ dv/dt Peak Diode Recovery dv/dt @ 5.5 Vins Ty, Tste Junction and Storage Temperature Range -55 to +175 C | Soldering Temperature, for 10 seconds | 300 (1.6mm from case} Thermal Resistance Parameter Min. Typ. Max. Units Roc Junction-to-Case _ on 1.7 Rea Junction-to-Ambient (PCB mount)** | _ | 40 C/W Rasa Junction-to-Ambient _ _ 62 ** When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. 1337IRL530S | Electrical Characteristics @ Tj = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. | Units Test Conditions Vieryoss Drain-to-Source Breakdown Voltage 100 ~ _ Vs | Ves=0V, In= 250nA AV (grypss/ATy| Breakdown Voltage Temp. Coefficient | 0.14) | V/C | Reference to 25C, Ip= 1mA Rosion) Static Drain-to-Source On-Resistance _| 0.16 Q Vas=5.0V, Ip=9.0A _ 0.22 Vas=4.0V, Ip=7.5A Veasith) Gate Threshold Voltage 1.0 _ 2.0 V__| Vps=Ves, lo= 250nA ' Ffs Forward Transconductance 6.4 _ S| Vps=50V, In=9.0A lpss Drain-to-Source Leakage Current 25 HA Vos=100V, Ves=0V _ _ 250 Vps=80V, Vas=0V, Ty=150C loss Gate-to-Source Forward Leakage _ _ 100 nA Vas=10V Gate-to-Source Reverse Leakage = | -100 Vas=-10V Qg Total Gate Charge = _ 28 Ip=15A Qgs Gate-to-Source Charge | | 38 | nC | Vps=80V Qoa Gate-to-Drain ("Miller") Charge = = 14 Vas=5.0V See Fig. 6 and 13 @ taton) Turn-On Delay Time _ 4.7 _ Vpp=50V tr Rise Time _ 100 _ ns [p=15A ta(oft) Turn-Off Delay Time _ 22 Re=12Q t Fall Time _ 48 _ Rp=322 See Figure 10 Lo Internal Drain Inductance _ 4.5 _ Baeza = + nH | from package (is ) Lg Internal Source Inductance | 75, and center of die contact 8 Ciss Input Capacitance _ 930 _ Vas=0V Coss Output Capacitance | 250 _ PF | Vps=25V Criss Reverse Transfer Capacitance _ 57 _ f=1.0MHz See Figure 5 Source-Drain Ratings and Characteristics Parameter Min. | Typ. | Max. | Units Test Conditions Is Continuous Source Current _ _ 45 MOSFET symbol 5 (Body Diode) A showing the Ism Pulsed Source Current _ _ 60 integral reverse & (Body Diode) p-n junction diode. s Vsp Diode Forward Voltage _ 2.5 Vi | Ty=25C, Is=15A, Vas=0V ter Reverse Recovery Time _ 150 | 200 ns | Ty=25C, |rF=15A Qn Reverse Recovery Charge | 093) 1.4 | pC jdi/dt=100A/ius ton Forward Turn-On Time Intrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lp) Notes: @ Repetitive rating; pulse width limited by Isos15A, di/dt<140A/us, VopsV(arR)pss, max. junction temperature (See Figure 11) Tys175C Vop=25V, starting Ty=25C, L=1.9mH @ Pulse width < 300 us; duty cycle <2%. R@=25Q, las=15A (See Figure 12) 1338lp, Drain Current (Amps) 2.25 20us WIOTH Te = 25C 100 Vos, Drain-to-Source Voltage (volts) to-! Fig 1. Typical Output Characteristics, Tc=25C Ip, Drain Current (Amps) Vpg = 50V 20us PULSE WIDTH 2.0 2.5 3.0 a. 4 Vas, Gate-to-Source Voltage (volts) 4.0 0 Fig 3. Typical Transfer Characteristics IRL530S Ip, Drain Current (Amps) 20us Te WIDTH 175C 107! Vps, Drain-to-Source Voltage (volts) Fig 2. Typical Output Characteristics, Tc=175C (Normalized) - ~ iS ~ w mn w in Rps(on), Drain-to-Source On Resistance VES = SY 0.0 60 -40 -20 0 20 40 60 80 100 120 140 160 180 Ty, Junction Temperature (C) Fig 4. Normalized On-Resistance Vs. Temperature 1339IRL530S 1500 Veg = OV, = 4MHz Cc = Cgg + Cgg, Cgg SHORTED gS = Cga 9g 1200 Cys + 2 sg oO aD f c & $ o 990 6 c 8 a 3 oO b @ 00 f 4 x 2 oO o 300 o 2 ise > SEE FIGURE 13 400 so! Vos, Drain-to-Source Voltage (volts) Qe, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voltage Gate-to-Source Voltage OPERATION IN THIS AREA LIMITED zg Y Ros (ON) a ~ Qa S 10! & 5 r= Oo o < & 5 5 o & 2 g S100 a r 6 8 Tc=25C L& Ty=1759C Yes = OV SINGLE 0.0 0.4 0.8 1.2 1.6 2.0 o.1.2 & 4 2 8 49 2 & 4o22 8 198 Vsp, Source-to-Drain Voltage (volts) Vps, Drain-to-Source Voltage (volts) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward Voltage 1340Ip, Drain Current (Amps) IRL530S D Vps D.U.T. A =! Vpp yP5.0V Pulse Width < 1s Duty Factor < 0.1% Lt on \L f 10% | | | | | | | | ! ! t 25 50 75 100 425 150 175 Vas SN oe To, Case Temperature (C) ta(on) te ta(ot) te Fig 9. Maximum Drain Current Vs. Fig 10b. Switching Time Waveforms Case Temperature Oo 9g D N 2 1 S a. a o @ E @ 9. im [ x Pom r SINGLE PULSE (THERMAL RESPONSE} trl ell NOTES: 4. DUTY FACTOR, D=t4/t2 2. PEAK Tj=Pom X Zthjc + Te 10 105 10-4 1073 10? O.4 1 10 t;, Rectangular Pulse Duration (seconds) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 134IRL530S Vary tp to obtain Vos > required las 800 Ip TOP. 6.1A 141A > BOTTOM 154 E 600 > 2 oO Cc uw . . wa. . & 400 Fig 12a. Unclamped Inductive Test Circuit 3 a. 2 Do = 200 a < 0 uw Vos 5 Co = 25v 25 50 75 100 125 180178 Starting Ty, Junction Temperature(C) lag _ ee Fig 12c. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator Ve tL f Charge > lg DB Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit - See page 1505 Appendix B: Package Outline Mechanical Drawing See page 1507 Appendix C: Part Marking Information See page 1515 International Appendix D: Tape & Reel Information See page 1519 Rectifier 1342