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4.0 Functional Description
The Thermocouple Board Version 1 component and
test point locations are shown in Figure 1. The board
schematic is shown in Figure 2.
4.1 Operational Modes
This board may be use in one of two modes: the
Computer Mode using the SPUSI2 USB Interface
Dongle or the Stand-Alone Mode without the use of
the SPUSI2 USB Interface Dongle and a PC.
4.1.1 The Computer Mode
The board is intended for use in the Computer Mode
with a SPUSI2 board. The Sensor Panel software
controls the measurements by communicating with
the ADC via the device’s SPI interface. Power to both
boards is provided via USB.
4.1.2 The Stand-Alone Mode
The Stand-Alone Mode does not use the SPUSI2
board to capture data and upload it to a PC. To use
the board this way, the user must provide +5V at pin
14 of header J3 as well as provide ADC clock, Chip
Select, and Data In signals to the ADC at pins 3, 1,
and 7 respectively, of J3. ADC data output is
available at pin 5 of J3. Test Points TP6, TP7, TP9
and TP5 may also be used to insert/read these
signals. The range of frequencies for the ADC clock
is 1 MHz to 4 MHz. The CS rate can be as low as
desired, but no faster than 17 times the ADC clock
rate.
4.2 Signal Conditioning Circuitry
The sensor output voltage is amplified and digitized
by U4, an ADC. The full-scale value of this voltage
after amplification will depend upon the maximum
sensor output and the component values. This
amplified voltage is presented to the ADC (U4),
whose output is at header J3.
4.2.1 Non-inverting (NI) Amplifier
Configuration
When minimal noise pickup is expected on the
thermocouple sensor line a non-inverting amplifier
configuration can be used. To set up the board in the
non-inverting amplifier configuration without
supplying negative bias to the amplifier or level
shifting the thermocouple sensor voltage ensure the
jumpers are in the following position
Table 2 – NI Amplifier Jumper Positions
Jumper Pins
Shorted FUNCTION
JP1 2 - 3 NI/Diff Select
JP2 2 - 3 NI Level Shifting (a)
JP3 1 - 2 NI Level Shifting (b)
JP4 Open Diff Level Shifting
JP5 2 - 3 Negative Bias Generator
JP6 2 - 3 ADC Reference Select
Amplifier A1A amplifies the output of the
thermocouple sensor. The gain of the non-inverting
amplifier is
Gain = 1 + RF1 / RG1.
A low pass filter is formed by RG2 and C1 which has
a cutoff frequency of
Cutoff Frequency = 1 / ( 2 * pi * RG2 * C1)
The WEBENCH Thermocouple Sensor Designer tool
will provide appropriate component values to achieve
your application gain and cutoff frequency
requirements.
4.2.2 Differential Amplifier Configuration
If moderate noise pickup is expected on the
thermocouple sensor line a differential amplifier
configuration will offer increased common mode
rejection (CMR). To set up the board in the
differential amplifier configuration without supplying
negative bias to the amplifier or level shifting the
thermocouple sensor voltage ensure the jumpers are
in the following position
Table 2 – Differential Amplifier Jumper Positions
Jumper Pins
Shorted FUNCTION
JP1 1 - 2 NI/Diff Select
JP2 Open NI Level Shifting (a)
JP3 1 - 2 NI Level Shifting (b)
JP4 2 - 3 Diff Level Shifting
JP5 2 - 3 Negative Bias Generator
JP6 2 – 3 ADC Reference Select
Amplifier A1A amplifies the differential output of the
thermocouple sensor. The gain of the differential
amplifier, assuming RG1 = RG2 and RF1 = RF2 is
Gain = RF1 / RG1
A low pass filter is formed by CF1 = CF2, and RF1 =
RF2 which has a cutoff frequency of
Cutoff Frequency = 1 / ( 2 * pi * RF1 * CF1)
The Webench® Thermocouple Sensor Designer tool
will provide appropriate component values to achieve
your application gain and cutoff frequency requirements.
4.2.3 Level Shifting
In many thermocouple applications the thermocouple
sensor is used in a temperature range where only a
positive output at the (+) terminal with respect to the
(-) terminal or only a negative output is expected. If
both positive and negative voltage is expected the
board allows for an offset which is provided from a
level shifting circuit. The level shifting voltage is set
up by VREF and the RLS1-RLS2 voltage divider,
then buffered through amplifier A1B. The level
shifting voltage is