1
FEATURES
APPLICATIONS
V+
IN1
IN4
NO4
COM4
NO3
COM3
NO1
COM1
NO2
IN2
COM2
IN3
GND
114
2
3
4
5
6
7
13
12
11
10
9
8
PW PACKAGE
(TOP VIEW)
RUC PACKAGE
(BOTTOM VIEW)
COM1
COM2
NO1
NO2
IN2
NO4
COM3
IN4
COM4
NO3
NO4
COM3
IN4
COM4
NO3
IN1
V+IN3
GND
13
4
2
5
3
1
9
11
8
10
12
6
14
7
RUC PACKAGE
(TOP VIEW)
COM1
COM2
NO1
NO2
IN2
V+
IN1 GND
IN3
14
4
2
5
3
1
9
11
8
10
12
7
13
6
RGY PACKAGE
(BOTTOM VIEW)
GND
NO3
NO1
V+
COM2
COM1
IN2
NO2
IN3
4
2
5
3
6
NO4
IN1
COM4
IN4
COM3
NO4
IN1
COM4
IN4
COM3
11
13
10
12
17
14 8
9
RGY PACKAGE
(TOP VIEW)
NO3
GND
V+
NO1
COM2
COM1
IN2
NO2
IN3
11
13
10
12
9
4
2
5
3
14 8
17
6
Exposed
Center
Pad
Exposed
Center
Pad
If the exposed center pad is used, it must be connected as a
secondary ground or left electrically open.
DESCRIPTION/ORDERING INFORMATION
TS3A4751
www.ti.com
.............................................................................................................................................................. SCDS227D JULY 2006 REVISED JULY 2008
0.9- LOW-VOLTAGE SINGLE-SUPPLY QUAD SPST ANALOG SWITCH
Low ON-State Resistance (r
ON
) 0.9 Max (3-V Supply) 1.5 Max (1.8-V Supply)r
ON
Flatness: 0.4 Max (3-V)r
ON
Matching
0.05 Max (3-V Supply) 0.25 Max (1.8-V Supply)1.6-V to 3.6-V Single-Supply Operation1.8-V CMOS Logic Compatible (3-V Supply)High Current-Handling Capacity (100 mAContinuous)
Fast Switching: t
ON
= 14 ns, t
OFF
= 9 nsESD Protection Exceeds JESD-22 4000-V Human Body Model (A114-A) 300-V Machine Model (A115-A) 1000-V Charged Device Model (C101)
Power RoutingBattery Powered SystemsAudio and Video Signal RoutingLow-Voltage Data-Acquisition SystemsCommunications CircuitsPCMCIA CardsCellular PhonesModems
Hard Drives
The TS3A4751 is a low ON-state resistance (r
on
), low-voltage, quad, single-pole/single-throw (SPST) analogswitch that operates from a single 1.6-V to 3.6-V supply. This device has fast switching speeds, handlesrail-to-rail analog signals, and consumes very low quiescent power.
The digital input is 1.8-V CMOS compatible when using a 3-V supply.
The TS3A4751 has four normally open (NO) switches. The TS3A4751 is available in a 14-pin thin shrinksmall-outline package (TSSOP) and in space-saving 14-pin SON (RGY) and micro QFN (RUC) packages.1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
ABSOLUTE MAXIMUM RATINGS
(1)
PACKAGE THERMAL IMPEDANCE
TS3A4751
SCDS227D JULY 2006 REVISED JULY 2008 ..............................................................................................................................................................
www.ti.com
ORDERING INFORMATION
T
A
PACKAGE
(1) (2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
SON RGY Reel of 2000 TS3A4751RGYR YC751 40 ° C to 85 ° C micro QFN RUC Reel of 2000 TS3A4751RUCR 3MTSSOP PW Reel of 2000 TS3A4751PWR YC751
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIwebsite at www.ti.com .
FUNCTION TABLE
NO TO COM,IN
COM TO NO
L OFFH ON
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
+
Supply voltage range referenced to GND
(2)
0.3 4 VV
NO
V
COM
Analog and digital voltage range 0.3 V
+
+ 0.3 VV
IN
I
NO
On-state switch current V
NO
, V
COM
= 0 to V
+
100 100 mAI
COM
I
+
Continuous current through V
+
or GND ± 100 mAI
GND
Peak current pulsed at 1 ms, 10% duty cycle COM, V
I/O
± 200 mAT
A
Operating temperature range 40 85 ° CT
J
Junction temperature 150 ° CT
stg
Storage temperature range 65 150 ° C
(1) Stresses beyond those listed under " absolute maximum ratings " may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under " recommended operatingconditions " is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) Signals on COM or NO exceeding V
+
or GND are clamped by internal diodes. Limit forward diode current to maximum current rating.
UNIT
PW package 88θ
JA
Package thermal impedance
(1)
RGY package 91.6 ° C/WRUC package 216.7
(1) The package thermal impedance is measured in accordance with JESD 51-7.
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ELECTRICAL CHARACTERISTICS FOR 3-V SUPPLY
(1) (2)
TS3A4751
www.ti.com
.............................................................................................................................................................. SCDS227D JULY 2006 REVISED JULY 2008
V
+
= 2.7 V to 3.6 V, T
A
= 40 ° C to 85 ° C, V
IH
= 1.4 V, V
IL
= 0.5 V (unless otherwise noted).
PARAMETER SYMBOL TEST CONDITIONS T
A
MIN TYP
(3)
MAX UNIT
Analog Switch
Analog signal range V
COM
, V
NO
0 V
+
V25 ° C 0.7 0.9V
+
= 2.7 V, I
COM
= 100 mA,ON-state resistance r
on
V
NO
= 1.5 V
Full 1.125 ° C 0.03 0.05ON-state resistance match V
+
= 2.7 V, I
COM
= 100 mA,Δr
on
between channels
(4)
V
NO
= 1.5 V
Full 0.1525 ° C 0.23 0.4ON-state resistance V
+
= 2.7 V, I
COM
= 100 mA,r
on(flat)
flatness
(5)
V
NO
= 1 V, 1.5 V, 2 V
Full 0.525 ° C 2 1 2NO V
+
= 3.6 V, V
COM
= 0.3 V, 3 V,I
NO(OFF)
nAOFF leakage current
(6)
V
NO
= 3 V, 0.3 V
Full 18 1825 ° C 2 1 2COM V
+
= 3.6 V, V
COM
= 0.3 V, 3 V,I
COM(OFF)
nAOFF leakage current
(6)
V
NO
= 3 V, 0.3 V
Full 18 1825 ° C 2.5 0.01 2.5COM V
+
= 3.6 V, V
COM
= 0.3 V, 3 V,I
COM(ON)
nAON leakage current
(6)
V
NO
= 0.3 V, 3 V, or floating
Full 5 5
Dynamic
25 ° C 5 14V
NO
= 1.5 V, R
L
= 50 ,Turn-on time t
ON
nsC
L
= 35 pF, See Figure 14
Full 1525 ° C 4 9V
NO
= 1.5 V, R
L
= 50 ,Turn-off time t
OFF
nsC
L
= 35 pF, See Figure 14
Full 10V
GEN
= 0, R
GEN
= 0, C
L
= 1 nF,Charge injection Q
C
25 ° C 3 pCSee Figure 15NO OFF capacitance C
NO(OFF)
f = 1 MHz, See Figure 16 25 ° C 23 pFCOM OFF capacitance C
COM(OFF)
f = 1 MHz, See Figure 16 25 ° C 20 pFCOM ON capacitance C
COM(ON)
f = 1 MHz, See Figure 16 25 ° C 43 pFBandwidth BW R
L
= 50 , Switch ON 25 ° C 125 MHzf = 10 MHz 40R
L
= 50 , C
L
= 5 pF,OFF isolation
(7)
O
ISO
25 ° C dBSee Figure 17
f = 1 MHz 62f = 10 MHz 73R
L
= 50 , C
L
= 5 pF,Crosstalk X
TALK
25 ° C dBSee Figure 17
f = 1 MHz 95R
L
= 32 0.04f = 20 Hz to 20 kHz,Total harmonic distortion THD 25 ° C %V
COM
= 2 V
P-P
R
L
= 600 0.003
Digital Control Inputs (IN1 IN4)
Input logic high V
IH
Full 1.4 VInput logic low V
IL
Full 0.5 V25 ° C 0.5 1Input leakage current I
IN
V
I
= 0 or V
+
nAFull 20 20
Supply
Power-supply range V
+
1.6 3.6 V25 ° C 0.075Positive-supply current I
+
V
+
= 3.6 V, V
IN
= 0 or V
+
µAFull 0.75
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.(2) Parts are tested at 85 ° C and specified by design and correlation over the full temperature range.(3) Typical values are at V
+
= 3 V, T
A
= 25 ° C.(4) Δr
on
= r
on(max)
r
on(min)(5) Flatness is defined as the difference between the maximum and minimum value of r
on
as measured over the specified analog signalranges.
(6) Leakage parameters are 100% tested at the maximum-rated hot operating temperature and specified by correlation at T
A
= 25 ° C.(7) OFF isolation = 20
log
10 (V
COM
/V
NO
), V
COM
= output, V
NO
= input to OFF switch
Copyright © 2006 2008, Texas Instruments Incorporated Submit Documentation Feedback 3
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ELECTRICAL CHARACTERISTICS FOR 1.8-V SUPPLY
(1) (2)
TS3A4751
SCDS227D JULY 2006 REVISED JULY 2008 ..............................................................................................................................................................
www.ti.com
V
+
= 1.65 V to 1.95 V, T
A
= 40 ° C to 85 ° C, V
IH
= 1 V, V
IL
= 0.4 V (unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS T
A
MIN TYP
(3)
MAX UNIT
Analog Switch
Analog signal range V
COM
, V
NO
0 V
+
V25 ° C 1 1.5V
+
= 1.8 V, I
COM
= 10 mA,ON-state resistance r
on
V
NO
= 0.9 V
Full 225 ° C 0.09 0.15ON-state resistance match V
+
= 1.8 V, I
COM
= 10 mA,Δr
on
between channels
(4)
V
NO
= 0.9 V
Full 0.2525 ° C 0.7 0.9ON-state resistance V
+
= 1.8 V, I
COM
= 10 mA,r
on(flat)
flatness
(5)
0V
NO
V
+
Full 1.525 ° C 1 0.5 1NO V
+
= 1.95 V, V
COM
= 0.15 V, 1.65 V,I
NO(OFF)
nAOFF leakage current
(6)
V
NO
= 1.8 V, 0.15 V
Full 10 1025 ° C 1 0.5 1COM V
+
= 1.95 V, V
COM
= 0.15 V, 1.65 V,I
COM(OFF)
nAOFF leakage current
(6)
V
NO
= 1.65 V, 0.15 V
Full 10 1025 ° C 1 0.01 1COM V
+
= 1.95 V, V
COM
= 0.15 V, 1.65 V,I
COM(ON)
nAON leakage current
(6)
V
NO
= 0.15 V, 1.65 V, or floating
Full 3 3
Dynamic
25 ° C 6 18V
NO
= 1.5 V, R
L
= 50 ,Turn-on time t
ON
nsC
L
= 35 pF, See Figure 14
Full 2025 ° C 5 10V
NO
= 1.5 V, R
L
= 50 ,Turn-off time t
OFF
nsC
L
= 35 pF, See Figure 14
Full 12V
GEN
= 0, R
GEN
= 0, C
L
= 1 nF,Charge injection Q
C
25 ° C 3.2 pCSee Figure 15NO OFF capacitance C
NO(OFF)
f = 1 MHz, See Figure 16 25 ° C 23 pFCOM OFF capacitance C
COM(OFF)
f = 1 MHz, See Figure 16 25 ° C 20 pFCOM ON capacitance C
COM(ON)
f = 1 MHz, See Figure 16 25 ° C 43 pFBandwidth BW R
L
= 50 , Switch ON 25 ° C 123 MHzf = 10 MHz 61R
L
= 50 , C
L
= 5 pF,OFF isolation
(7)
O
ISO
25 ° C dBSee Figure 17
f = 100 MHz 36f = 10 MHz 95R
L
= 50 , C
L
= 5 pF,Crosstalk X
TALK
25 ° C dBSee Figure 17
f = 100 MHz 73R
L
= 32 0.14f = 20 Hz to 20 kHz, V
COMTotal harmonic distortion THD 25 ° C %= 2 V
P-P
R
L
= 600 0.013
Digital Control Inputs (IN1 IN4)
Input logic high V
IH
Full 1 VInput logic low V
IL
Full 0.4 V25 ° C 0.1 5Input leakage current I
IN
V
I
= 0 or V
+
nAFull 10 10
Supply
Power-supply range V
+
1.6 3.6 V25 ° C 0.05Positive-supply current I
+
V
I
= 0 or V
+
µAFull 0.5
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.(2) Parts are tested at 85 ° C and specified by design and correlation over the full temperature range.(3) Typical values are at T
A
= 25 ° C.(4) Δr
on
= r
on(max)
r
on(min)(5) Flatness is defined as the difference between the maximum and minimum value of r
on
as measured over the specified analog signalranges.
(6) Leakage parameters are 100% tested at the maximum-rated hot operating temperature and specified by correlation at T
A
= 25 ° C.(7) OFF isolation = 20
log
10 (V
COM
/V
NO
), V
COM
= output, V
NO
= input to OFF switch
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TYPICAL PERFORMANCE
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0.0 0.5 1.0 1.5 2.0 2.5 3.0
VCOM (V)
ron ()
V+ = 2.7 V
V+ = 1.8 V
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0.0 0.5 1.0 1.5 2.0
VCOM (V)
ron (W)
855C
255C
–405C
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0
VCOM (V)
ron (W)
855C
255C
–405C
1.00
10.00
100.00
1000.00
TA (°C)
Inc/com (pA)
−40°C 25°C 85°C
NC/NO (OFF)
COM (ON)
0
5
10
15
20
25
30
35
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
VCOM (V)
QC (pC)
V+ = 1.8 V
V+ = 3 V
0
1
2
3
4
5
6
7
8
1.6 2.0 2.4 2.8 3.2 3.6 4.0
V+ (V)
tON/tOFF (ns)
tON
tOFF
TS3A4751
www.ti.com
.............................................................................................................................................................. SCDS227D JULY 2006 REVISED JULY 2008
Figure 1. r
on
vs V
COM
Figure 2. r
on
vs V
COM
(V
+
= 1.8 V)
Figure 3. r
on
vs V
COM
(V
+
= 2.7 V) Figure 4. I
ON
and I
OFF
vs Temperature
(V
+
= 3.6 V)
Figure 5. Q
C
vs V
COM
Figure 6. t
ON
and t
OFF
vs Supply Voltage
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0
1
2
3
4
5
6
7
TA (°C)
tON/tOFF (ns)
−40°C 25°C 85°C
tOFF = 1.8 V
tON = 3 V
tOFF = 3 V
tON = 1.8 V
−14
−12
−10
−8
−6
−4
−2
0
Gain (dB)
Frequency (MHz)
0.1 1 100010 100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
Attenuation (dB)
Frequency (MHz)
0.1 1 100010 100
0.0000
0.0004
0.0008
0.0012
0.0016
0.0020
0.0024
0.0028
0.0032
0.0036
0.0040
0
THD (%)
Frequency (kHz)
10 100 100K1K 10K
0.036
0.037
0.038
0.039
0.040
0.041
0.042
0
THD (%)
Frequency (kHz)
10 100 100K1K 10K
TS3A4751
SCDS227D JULY 2006 REVISED JULY 2008 ..............................................................................................................................................................
www.ti.com
TYPICAL PERFORMANCE (continued)
Figure 7. t
ON
and t
OFF
vs Temperature Figure 8. I
CC
vs V
+
Figure 9. Gain vs Frequency Figure 10. OFF Isolation vs Frequency(V
+
= 3 V) (V
+
= 3 V)
Figure 11. Total Harmonic Distortion vs Frequency Figure 12. Total Harmonic Distortion vs Frequency(R
L
= 32 ) (R
L
= 600 )
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−120
−100
−80
−60
−40
−20
0
0
Attenuation (dB)
Frequency (MHz)
0.1 1 100010 100
TS3A4751
www.ti.com
.............................................................................................................................................................. SCDS227D JULY 2006 REVISED JULY 2008
TYPICAL PERFORMANCE (continued)
Figure 13. Crosstalk vs Frequency (V
+
= 3 V)
PIN DESCRIPTION
PIN NO. NAME DESCRIPTION
1, 3, 8, 11 NO1, NO2, NO3, NO4 Normally openCOM1, COM2, COM3,2, 4, 9, 10 CommonCOM47 GND Ground13, 5, 6, 12 IN1, IN2, IN3, IN4 Logic control inputs14 V
+
Positive supply voltage
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APPLICATION INFORMATION
Logic Inputs
Analog Signal Levels
Layout
TS3A4751
SCDS227D JULY 2006 REVISED JULY 2008 ..............................................................................................................................................................
www.ti.com
Proper power-supply sequencing is recommended for all CMOS devices. Do not exceed the absolute maximumratings because stresses beyond the listed ratings can cause permanent damage to the devices. Alwayssequence V
+
on first, followed by NO or COM.
Although it is not required, power-supply bypassing improves noise margin and prevents switching noisepropagation from the V
+
supply to other components. A 0.1- µF capacitor, connected from V
+
to GND, isadequate for most applications.
The TS3A4751 logic inputs can be driven up to 3.6 V, regardless of the supply voltage. For example, with a1.8-V supply, IN may be driven low to GND and high to 3.6 V. Driving IN rail to rail minimizes powerconsumption.
Analog signals that range over the entire supply voltage (V
+
to GND) can be passed with very little change in r
on(see Typical Operating Characteristics). The switches are bidirectional, so NO and COM can be used as eitherinputs or outputs.
High-speed switches require proper layout and design procedures for optimum performance. Reduce strayinductance and capacitance by keeping traces short and wide. Ensure that bypass capacitors are as close to thedevice as possible. Use large ground planes where possible.
8Submit Documentation Feedback Copyright © 2006 2008, Texas Instruments Incorporated
Product Folder Link(s): TS3A4751
TEST CIRCUITS/TIMING DIAGRAMS
V+
VNO
NO
GND
COM
IN VCOM
50 W35pF
a
35pF
50%
90%
50%
90%
tOFF
tON
t <5ns
t
R
F<5ns
0
0
VNO
VCOM
VIH +0.5V
IN
V+
V+
RGEN
NO
V+
GND
COM
IN VO
C
1000pF
L
a
VI
VGEN
0
V+
VI
VODVO
TS3A4751
www.ti.com
.............................................................................................................................................................. SCDS227D JULY 2006 REVISED JULY 2008
Figure 14. Switching Times
Figure 15. Charge Injection (Q
C
)
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V+
NO
V+
GND
COM
IN
As
Required
1-MHz
Capacitance
Analyzer
V+
NO
V+
GND
COM
IN
Network
Analyzer
Measurementsarestandardizedagainst
shortatsocketterminals.OFFisolationis
measuredbetweenCOMandOFFterminals
oneachswitch.Bandwidthismeasuredbetween
COMandONterminalsoneachswitch.Signal
directionthroughswitchisreversed;worst
valuesarerecorded.
OFFisolation=20log
Add50- terminationfor
OFFisolation
V /V
O I
(1) W
50 W50 W
50 W50 W
VI
VO
0.1 Fm
Meas Ref
V+
(1)
TS3A4751
SCDS227D JULY 2006 REVISED JULY 2008 ..............................................................................................................................................................
www.ti.com
Figure 16. NO and COM Capacitance
Figure 17. OFF Isolation, Bandwidth, and Crosstalk
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Product Folder Link(s): TS3A4751
NO
COM
V+/2
IN
600 W
Audio Analyzer
Signal
Source
CL=50pF
RL=600 W
ChannelON:COMtoNO
VSOURCE =V+P-P
VI=V+/2
fSOURCE =20Hzto20kHz
-V+/2
CL(A)
600 W
TS3A4751
www.ti.com
.............................................................................................................................................................. SCDS227D JULY 2006 REVISED JULY 2008
A. C
L
includes probe and jig capacitance.
Figure 18. Total Harmonic Distortion (THD)
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PACKAGE OPTION ADDENDUM
www.ti.com 16-May-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TS3A4751PWR ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A4751PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TS3A4751RGYR ACTIVE VQFN RGY 14 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TS3A4751RGYRG4 ACTIVE VQFN RGY 14 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TS3A4751RUCR ACTIVE QFN RUC 14 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 16-May-2011
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TS3A4751PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TS3A4751RGYR VQFN RGY 14 3000 330.0 12.4 3.75 3.75 1.15 8.0 12.0 Q1
TS3A4751RUCR QFN RUC 14 3000 179.0 8.4 2.25 2.25 0.55 4.0 8.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TS3A4751PWR TSSOP PW 14 2000 367.0 367.0 35.0
TS3A4751RGYR VQFN RGY 14 3000 367.0 367.0 35.0
TS3A4751RUCR QFN RUC 14 3000 203.0 203.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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