© Semiconductor Components Industries, LLC, 2017
December, 2018 Rev. 4
1Publication Order Number:
NCP177/D
NCP177
Linear Voltage Regulator
Fast Transient Response
500 mA with Enable
The NCP177 is CMOS LDO regulator featuring 500 mA output
current. The input voltage is as low as 1.6 V and the output voltage can
be set from 0.7 V.
Features
Operating Input Voltage Range: 1.6 V to 5.5 V
Output Voltage Range: 0.7 V to 3.6 V
Quiescent Current typ. 60 mA
Low Dropout: 200 mV Typ. at 500 mA, VOUTNOM = 1.8 V
High Output Voltage Accuracy ±0.8%
Stable with Small 1 mF Ceramic Capacitors
Overcurrent Protection
Thermal Shutdown Protection: 175°C
With (NCP177A) and Without (NCP177B) Output Discharge
Function
Available in XDFN4 1 mm x 1 mm x 0.4 mm Package
This is a PbFree Device
Typical Applications
Battery Powered Equipment
Portable Communication Equipment
Cameras, Image Sensors and Camcorders
Figure 1. Typical Application
Schematic
NCP177
IN
EN
OUT
GND
COUT
1 μF
CIN
1 μF
OFF
ON
VIN VOUT
MARKING DIAGRAM
XDFN4
CASE 711AJ
See detailed ordering, marking and shipping information on
page 10 of this data sheet.
ORDERING INFORMATION
(Top View)
www.onsemi.com
XX = Specific Device Code
M = Date Code
XX M
1
1
EPAD
OUT GND
IN EN
43
12
PINOUT DIAGRAM
NCP177
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2
Figure 2. Internal Block Diagram
IN
EN
OUT
GND
PROG . VOLTAGE
REFERENCE AND
SOFT START
0.7 V
THERMAL
SHUTDOWN
NCP177A (with output active discharge) NCP177B (without output active discharge)
IN
EN
OUT
GND
PROG . VOLTAGE
REFERENCE AND
SOFT START
0.7 V
THERMAL
SHUTDOWN
PIN FUNCTION DESCRIPTION
Pin No. Pin Name Description
1 OUT Regulated output voltage pin
2 GND Power supply ground pin
3 EN Enable pin (active “H”)
4 IN Power supply input voltage pin
EPAD Exposed pad should be tied to ground plane for better power dissipation
ABSOLUTE MAXIMUM RATINGS
Rating Symbol Value Unit
Input Voltage (Note 1) IN 0.3 to 6.0 V
Output Voltage OUT 0.3 to VIN + 0.3 V
Chip Enable Input EN 0.3 to 6.0 V
Output Current IOUT Internally Limited mA
Maximum Junction Temperature TJ(MAX) 150 °C
Storage Temperature TSTG 55 to 150 °C
ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V
ESD Capability, Machine Model (Note 2) ESDMM 200 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per JESD22A114
ESD Machine Model tested per JESD22A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78
THERMAL CHARACTERISTICS
Rating Symbol Value Unit
Thermal Characteristics, XDFN4 (Note 3)
Thermal Resistance, JunctiontoAir
RqJA 223 °C/W
3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD517
NCP177
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3
ELECTRICAL CHARACTERISTICS
VIN = VOUTNOM + 0.5 V or VIN = 1.6 V (whichever is higher), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C
The specifications in bold are guaranteed at 40°C TJ 85°C. (Note 4)
Parameter Test Conditions Symbol Min Typ Max Unit
Input Voltage VIN 1.6 5.5 V
Output Voltage VOUT_NOM 1.8 V TJ = +25°CVOUT 0.8 0.8 %
40°C TJ 85°C2.0 1.0
VOUT_NOM < 1.8 V TJ = +25°C1.2 1.2
40°C TJ 85°C2.5 1.5
Line Regulation VIN = VOUTNOM + 0.5 V to 5.25 V
VIN 1.6 V
LineReg 0.02 0.1 %/V
Load Regulation 1 mA IOUT 500 mA LoadReg 1 10 mV
Dropout Voltage (Note 5) IOUT = 500 mA 1.4 V VOUT < 1.8 V VDO 295 380 mV
1.8 V VOUT < 2.1 V 200 285
2.1 V VOUT < 2.5 V 160 240
2.5 V VOUT < 3.0 V 130 200
3.0 V VOUT < 3.6 V 110 175
Quiescent Current IOUT = 0 mA IQ60 90 mA
Standby Current VEN = 0 V ISTBY 0.1 1mA
Output Current Limit VOUT = VOUTNOM 100 mV IOUT 510 800 mA
Short Circuit Current VOUT = 0 V ISC 510 800 mA
EN Pin Threshold Voltage EN Input Voltage “H” VENH 1.0 V
EN Input Voltage “L” VENL 0.4
Enable Input Current VEN = VIN = 5.5 V IEN 0.15 0.6 mA
Power Supply Rejection Ratio f = 1 kHz, Ripple 0.2 Vpp,
VIN = VOUTNOM + 1.0 V, IOUT = 30 mA
(VOUT 2.0 V, VIN = 3.0 V)
PSRR 75 dB
Output Noise f = 10 Hz to 100 kHz 54 mVRMS
Output Discharge Resistance
(NCP177A option only)
VIN = 4.0 V, VEN = 0 V, VOUT = VOUTNOM RACTDIS 60 W
Thermal Shutdown Temperature Temperature rising from 25°C TSD_TEMP 175 °C
Thermal Shutdown Hysteresis Temperature falling from TSD_TEMP TSD_HYST 20 °C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C.
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Measured when the output voltage falls 3% below the nominal output voltage (the voltage measured under the condition VIN = VOUTNOM
+ 0.5 V).
NCP177
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4
TYPICAL CHARACTERISTICS
VIN = VOUTNOM + 0.5 V or VIN = 1.6 V (whichever is higher), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C
Figure 3. Output Voltage vs. Temperature Figure 4. Output Voltage vs. Temperature
TEMPERATURE (°C) TEMPERATURE (°C)
8060402002040
0.683
0.688
0.693
0.698
0.703
0.708
8060402002040
1.764
1.774
1.784
1.794
1.804
1.814
Figure 5. Output Voltage vs. Temperature Figure 6. Line Regulation vs. Temperature
TEMPERATURE (°C) TEMPERATURE (°C)
8060402002040
3.234
3.244
3.264
3.274
3.294
3.304
3.324
8060402002040
0.10
0.08
0.04
0.02
0
0.02
0.06
0.10
Figure 7. Load Regulation vs. Temperature Figure 8. Dropout Voltage vs. Output Current
TEMPERATURE (°C) OUTPUT CURRENT (mA)
8060402002040
5
4
2
1
0
2
3
5
5004003002001000
0
25
75
100
150
200
225
275
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
LINE REGULATION (%/V)
LOAD REGULATION (mV)
DROPOUT VOLTAGE (mV)
3.254
3.284
3.314
VOUTNOM = 0.7 V VOUTNOM = 1.8 V
VOUTNOM = 3.3 V 0.06
0.04
0.08 VOUTNOM = 3.3 V
VIN = 3.8 V to 5.25 V
VOUTNOM = 3.3 V
IOUT = 1 mA to 500 mA
3
1
4
50
125
175
250 VOUTNOM = 1.8 V
TJ = 85°C
TJ = 25°C
TJ = 40°C
NCP177
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TYPICAL CHARACTERISTICS
VIN = VOUTNOM + 0.5 V or VIN = 1.6 V (whichever is higher), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C
Figure 9. Dropout Voltage vs. Temperature Figure 10. Dropout Voltage vs. Output Current
TEMPERATURE (°C) OUTPUT CURRENT (mA)
8060402002040
0
25
75
100
150
200
225
275
5004003002001000
0
20
40
60
100
120
140
160
Figure 11. Dropout Voltage vs. Temperature Figure 12. Standby Current vs. Temperature
TEMPERATURE (°C) TEMPERATURE (°C)
8060402002040
0
20
40
60
80
100
140
160
8060402002040
0
0.1
0.3
0.4
0.6
0.7
0.8
1.0
Figure 13. Quiescent Current vs. Temperature Figure 14. Quiescent Current vs. Input Voltage
TEMPERATURE (°C) INPUT VOLTAGE (V)
8060402002040
0
10
20
40
50
60
80
90
5.04.5 5.54.03.53.02.52.0
50
55
60
65
75
80
85
90
DROPOUT VOLTAGE (mV)
DROPOUT VOLTAGE (mV)
DROPOUT VOLTAGE (mV)
STANDBY CURRENT (mA)
QUIESCENT CURRENT (mA)
QUIESCENT CURRENT (mA)
VOUTNOM = 1.8 V
50
125
175
250
IOUT = 10 mA
IOUT = 100 mA
IOUT = 250 mA
IOUT = 500 mA
VOUTNOM = 3.3 V
TJ = 85°C
TJ = 25°C
TJ = 40°C
80
VOUTNOM = 3.3 V
IOUT = 10 mA
IOUT = 100 mA
IOUT = 250 mA
IOUT = 500 mA
120
0.2
0.5
0.9 VEN = 0 V
VOUTNOM = 0.7 V to 3.3 V
VOUTNOM = 0.7 V
IOUT = 0 mA
VOUTNOM = 3.3 V
VOUTNOM = 1.8 V
30
70
IOUT = 0 mA
TJ = 85°C
TJ = 25°C
TJ = 40°C
VOUTNOM = 1.8 V
70
NCP177
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TYPICAL CHARACTERISTICS
VIN = VOUTNOM + 0.5 V or VIN = 1.6 V (whichever is higher), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C
Figure 15. Ground Current vs. Output Current Figure 16. Short Circuit Current vs.
Temperature
OUTPUT CURRENT (mA) TEMPERATURE (°C)
5004003002001000
0
50
100
150
200
250
300
350
8060402002040
500
550
650
700
750
800
900
1000
Figure 17. Output Current Limit vs.
Temperature
Figure 18. Enable Threshold Voltage vs.
Temperature
TEMPERATURE (°C) TEMPERATURE (°C)
8060402002040
500
550
650
700
800
900
950
1000
8060402002040
0.4
0.5
0.6
0.7
0.9
0.8
1.0
Figure 19. Enable Input Current vs.
Temperature
Figure 20. Output Discharge Resistance vs.
Temperature (NCP177A option only)
TEMPERATURE (°C) TEMPERATURE (°C)
8060402002040
0
0.1
0.2
0.3
0.4
0.5
0.6
8060402002040
0
10
20
30
40
50
60
70
GROUND CURRENT (mA)
SHORT CIRCUIT CURRENT (mA)
OUTPUT CURRENT LIMIT (mA)
ENABLE THRESHOLD VOLTAGE (V)
ENABLE INPUT CURRENT (mA)
OUTPUT DISCHARGE RESISTANCE (W)
VOUTNOM = 1.8 V
TJ = 85°C
TJ = 25°C
TJ = 40°C
VOUTFORCED = 0 V
600
850
950
VOUTNOM = 0.7 V
1.4 V
3.3 V
1.8 V
VOUTFORCED = VOUTNOM 0.1 V
VOUTNOM = 0.7 V
1.4 V
3.3 V
1.8 V
600
750
850
VOUTNOM = 1.8 V
OFF > ON
ON > OFF
VOUTNOM = 1.8 V
VIN = 5.5 V
VEN = 5.5 V
VOUTNOM = 1.8 V
VIN = 4.0 V
VEN = 0 V
VOUTFORCED = VOUTNOM
NCP177
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TYPICAL CHARACTERISTICS
VIN = VOUTNOM + 0.5 V or VIN = 1.6 V (whichever is higher), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C
Figure 21. Power Supply Rejection Ratio Figure 22. Output Voltage Noise Spectral
Density
FREQUENCY (Hz) FREQUENCY (Hz)
10M1M100k10k1k10010
0
10
30
40
50
60
80
90
1M100k10k1k10010
0
1
2
3
4
5
6
Figure 23. TurnON/OFF VIN Driven (slow) Figure 24. TurnON VIN Driven (fast)
Figure 25. TurnON/OFF EN Driven Figure 26. Line Transient Response
PSRR (dB)
OUTPUT VOLTAGE NOISE (mV/Hz)
1 ms/div
1 V/div
VOUTNOM = 1.8 V
50 mA/div
VIN
IIN
VOUT
50 ms/div
VOUTNOM = 1.8 V
50 mA/div
IIN
VIN
VOUT
1 ms/div
2 V/div
VOUTNOM = 1.8 V
500 mV/div
VIN
IIN
VOUT
Without output discharge
With output discharge
5 ms/div
VOUTNOM = 1.8 V
3.3 V
500 mV/div
VIN
VOUT
tR = tF = 1 ms
VEN
5 mV/div
2.3 V
1.8 V
20
70
COUT = 1 mF X7R 0805
VOUT_NOM = 1.8 V, VIN = 3.0 V
VOUT_NOM = 3.3 V, VIN = 4.3 V
VOUT_NOM = 1.8 V, VIN = 3.0 V
VOUT_NOM = 3.3 V, VIN = 4.3 V
COUT = 1 mF X7R 0805
Integral Noise:
10 Hz 100 kHz: 54 mVrms
10 Hz 1 MHz: 62 mVrms
500 mV/div 1 V/div
NCP177
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TYPICAL CHARACTERISTICS
VIN = VOUTNOM + 0.5 V or VIN = 1.6 V (whichever is higher), VEN = 1.2 V, IOUT = 1 mA, CIN = COUT = 1.0 mF, TJ = 25°C
Figure 27. Load Transient Response Figure 28. qJA and PD(MAX) vs. Copper Area
20 ms/div
PCB COPPER AREA (mm2)
6005004003002001000
190
210
250
270
290
330
350
370
1 V/div
qJA, JUNCTION TO AMBIENT
THERMAL RESISTANCE (°C/W)
VOUTNOM = 1.8 V
1 mA
1.8 V
500 mA
200 mA/div50 mV/div
VIN
IOUT
VOUT
310
230
0
0.1
0.3
0.4
0.5
0.7
0.6
0.2
qJA, 1 oz Cu
qJA, 2 oz Cu
PD(MAX), 1 oz Cu
PD(MAX), 2 oz Cu
PD(MAX), MAXIMUM POWER DISSIPATION (W)
tR = tF = 1 ms
TA = 25°C
TJ = 125°C (for PD(MAX) curve)
APPLICATIONS INFORMATION
General
The NCP177 is a high performance 500 mA low dropout
linear regulator (LDO) delivering excellent noise and
dynamic performance. Thanks to its adaptive ground current
behavior the device consumes only 60 mA of quiescent
current (noload condition).
The regulator features low noise of 48 mVRMS, PSRR of
75 dB at 1 kHz and very good line/load transient
performance. Such excellent dynamic parameters, small
dropout voltage and small package size make the device an
ideal choice for powering the precision noise sensitive
circuitry in portable applications.
A logic EN input provides ON/OFF control of the output
voltage. When the EN is low the device consumes as low as
100 nA typ. from the IN pin.
The device is fully protected in case of output overload,
output short circuit condition or overheating, assuring a very
robust design.
Input Capacitor Selection (CIN)
Input capacitor connected as close as possible is necessary
to ensure device stability. The X7R or X5R capacitor should
be used for reliable performance over temperature range.
The value of the input capacitor should be 1 mF or greater for
the best dynamic performance. This capacitor will provide
a low impedance path for unwanted AC signals or noise
modulated onto the input voltage.
There is no requirement for the ESR of the input capacitor
but it is recommended to use ceramic capacitor for its low
ESR and ESL. A good input capacitor will limit the
influence of input trace inductance and source resistance
during load current changes.
Output Capacitor Selection (COUT)
The LDO requires an output capacitor connected as close
as possible to the output and ground pins. The recommended
capacitor value is 1 mF, ceramic X7R or X5R type due to its
low capacitance variations over the specified temperature
range. The LDO is designed to remain stable with minimum
effective capacitance of 0.8 mF. When selecting the capacitor
the changes with temperature, DC bias and package size
needs to be taken into account. Especially for small package
size capacitors such as 0201 the effective capacitance drops
rapidly with the applied DC bias voltage (refer the
capacitors datasheet for details).
There is no requirement for the minimum value of
equivalent series resistance (ESR) for the COUT but the
maximum value of ESR should be less than 0.5 W. Larger
capacitance and lower ESR improves the load transient
response and high frequency PSRR. Only ceramic
capacitors are recommended, the other types like tantalum
capacitors not due to their large ESR.
Enable Operation
The LDO uses the EN pin to enable/disable its operation
and to deactivate/activate the output discharge function
(Aversion only).
If the EN pin voltage is < 0.4 V the device is disabled and
the pass transistor is turned off so there is no current flow
between the IN and OUT pins. On Aversion the active
discharge transistor is active so the output voltage is pulled
to GND through 60 W (typ.) resistor.
If the EN pin voltage is > 1.0 V the device is enabled and
regulates the output voltage. The active discharge transistor
is turned off.
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The EN pin has internal pulldown current source with
value of 300 nA typ. which assures the device is turned off
when the EN pin is unconnected. In case when the EN
function isn’t required the EN pin should be tied directly to
IN pin.
Output Current Limit
Output current is internally limited to a 750 mA typ. The
LDO will source this current when the output voltage drops
down from the nominal output voltage (test condition is
VOUTNOM – 100 mV). If the output voltage is shorted to
ground, the short circuit protection will limit the output
current to 700 mA typ. The current limit and short circuit
protection will work properly over the whole temperature
and input voltage ranges. There is no limitation for the short
circuit duration.
Thermal Shutdown
When the LDO’s die temperature exceeds the thermal
shutdown threshold value the device is internally disabled.
The IC will remain in this state until the die temperature
decreases by value called thermal shutdown hysteresis.
Once the IC temperature falls this way the LDO is back
enabled. The thermal shutdown feature provides the
protection against overheating due to some application
failure and it is not intended to be used as a normal working
function.
Power Dissipation
Power dissipation caused by voltage drop across the LDO
and by the output current flowing through the device needs
to be dissipated out from the chip. The maximum power
dissipation is dependent on the PCB layout, number of used
Cu layers, Cu layers thickness and the ambient temperature.
The maximum power dissipation can be computed by
following equation:
PD(MAX) +TJ*TA
qJA +125 *TA
qJA
[W] (eq. 1)
Where: (TJ TA) is the temperature difference between the
junction and ambient temperatures and θJA is the thermal
resistance (dependent on the PCB as mentioned above).
For reliable operation junction temperature should be
limited do +125°C.
The power dissipated by the LDO for given application
conditions can be calculated by the next equation:
PD+VIN @IGND )ǒVIN *VOUTǓ@IOUT [W] (eq. 2)
Where: IGND is the LDO’s ground current, dependent on the
output load current.
Connecting the exposed pad and N/C pin to a large ground
planes helps to dissipate the heat from the chip.
The relation of θJA and PD(MAX) to PCB copper area and
Cu layer thickness could be seen on the Figure 26.
Reverse Current
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case when VOUT > VIN.
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
Power Supply Rejection Ratio
The LDO features very high power supply rejection ratio.
The PSRR at higher frequencies (in the range above
100 kHz) can be tuned by the selection of COUT capacitor
and proper PCB layout. A simple LC filter could be added
to the LDO’s IN pin for further PSRR improvement.
Enable TurnOn Time
The enable turnon time is defined as the time from EN
assertion to the point in which VOUT will reach 98% of its
nominal value. This time is dependent on various
application conditions such as VOUTNOM, COUT and TA.
PCB Layout Recommendations
To obtain good transient performance and good regulation
characteristics place CIN and COUT capacitors as close as
possible to the device pins and make the PCB traces wide.
In order to minimize the solution size, use 0402 or 0201
capacitors size with appropriate effective capacitance.
Larger copper area connected to the pins will also improve
the device thermal resistance. The actual power dissipation
can be calculated from the equation above (Power
Dissipation section). Exposed pad and N/C pin should be
tied to the ground plane for good power dissipation.
NCP177
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ORDERING INFORMATION
Part Number Voltage Option Option Marking Package Shipping
NCP177AMX070TCG 0.70 V
With output discharge
JA
XDFN4
(PbFree) 3000 / Tape & Reel
NCP177AMX090TCG 0.90 V JM
NCP177AMX100TCG 1.00 V JC
NCP177AMX110TCG 1.10 V JD
NCP177AMX120TCG 1.20 V JE
NCP177AMX125TCG 1.25 V JK
NCP177AMX135TCG 1.35 V JF
NCP177AMX150TCG 1.50 V JG
NCP177AMX180TCG 1.80 V JH
NCP177AMX330TCG 3.30 V JJ
NCP177BMX070TCG 0.70 V
Without output discharge
HA
NCP177BMX100TCG 1.00 V HC
NCP177BMX110TCG 1.10 V HD
NCP177BMX120TCG 1.20 V HE
NCP177BMX125TCG 1.25 V HL
NCP177BMX135TCG 1.35 V HF
NCP177BMX150TCG 1.50 V HG
NCP177BMX180TCG 1.80 V HH
NCP177BMX330TCG 3.30 V HJ
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NCP177
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PACKAGE DIMENSIONS
XDFN4 1.0x1.0, 0.65P
CASE 711AJ
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM THE TERMINAL TIPS.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
ÉÉ
ÉÉ
A
B
E
D
D2
BOTTOM VIEW
b
e
4X
NOTE 3
2X 0.05 C
PIN ONE
REFERENCE
TOP VIEW
2X 0.05 C
A
A1
(A3)
0.05 C
0.05 C
CSEATING
PLANE
SIDE VIEW
L
4X
12
DIM MIN MAX
MILLIMETERS
A0.33 0.43
A1 0.00 0.05
A3 0.10 REF
b0.15 0.25
D1.00 BSC
D2 0.43 0.53
E1.00 BSC
e0.65 BSC
L0.20 0.30
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
MOUNTING FOOTPRINT*
1.20
0.26
0.24 4X
DIMENSIONS: MILLIMETERS
0.39
RECOMMENDED
PACKAGE
OUTLINE
NOTE 4
e/2
D2
45 5
A
M
0.05 BC
43
0.65
PITCH
DETAIL A
4X
b2 0.02 0.12
L2 0.07 0.17
4X
0.52
2X
0.11
4X
L24X
DETAIL A
b24X
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