© Semiconductor Components Industries, LLC, 2010
December, 2010 − Rev. 24
1Publication Order Number:
LM324/D
LM324, LM324A, LM224,
LM2902, LM2902V, NCV2902
Single Supply Quad
Operational Amplifiers
The LM324 series are low−cost, quad operational amplifiers with
true differential inputs. They have several distinct advantages over
standard operational amplifier types in single supply applications. The
quad amplifier can operate at supply voltages as low as 3.0 V or as
high as 32 V with quiescent currents about one−fifth of those
associated with the MC1741 (on a per amplifier basis). The common
mode input range includes the negative supply, thereby eliminating the
necessity for external biasing components in many applications. The
output voltage range also includes the negative power supply voltage.
Features
•Short Circuited Protected Outputs
•True Differential Input Stage
•Single Supply Operation: 3.0 V to 32 V
•Low Input Bias Currents: 100 nA Maximum (LM324A)
•Four Amplifiers Per Package
•Internally Compensated
•Common Mode Range Extends to Negative Supply
•Industry Standard Pinouts
•ESD Clamps on the Inputs Increase Ruggedness without Affecting
Device Operation
•NCV Prefix for Automotive and Other Applications Requiring Site
and Control Changes
•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
PDIP−14
N SUFFIX
CASE 646
1
14
SOIC−14
D SUFFIX
CASE 751A
1
14
PIN CONNECTIONS
8
Out 4
Inputs 4
VEE, GND
Inputs 3
Out 3
9
10
11
12
13
14
2
Out 1
VCC
Out 2
1
3
4
5
6
7
*
)
Inputs 1
Inputs 2
(Top View)
4
23
1
)
*
*
)
)
*
See general marking information in the device marking
section on page 11 of this data sheet.
DEVICE MARKING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
ORDERING INFORMATION
1
14 TSSOP−14
DTB SUFFIX
CASE 948G
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LM324, LM324A, LM224, LM2902, LM2902V, NCV2902
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2
MAXIMUM RATINGS (TA = + 25°C, unless otherwise noted.)
Rating Symbol Value Unit
Power Supply Voltages Vdc
Single Supply VCC 32
Split Supplies VCC, VEE ±16
Input Differential Voltage Range (Note 1) VIDR ±32 Vdc
Input Common Mode Voltage Range (Note 2) VICR −0.3 to 32 Vdc
Output Short Circuit Duration tSC Continuous
Junction Temperature TJ150 °C
Thermal Resistance, Junction−to−Air (Note 3) Case 646
Case 751A
Case 948G
RJA 118
156
190
°C/W
Storage Temperature Range Tstg −65 to +150 °C
ESD Protection at any Pin
Human Body Model
Machine Model
Vesd
2000
200
V
Operating Ambient Temperature Range TA°C
LM224 −25 to +85
LM324, 324A 0 to +70
LM2902 −40 to +105
LM2902V, NCV2902 (Note 4) −40 to +125
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Split Power Supplies.
2. For supply voltages less than 32 V, the absolute maximum input voltage is equal to the supply voltage.
3. All RJA measurements made on evaluation board with 1 oz. copper traces of minimum pad size. All device outputs were active.
4. NCV2902 is qualified for automitive use.
LM324, LM324A, LM224, LM2902, LM2902V, NCV2902
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3
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = GND, TA = 25°C, unless otherwise noted.)
LM224 LM324A LM324 LM2902 LM2902V/NCV2902
Characteristics Symbol Min Typ Max Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
Input Offset Voltage VIO mV
VCC = 5.0 V to 30 V
VICR = 0 V to
VCC −1.7 V,
VO = 1.4 V, RS = 0
TA = 25°C−2.0 5.0 −2.0 3.0 −2.0 7.0 −2.0 7.0 −2.0 7.0
TA = Thigh (Note 5) − − 7.0 − − 5.0 − − 9.0 − − 10 − − 13
TA = Tlow (Note 5) − − 7.0 − − 5.0 − − 9.0 − − 10 − − 10
Average Temperature
Coefficient of Input
Offset Voltage
VIO/T−7.0 − − 7.0 30 −7.0 − − 7.0 − − 7.0 −V/°C
TA = Thigh to Tlow
(Notes 5 and 7)
Input Offset Current IIO −3.0 30 −5.0 30 −5.0 50 −5.0 50 −5.0 50 nA
TA = Thigh to Tlow
(Note 5)
− − 100 − − 75 − − 150 − − 200 − − 200
Average Temperature
Coefficient of Input
Offset Current
IIO/T−10 − − 10 300 −10 − − 10 − − 10 −pA/°C
TA = Thigh to Tlow
(Notes 5 and 7)
Input Bias Current IIB − −90 −150 − −45 −100 − −90 −250 − −90 −250 − −90 −250 nA
TA = Thigh to Tlow
(Note 5)
− − −300 − − −200 − − −500 − − −500 − − −500
Input Common Mode
Voltage Range
(Note 6)
VICR V
VCC = 30 V
TA = +25°C0−28.3 0 −28.3 0 −28.3 0 −28.3 0 −28.3
TA = Thigh to Tlow
(Note 5)
0−28 0 −28 0 −28 0 −28 0 −28
Differential Input
Voltage Range
VIDR − − VCC − − VCC − − VCC − − VCC − − VCC V
Large Signal Open
Loop Voltage Gain
AVOL V/mV
RL = 2.0 k,
VCC = 15 V,
for Large VO Swing
50 100 −25 100 −25 100 −25 100 −25 100 −
TA = Thigh to Tlow
(Note 5)
25 − − 15 − − 15 − − 15 − − 15 − −
Channel Separation
10 kHz ≤ f ≤ 20 kHz,
Input Referenced
CS − −120 − − −120 − − −120 − − −120 − − −120 −dB
Common Mode
Rejection,
RS ≤ 10 k
CMR 70 85 −65 70 −65 70 −50 70 −50 70 −dB
Power Supply
Rejection
PSR 65 100 −65 100 −65 100 −50 100 −50 100 −dB
5. LM224: Tlow = −25°C, Thigh = +85°C
LM324/LM324A: Tlow = 0°C, Thigh = +70°C
LM2902: Tlow = −40°C, Thigh = +105°C
LM2902V & NCV2902: Tlow = −40°C, Thigh = +125°C
NCV2902 is qualified for automotive use.
6. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of
the common mode voltage range is VCC −1.7 V, but either or both inputs can go to +32 V without damage, independent of the magnitude
of VCC.
7. Guaranteed by design.
LM324, LM324A, LM224, LM2902, LM2902V, NCV2902
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4
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = GND, TA = 25°C, unless otherwise noted.)
LM224 LM324A LM324 LM2902 LM2902V/NCV2902
Characteristics Symbol Min Typ Max Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
Output Voltage −
High Limit
VOH V
VCC = 5.0 V, RL =
2.0 k, TA = 25°C
3.3 3.5 −3.3 3.5 −3.3 3.5 −3.3 3.5 −3.3 3.5 −
VCC = 30 V
RL = 2.0 k
(TA = Thigh to Tlow)
(Note 8)
26 − − 26 − − 26 − − 26 − − 26 − −
VCC = 30 V
RL = 10 k
(TA = Thigh to Tlow)
(Note 8)
27 28 −27 28 −27 28 −27 28 −27 28 −
Output Voltage −
Low Limit,
VCC = 5.0 V,
RL = 10 k,
TA = Thigh to Tlow
(Note 8)
VOL −5.0 20 −5.0 20 −5.0 20 −5.0 100 −5.0 100 mV
Output Source Current
(VID = +1.0 V,
VCC = 15 V)
IO +mA
TA = 25°C20 40 −20 40 −20 40 −20 40 −20 40 −
TA = Thigh to Tlow
(Note 8)
10 20 −10 20 −10 20 −10 20 −10 20 −
Output Sink Current IO −mA
(VID = −1.0 V,
VCC = 15 V)
TA = 25°C
10 20 −10 20 −10 20 −10 20 −10 20 −
TA = Thigh to Tlow
(Note 8)
5.0 8.0 −5.0 8.0 −5.0 8.0 −5.0 8.0 −5.0 8.0 −
(VID = −1.0 V,
VO = 200 mV,
TA = 25°C)
12 50 −12 50 −12 50 − − − − − − − A
Output Short Circuit
to Ground
(Note 9)
ISC −40 60 −40 60 −40 60 −40 60 −40 60 mA
Power Supply Current
(TA = Thigh to Tlow)
(Note 8)
ICC mA
VCC = 30 V
VO = 0 V, RL = ∞
− − 3.0 −1.4 3.0 − − 3.0 − − 3.0 − − 3.0
VCC = 5.0 V,
VO = 0 V, RL = ∞
− − 1.2 −0.7 1.2 − − 1.2 − − 1.2 − − 1.2
8. LM224: Tlow = −25°C, Thigh = +85°C
LM324/LM324A: Tlow = 0°C, Thigh = +70°C
LM2902: Tlow = −40°C, Thigh = +105°C
LM2902V & NCV2902: Tlow = −40°C, Thigh = +125°C
NCV2902 is qualified for automotive use.
9. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of
the common mode voltage range is VCC −1.7 V, but either or both inputs can go to +32 V without damage, independent of the magnitude
of VCC.
LM324, LM324A, LM224, LM2902, LM2902V, NCV2902
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5
Figure 1. Representative Circuit Diagram
(One−Fourth of Circuit Shown)
Output
Bias Circuitry
Common to Four
Amplifiers
VCC
VEE/GND
Inputs
Q2
Q3 Q4
Q5
Q26
Q7
Q8
Q6
Q9
Q11
Q10
Q1 2.4 k
Q25
Q22
40 k
Q13
Q14
Q15
Q16
Q19
5.0 pF
Q18
Q17
Q20
Q21
2.0 k
Q24
Q23
Q12
25
+
-
LM324, LM324A, LM224, LM2902, LM2902V, NCV2902
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6
CIRCUIT DESCRIPTION
The LM324 series is made using four internally
compensated, two−stage operational amplifiers. The first
stage of each consists of differential input devices Q20 and
Q18 with input buffer transistors Q21 and Q17 and the
differential to single ended converter Q3 and Q4. The first
stage performs not only the first stage gain function but also
performs the level shifting and transconductance reduction
functions. By reducing the transconductance, a smaller
compensation capacitor (only 5.0 pF) can be employed, thus
saving chip area. The transconductance reduction is
accomplished by splitting the collectors of Q20 and Q18.
Another feature of this input stage is that the input common
mode range can include the negative supply or ground, in
single supply operation, without saturating either the input
devices or the differential to single−ended converter. The
second stage consists of a standard current source load
amplifier stage.
Figure 2. Large Signal Voltage Follower Response
VCC = 15 Vdc
RL = 2.0 k
TA = 25°C
5.0 s/DIV
1.0 V/DIV
Each amplifier is biased from an internal−voltage
regulator which has a low temperature coefficient thus
giving each amplifier good temperature characteristics as
well as excellent power supply rejection.
Single Supply Split Supplies
VCC
VEE/GND
3.0 V to VCC(max)
1
2
3
4
VCC
1
2
3
4
VEE
1.5 V to VCC(max)
1.5 V to VEE(max)
Figure 3.
70
60
50
40
30
20
10
01.0 10 100 10000
LOAD CAPACITANCE (pF)
Phase Margin
Figure 4. Gain and Phase Margin
1000
70
60
50
40
30
20
10
0
GAIN MARGIN (dB)
PHASE MARGIN (°)
Gain Margin
LM324, LM324A, LM224, LM2902, LM2902V, NCV2902
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7
VOR, OUTPUT VOLTAGE RANGE (V )
pp
VO, OUTPUT VOLTAGE (mV)
14
12
10
8.0
6.0
4.0
2.0
0
1.0 10 100 1000
f, FREQUENCY (kHz)
550
500
450
400
350
300
250
200
00 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0
t, TIME (s)
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
00 5.0 10 15 20 25 30 35
VCC, POWER SUPPLY VOLTAGE (V) VCC, POWER SUPPLY VOLTAGE (V)
90
80
70 0 2.0 4.0 6.0 8.0 10 12 14 16 18 20
I , POWER SUPPLY CURRENT (mA)
CC
I , INPUT BIAS CURRENT (nA)
IB
VCC = 30 V
VEE = GND
TA = 25°C
CL = 50 pF
Input
Output
V , INPUT VOLTAGE (V)
I
18
16
14
12
10
8.0
6.0
4.0
2.0
0
20
0 2.0 4.0 6.0 8.0 10 12 14 16 18 20
± VCC/VEE, POWER SUPPLY VOLTAGES (V)
±
Positive
Negative
TA = 25°C
RL = R
RL = 2.0 k
VCC = 15 V
VEE = GND
Gain = -100
RI = 1.0 k
RF = 100 k
Figure 5. Input Voltage Range Figure 6. Open Loop Frequency
120
100
80
60
40
20
0
-20
1.0 10 100 1.0 k 10 k 100 k 1.0
M
f, FREQUENCY (Hz)
A , LARGE-SIGNAL
VOL
OPEN LOOP VOLTAGE GAIN (dB)
VCC = 15 V
VEE = GND
TA = 25°C
Figure 7. Large−Signal Frequency Response Figure 8. Small−Signal Voltage Follower
Pulse Response (Noninverting)
Figure 9. Power Supply Current versus
Power Supply Voltage
Figure 10. Input Bias Current versus
Power Supply Voltage
LM324, LM324A, LM224, LM2902, LM2902V, NCV2902
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8
2
1
R1
TBP
R1 + R2
R1
R1 + R2
eo
e1
e2
eo = C (1 + a + b) (e2 - e1)
R1 a R1
b R1
R
-
+
+
-
-
+R
+
-
R1
R2
VO
Vref
Vin
VOH
VO
VOL
VinL = R1 (VOL - Vref) + Vref
VinH =(VOH - Vref) + Vref
H = R1 + R2 (VOH - VOL)
R1
-
+
-
+
-
+
R
C
R2 R1
R3
C1
100 k
R
C
R
C1 R2
100 k
Vin
Vref
Vref
Vref
Vref
Bandpass
Output
fo =2 RC
R1 = QR
R2 =
R3 = TN R2
C1 = 10C
1
Notch Output
Vref =V
CC
Hysteresis
1
CR
VinL VinH
Vref
Where:TBP=Center Frequency Gain
Where:TN=Passband Notch Gain
R = 160 k
C = 0.001 F
R1 = 1.6 M
R2 = 1.6 M
R3 = 1.6 M
For:fo=1.0 kHz
For:Q= 10
For:TBP= 1
For:TN= 1
-
+
MC1403
1/4
LM324
-
+
R1
VCC
VCC
VO
2.5 V
R2
50 k
10 k
Vref
Vref = VCC
2
5.0 k
RC
RC
+
-
VO
2 RC
1
For: fo = 1.0 kHz
R = 16 k
C = 0.01 F
VO = 2.5 V 1 + R1
R2
1
VCC
fo =
1/4
LM324
1/4
LM324
1/4
LM324
1/4
LM324
1
CR
1/4
LM324
1/4
LM324 1/4
LM324 1/4
LM324
1/4
LM324
Figure 11. Voltage Reference Figure 12. Wien Bridge Oscillator
Figure 13. High Impedance Differential Amplifier Figure 14. Comparator with Hysteresis
Figure 15. Bi−Quad Filter
LM324, LM324A, LM224, LM2902, LM2902V, NCV2902
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9
2
1
For less than 10% error from operational amplifier,
If source impedance varies, filter may be preceded with
voltage follower buffer to stabilize filter parameters.
where fo and BW are expressed in Hz.
Qo fo
BW < 0.1
Given:fo=center frequency
A(fo)=gain at center frequency
Choose value fo, C
Then: R3 = Q
fo C
R3
R1 = 2 A(fo)
R1 R3
4Q2 R1 - R3
R2 =
+
-
+
-
Vref =V
CC
Vref
f = R1 + RC
4 CRf R1 R3 = R2 R1
R2 + R1
R2
300 k
75 k
R3
R1
100 k
C
Triangle Wave
Output
Square
Wave
Output
Vin
Rf
if
Vref
1/4
LM324
1/4
LM324
Figure 16. Function Generator Figure 17. Multiple Feedback Bandpass Filter
Vref =V
CC
1
2
-
+
VCC
R3
R1
R2
Vref
CC
V
O
CO = 10 C
CO
1/4
LM324
LM324, LM324A, LM224, LM2902, LM2902V, NCV2902
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10
ORDERING INFORMATION
Device Operating Temperature Range Package Shipping†
LM224DG
−25°C to +85°C
SOIC−14 55 Units/Rail
LM224DR2G SOIC−14 2500/Tape & Reel
LM224DTBG TSSOP−14 96 Units/Tube
LM224DTBR2G TSSOP−14 2500/Tape & Reel
LM224NG PDIP−14 25 Units/Rail
LM324DG
0°C to +70°C
SOIC−14 55 Units/Rail
LM324DR2G SOIC−14 2500/Tape & Reel
LM324DTBG TSSOP−14 96 Units/Tube
LM324DTBR2G TSSOP−14 2500/Tape & Reel
LM324NG PDIP−14 25 Units/Rail
LM324ADG SOIC−14 55 Units/Rail
LM324ADR2G SOIC−14 2500/Tape & Reel
LM324ADTBG TSSOP−14 96 Units/Tube
LM324ADTBR2G TSSOP−14 2500/Tape & Reel
LM324ANG PDIP−14 25 Units/Rail
LM2902DG
−40°C to +105°C
SOIC−14 55 Units/Rail
LM2902DR2G SOIC−14 2500/Tape & Reel
LM2902DTBG TSSOP−14 96 Units/Tube
LM2902DTBR2G TSSOP−14 2500/Tape & Reel
LM2902NG PDIP−14 25 Units/Rail
LM2902VDG
−40°C to +125°C
SOIC−14 55 Units/Rail
LM2902VDR2G SOIC−14 2500/Tape & Reel
LM2902VDTBG TSSOP−14 96 Units/Tube
LM2902VDTBR2G TSSOP−14 2500/Tape & Reel
LM2902VNG PDIP−14 25 Units/Rail
NCV2902DR2G SOIC−14
2500/Tape & Reel
NCV2902DTBR2G TSSOP−14
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
LM324, LM324A, LM224, LM2902, LM2902V, NCV2902
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11
MARKING DIAGRAMS
x = 2 or 3
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G= Pb−Free Package
PDIP−14
N SUFFIX
CASE 646
SOIC−14
D SUFFIX
CASE 751A
1
14
LM324AN
AWLYYWWG
1
14
LMx24N
AWLYYWWG
1
14
LM2902N
AWLYYWWG
1
14
LM2902VN
AWLYYWWG
*This marking diagram also applies to NCV2902.
TSSOP−14
DTB SUFFIX
CASE 948G
1
14
x24
ALYWG
G
1
14
1
14
1
14
*
324A
ALYWG
G
2902
ALYWG
G
2902
V
ALYWG
G
LM324ADG
AWLYWW
1
14
LMx24DG
AWLYWW
1
14
LM2902DG
AWLYWW
1
14
LM2902VDG
AWLYWW
1
14
(Note: Microdot may be in either location)
LM324, LM324A, LM224, LM2902, LM2902V, NCV2902
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12
PACKAGE DIMENSIONS
PDIP−14
CASE 646−06
ISSUE P
17
14 8
B
ADIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.715 0.770 18.16 19.56
B0.240 0.260 6.10 6.60
C0.145 0.185 3.69 4.69
D0.015 0.021 0.38 0.53
F0.040 0.070 1.02 1.78
G0.100 BSC 2.54 BSC
H0.052 0.095 1.32 2.41
J0.008 0.015 0.20 0.38
K0.115 0.135 2.92 3.43
L
M−−− 10 −−− 10
N0.015 0.039 0.38 1.01
__
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
F
HG D
K
C
SEATING
PLANE
N
−T−
14 PL
M
0.13 (0.005)
L
M
J
0.290 0.310 7.37 7.87
LM324, LM324A, LM224, LM2902, LM2902V, NCV2902
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13
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−A−
−B−
G
P7 PL
14 8
7
1
M
0.25 (0.010) B M
S
B
M
0.25 (0.010) A S
T
−T−
F
RX 45
SEATING
PLANE D14 PL K
C
J
M
_DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A8.55 8.75 0.337 0.344
B3.80 4.00 0.150 0.157
C1.35 1.75 0.054 0.068
D0.35 0.49 0.014 0.019
F0.40 1.25 0.016 0.049
G1.27 BSC 0.050 BSC
J0.19 0.25 0.008 0.009
K0.10 0.25 0.004 0.009
M0 7 0 7
P5.80 6.20 0.228 0.244
R0.25 0.50 0.010 0.019
__ __
7.04
14X
0.58
14X
1.52
1.27
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT*
7X
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
LM324, LM324A, LM224, LM2902, LM2902V, NCV2902
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14
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G−01
ISSUE B
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A4.90 5.10 0.193 0.200
B4.30 4.50 0.169 0.177
C−−− 1.20 −−− 0.047
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.50 0.60 0.020 0.024
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
____
S
U0.15 (0.006) T
2X L/2
S
U
M
0.10 (0.004) V S
T
L−U−
SEATING
PLANE
0.10 (0.004)
−T−
ÇÇÇ
ÇÇÇ
SECTION N−N
DETAIL E
JJ1
K
K1
ÉÉÉ
ÉÉÉ
DETAIL E
F
M
−W−
0.25 (0.010)
8
14
7
1
PIN 1
IDENT.
H
G
A
D
C
B
S
U0.15 (0.006) T
−V−
14X REFK
N
N
7.06
14X
0.36 14X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT*
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
LM324, LM324A, LM224, LM2902, LM2902V, NCV2902
http://onsemi.com
15
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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