Electrical Characteristics (Note 3) (Continued)
Parameter Conditions LM148/LM149 LM248 LM348/LM349 Units
Min Typ Max Min Typ Max Min Typ Max
Large Signal Voltage Gain VSeg15V, VOUT eg10V, 25 15 15 V/mV
RLl2kX
Output Voltage Swing VSeg15V, RLe10 kXg12 g13 g12 g13 g12 g13 V
RLe2kXg
10 g12 g10 g12 g10 g12 V
Input Voltage Range VSeg15V g12 g12 g12 V
Common-Mode Rejection RSs10 kX70 90 70 90 70 90 dB
Ratio
Supply Voltage Rejection RSs10 kX,g5V sVSsg15V 77 96 77 96 77 96 dB
Note 1: Any of the amplifier outputs can be shorted to ground indefinitely; however, more than one should not be simultaneously shorted as the maximum junction
temperature will be exceeded.
Note 2: The maximum power dissipation for these devices must be derated at elevated temperatures and is dicated by TjMAX,ijA, and the ambient temperature,
TA. The maximum available power dissipation at any temperature is Pde(TjMAX bTA)/ijA or the 25§CP
dMAX, whichever is less.
Note 3: These specifications apply for VSeg15V and over the absolute maximum operating temperature range (TLsTAsTH) unless otherwise noted.
Note 4: Refer to RETS 148X for LM148 military specifications and refer to RETS 149X for LM149 military specifications.
Note 5: Human body model, 1.5 kXin series with 100 pF.
Cross Talk Test Circuit
TL/H/7786–6 TL/H/7786–7
Crosstalk eb
20 log eÊOUT
101 ceOUT
(dB)
VSeg15V
Application Hints
The LM148 series are quad low power 741 op amps. In the
proliferation of quad op amps, these are the first to offer the
convenience of familiar, easy to use operating characteris-
tics of the 741 op amp. In those applications where 741 op
amps have been employed, the LM148 series op amps can
be employed directly with no change in circuit performance.
The LM149 series has the same characteristics as the
LM148 except it has been decompensated to provide a
wider bandwidth. As a result the part requires a minimum
gain of 5.
The package pin-outs are such that the inverting input of
each amplifier is adjacent to its output. In addition, the am-
plifier outputs are located in the corners of the package
which simplifies PC board layout and minimizes package
related capacitive coupling between amplifiers.
The input characteristics of these amplifiers allow differen-
tial input voltages which can exceed the supply voltages. In
addition, if either of the input voltages is within the operating
common-mode range, the phase of the output remains cor-
rect. If the negative limit of the operating common-mode
range is exceeded at both inputs, the output voltage will be
positive. For input voltages which greatly exceed the maxi-
mum supply voltages, either differentially or common-mode,
resistors should be placed in series with the inputs to limit
the current.
Like the LM741, these amplifiers can easily drive a 100 pF
capacitive load throughout the entire dynamic output volt-
age and current range. However, if very large capacitive
loads must be driven by a non-inverting unity gain amplifier,
a resistor should be placed between the output (and feed-
back connection) and the capacitance to reduce the phase
shift resulting from the capacitive loading.
The output current of each amplifier in the package is limit-
ed. Short circuits from an output to either ground or the
power supplies will not destroy the unit. However, if multiple
output shorts occur simultaneously, the time duration should
be short to prevent the unit from being destroyed as a result
of excessive power dissipation in the IC chip.
As with most amplifiers, care should be taken lead dress,
component placement and supply decoupling in order to
ensure stability. For example, resistors from the output to an
input should be placed with the body close to the input to
minimize ‘‘pickup’’ and maximize the frequency of the feed-
back pole which capacitance from the input to ground cre-
ates.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capaci-
tance from the input of the device (usually the inverting in-
put) to AC ground set the frequency of the pole. In many
instances the frequency of this pole is much greater than
the expected 3 dB frequency of the closed loop gain and
consequently there is negligible effect on stability margin.
However, if the feedback pole is less than approximately six
times the expected 3 dB frequency a lead capacitor should
be placed from the output to the input of the op amp. The
value of the added capacitor should be such that the RC
time constant of this capacitor and the resistance it parallels
is greater than or equal to the original feedback pole time
constant.
3