SN54ALS30A, SN54AS30, SN74ALS30A, SN74AS30 www.ti.com ........................................................................................................................................................... SDAS010D - APRIL 1982 - REVISED APRIL 2009 8-INPUT POSITIVE-NAND GATES FEATURES 1 8-Input Positive-NAND Gates Available in J, DW, N, and FK Packages These devices contain an 8-input positive-NAND gate and perform the following Boolean functions in positive logic: Y = A * B *C * D * E * F * G * H or Y=A+B+C+D+E+F+G SN54ALS30A, SN54AS30 . . . FK PACKAGE (TOP VIEW) B A N.C. VCC SN54ALS30A, SN54AS30 . . . J PACKAGE SN74ALS30A, SN74AS30 . . . DW OR N PACKAGE SN74AS30 . . . DB PACKAGE DESCRIPTION (TOP VIEW) 1 20 VCC 2 19 3 18 4 17 5 16 6 15 7 14 N.C. H G N.C. N.C. Y 3 2 C N.C. D N.C. E 4 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 H N.C. G N.C. N.C. F GND N.C. Y N.C. A B C D E F GND N.C. * * N.C. - No internal connection ORDERING INFORMATION PACKAGE (1) (2) TA PDIP - N 0C to 70C Tube TOP-SIDE MARKING SN74ALS30AN SN74ALS30AN SN74AS30N SN74AS30N Tube SN74AS30AD Tape and reel SN74ALS30ADR Tube SN74AS30D Tape and reel SN74AS30DR SSOP - DB Tape and reel SN74AS30DBR AS30 CDIP - J Tube SNJ54ALS30AJ SNJ54ALS30AJ SNJ54AS30J SNJ54AS30J SNJ54ALS30AFK SNJ54ALS30AFK SNJ54AS30FK SNJ54AS30FK SOIC - D -55C to 125C LCCC -FK (1) (2) ORDERABLE PART NUMBER Tube ALS30A AS30 Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 1982-2009, Texas Instruments Incorporated SN54ALS30A, SN54AS30, SN74ALS30A, SN74AS30 SDAS010D - APRIL 1982 - REVISED APRIL 2009 ........................................................................................................................................................... www.ti.com FUNCTION TABLE INPUTS A-H OUTPUT Y All inputs H L One or more inputs L H LOGIC SYMBOL(A) 1 A B 2 3 C D E F G H A. 8 4 Y 5 6 11 12 This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin number shown are for the D, DB, J, and N packages. LOGIC DIAGRAM (POSITIVE LOGIC) 1 A B 2 3 C D E F G H 4 8 5 Y 6 11 12 Pin number shown are for the D, DB, J, and N packages. ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range -0.5 7 V VI Input voltage range -0.5 7 V JA Package thermal impedance (2) Tstg Storage temperature range D package 86 DB package 96 N package (1) (2) 2 C/W 80 -65 150 C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback Copyright (c) 1982-2009, Texas Instruments Incorporated Product Folder Link(s): SN54ALS30A SN54AS30 SN74ALS30A SN74AS30 SN54ALS30A, SN54AS30, SN74ALS30A, SN74AS30 www.ti.com ........................................................................................................................................................... SDAS010D - APRIL 1982 - REVISED APRIL 2009 RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage IOH High-level output current IOL Low-level output current MIN NOM MAX 4.5 5 5.5 2 0.8 (1) (2) (1) 0.7 (2) 'ALS30A -0.4 'AS30 Operating free-air temperature V V -2 SN54ALS30A 4 SN74ALS30A 8 'AS30 TA UNIT V mA mA 20 SN54ALS30A, SN54AS30 -55 125 SN74ALS30A, SN74AS30 0 70 C Applies to the 'AS30 and SN74ALS30A across the full operating temperature range, and SN54ALS30A over the temperature range of -55C to 7C. Applies to the SN54ALS30A over the temperature range of 70C to 125C. ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER VIK VCC = 4.5 V, VOH VCC = 4.5 V to 5.5 V, VOL VCC = 4.5 V II = -18 mA MIN TYP (1) 'ALS30A 'AS30 MAX UNIT -1.5 V IOH = -0.4 mA 'ALS30A VCC - 2 IOH = -2 mA 'AS30 VCC - 2 IOL = 4 mA 'ALS30A 0.25 0.4 IOL = 8 mA SN74ALS30A 0.35 0.5 IOL = 20 mA 'AS30 0.35 0.5 V V II VCC = 5.5 V, VI = 7 V 0.1 mA IIH VCC = 5.5 V, VI = 2.7 V 20 A IIL VCC = 5.5 V, VI = 0.4 V IO (1) (2) TEST CONDITIONS (2) VCC = 5.5 V, VO = 2.25 V ICCH VCC = 5.5 V, VI = 0 V ICCL VCC = 5.5 V, VI = 4.5 V 'ALS30A -0.1 'AS30 -0.5 SN54ALS30A -20 -112 SN74ALS30A -30 -112 'AS30 -30 -112 'ALS30A 'AS30 'ALS30A 'AS30 0.22 0.36 0.9 1.5 0.54 0.9 3 4.9 mA mA mA mA All typical values are at VCC = 5 V, TA = 25C. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. Copyright (c) 1982-2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN54ALS30A SN54AS30 SN74ALS30A SN74AS30 3 SN54ALS30A, SN54AS30, SN74ALS30A, SN74AS30 SDAS010D - APRIL 1982 - REVISED APRIL 2009 ........................................................................................................................................................... www.ti.com SWITCHING CHARACTERISTICS over recommended operating conditions (unless otherwise noted (see Figure 1) PARAMETER tPLH tPHL 4 FROM (INPUT) A, B, C, D, E, F, G, or H A, B, C, D, E, F, G, or H Submit Documentation Feedback TO (OUTPUT) Y Y MIN MAX SN54ALS30A 3 15 SN74ALS30A 3 10 SN54AS30 1 5.5 SN74AS30 1 5 SN54ALS30A 3 15 SN74ALS30A 3 12 SN54AS30 1 5 SN74AS30 1 4.5 UNIT ns ns Copyright (c) 1982-2009, Texas Instruments Incorporated Product Folder Link(s): SN54ALS30A SN54AS30 SN74ALS30A SN74AS30 SN54ALS30A, SN54AS30, SN74ALS30A, SN74AS30 www.ti.com ........................................................................................................................................................... SDAS010D - APRIL 1982 - REVISED APRIL 2009 PARAMETER MEASUREMENT INFORMATION 7V VCC S1 500 From Output Under Test From Output Under Test Test Point CL = 50 pF (see Note A) CL = 50 pF (see Note A) 500 LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3V Timing Input Test Point 500 LOAD CIRCUIT FOR 3-STATE OUTPUTS 3V High-Level Pulse 1.5 V 500 From Output Under Test CL = 50 pF (see Note A) Test Point 1.5 V 1.5 V 0V 0V tw th tsu 3V Data Input 1.5 V 3V Low-Level Pulse 1.5 V 0V 1.5 V 1.5 V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATIONS 3V Output Control 1.5 V 1.5 V 3V 0V tPZL tPLZ 1.5 V 0V 3 V Waveform 1 S1 Closed (see Note B) tPLH 1.5 V 0.3 V tPZH Waveform 2 S1 Open (see Note B) 1.5 V Input VOL In-Phase Output tPHZ 0.3 V VOH 1.5 V 1.5 V tPHL Out-of-Phase Output (see Note C) tPHL VOH 1.5 V VOL tPLH VOH 1.5 V 1.5 V VOL 0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms Copyright (c) 1982-2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN54ALS30A SN54AS30 SN74ALS30A SN74AS30 5 PACKAGE OPTION ADDENDUM www.ti.com 25-Jan-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp ACTIVE LCCC FK 20 1 TBD Call TI Call TI 5962-8683701DA ACTIVE CFP W 14 1 TBD Call TI Call TI 5962-9755801Q2A ACTIVE LCCC FK 20 1 TBD Call TI Call TI 5962-9755801QCA ACTIVE CDIP J 14 1 TBD Call TI Call TI JM38510/37004B2A ACTIVE LCCC FK 20 1 TBD JM38510/37004BCA ACTIVE CDIP J 14 1 TBD M38510/37004B2A ACTIVE LCCC FK 20 1 TBD M38510/37004BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type SN54ALS30AJ ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type SN54AS30J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type SN74ALS30AD NRND SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS30ADE4 NRND SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS30ADG4 NRND SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS30ADR NRND SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS30ADRE4 NRND SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS30ADRG4 NRND SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 25 Pb-Free (RoHS) SN74ALS30AN NRND PDIP N 14 SN74ALS30AN3 OBSOLETE PDIP N 14 TBD POST-PLATE N / A for Pkg Type N / A for Pkg Type POST-PLATE N / A for Pkg Type CU NIPDAU N / A for Pkg Type Call TI Call TI SN74ALS30ANE4 NRND PDIP N 14 25 Pb-Free (RoHS) SN74ALS30ANSR NRND SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS30ANSRE4 NRND SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS30ANSRG4 NRND SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Samples (Requires Login) 5962-86837012A A42 (3) CU NIPDAU N / A for Pkg Type PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 25-Jan-2012 Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp NRND SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS30DBR NRND SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS30DBRE4 NRND SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS30DBRG4 NRND SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS30DE4 NRND SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS30DG4 NRND SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS30DR NRND SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS30DRE4 NRND SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS30DRG4 NRND SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS30N NRND PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type CU NIPDAU N / A for Pkg Type SN74AS30NE4 NRND PDIP N 14 25 Pb-Free (RoHS) SN74AS30NSR NRND SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS30NSRE4 NRND SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS30NSRG4 NRND SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SNJ54ALS30AFK ACTIVE LCCC FK 20 1 TBD SNJ54ALS30AJ ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type SNJ54ALS30AW ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type SNJ54AS30FK ACTIVE LCCC FK 20 1 TBD SNJ54AS30J ACTIVE CDIP J 14 1 TBD (1) POST-PLATE N / A for Pkg Type POST-PLATE N / A for Pkg Type N / A for Pkg Type The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. Addendum-Page 2 Samples (Requires Login) SN74AS30D A42 (3) PACKAGE OPTION ADDENDUM www.ti.com 25-Jan-2012 PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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OTHER QUALIFIED VERSIONS OF SN54ALS30A, SN54AS30, SN74ALS30A, SN74AS30 : * Catalog: SN74ALS30A, SN74AS30 * Military: SN54ALS30A, SN54AS30 NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product * Military - QML certified for Military and Defense Applications Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74ALS30ADR Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74ALS30ANSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 SN74AS30DBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 SN74AS30DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74AS30NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ALS30ADR SOIC D 14 2500 367.0 367.0 38.0 SN74ALS30ANSR SO NS 14 2000 367.0 367.0 38.0 SN74AS30DBR SSOP DB 14 2000 367.0 367.0 38.0 SN74AS30DR SOIC D 14 2500 367.0 367.0 38.0 SN74AS30NSR SO NS 14 2000 367.0 367.0 38.0 Pack Materials-Page 2 MECHANICAL DATA MSSO002E - JANUARY 1995 - REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0-8 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. 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