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or visit Maxim’s website at www.maxim-ic.com.
General Description
The MAX9360/MAX9361 are low-skew, single LVTTL/
TTL/CMOS-to-differential LVECL/ECL translators
designed for high-speed signal and clock driver appli-
cations. For interfacing to LVTTL/TTL/CMOS input sig-
nals, these devices operate over a 3.0V to 5.5V supply
range, allowing high-performance clock or data distrib-
ution. For interfacing to differential LVECL/ECL output
signals, these devices operate from a -2.375V to -5.5V
supply.
The MAX9360 is a 3.3V LVTTL/CMOS-to-LVECL/ECL
translator that operates at a typical speed of 3GHz. The
MAX9361 is a 5V TTL/CMOS-to-LVECL/ECL translator
that operates at a typical speed of 1.3GHz. Both
devices can be used to drive either LVECL devices or
standard ECL devices with a negative supply range of
-2.375V to -5.5V.
The devices default to high if the input is disconnected,
and feature ultra-low propagation delay: 440ps for the
MAX9360, 810ps for the MAX9361.
Applications
Clock/Data-Level Translation
Features
oOutput High with Input Open
o-2.375V to -5.5V LVECL/ECL Operation
oESD Protection > 2kV (Human Body Model)
o3.0V to 3.6V LVTTL/CMOS Operation (MAX9360)
Improved Second Source of the MC100EPT24
Low 13.8mA (typ) IEE Supply Current
440ps (typ) Propagation Delay
> 300mV Output at 1GHz
o4.5V to 5.5V TTL Operation (MAX9361)
Improved Second Source of the MC100ELT24
Low 6.6mA (typ) IEE Supply Current
600ps (typ) Propagation Delay
> 300mV Output at 250MHz
MAX9360/MAX9361
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
________________________________________________________________
Maxim Integrated Products
1
Ordering Information
TOP VIEW
GNDN.C.
1
2
8
7
VCC
QD
N.C.
VEE
SO
3
4
6
5
MAX9360/
MAX9361
Q
GND
N.C.
1
2
8
7
VCC
Q
VEE
N.C.
D
SOT23
3
4
6
5
MAX9360/
MAX9361
Q
Pin Configurations
19-2327; Rev 2; 12/08
PART TEMP RANGE PIN-
PACKAGE
TOP
MARK
MAX9360EKA-T -40°C to +85°C 8 SOT23 AAJI
MAX9360ESA -40°C to +85°C 8 SO —
MAX9361EKA-T -40°C to +85°C 8 SOT23 AAJJ
MAX9361ESA -40°C to +85°C 8 SO —
EVALUATION KIT
AVAILABLE
MAX9360/MAX9361
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS—MAX9360
(VCC = 3.0V to 3.6V, VEE = -2.375V to -5.5V, VGND = 0, outputs terminated with 50Ω±1% to -2.0V. Typical values are at VCC = 3.3V,
VIH = 2.0V, VIL = 0.8V, unless otherwise noted.) (Notes 1, 2, 3)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC to GND..............................................................-0.3V to +6V
VEE to GND...............................................................-6V to +0.3V
D to GND....................................................-0.3V to (VCC + 0.3V)
Continuous Output Current ................................................50mA
Surge Output Current........................................................100mA
Junction-to-Ambient Thermal Resistance in Still Air
8-Pin SOT23.............................................................+112°C/W
8-Pin SO...................................................................+170°C/W
Junction-to-Ambient Thermal Resistance
with 500LFPM Airflow
8-Pin SOT23...............................................................+78°C/W
8-Pin SO.....................................................................+99°C/W
Junction-to-Case Thermal Resistance
8-Pin SOT23...............................................................+80°C/W
8-Pin SO..................................................................+40°C/mW
Continuous Power Dissipation (TA= +70°C)
8-Pin SOT23 (derate 8.9mW/°C above +70°C)............714mW
8-Pin SO (derate 5.9mW/°C above +70°C)..................470mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
ESD Protection
Human Body Model (D, Q, Q)........................................> 2kV
Soldering Temperature (10s) ...........................................+300°C
0°C (SOT23)
-40°C (SO) +25°C +85°C
PARAMETER SYMBOL CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX
UNITS
LVTTL INPUT (D)
VIN = 2.7V -20 +20 -20 +20 -20 +20
Input High Current IIH VIN = VCC -10 +10 -10 +10 -10 +10 µA
Input Low Current IIL VIN = 0.5V -200 -51 -200 -60 -200 -67 µA
Input Clamp
Voltage VIK IIN = -18mA -1.2 -1.2 -1.2 V
Input High Voltage VIH 2.0 2.0 2.0 V
Input Low Voltage VIL 0.8 0.8 0.8 V
LVECL/ECL OUTPUTS (Q, Q)
Output High
Voltage VOH -1.145 -0.885 -1.145 -0.885 -1.145 -0.885 V
Output Low Voltage VOL -1.935 -1.625 -1.935 -1.625 -1.935 -1.625 V
Differential Output
Swing (VOH - VOL)
VOH -
VOL 550 550 550 mV
Power-Supply
Current ICC (Note 4) 4.3 7.0 5.0 7.0 5.6 7.0 mA
Internal Chip
Current IEE (Note 4) 12.3 20 13.8 20 15.2 20 mA
MAX9360/MAX9361
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
_______________________________________________________________________________________ 3
DC ELECTRICAL CHARACTERISTICS—MAX9361
(VCC = 4.5V to 5.5V, VEE = -2.375V to -5.5V, VGND = 0, outputs terminated with 50Ω±1% to -2.0V. Typical values are at VCC = 5V,
VIH = 2.0V, VIL = 0.8V, unless otherwise noted.) (Notes 1, 2, 3)
-40°C (SO) +25°C +85°C
PARAMETER SYMBOL CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX
UNITS
TTL INPUT (D)
VIN = 2.7V -30 +30 -30 +30 -30 +30
Input High Current IIH VIN = VCC -10 +10 -10 +10 -10 +10 µA
Input Low Current IIL VIN = 0.5V -200 -55 -200 -61 -200 -71 µA
Input Clamp
Voltage VIK IIN = -18mA -1.2 -1.2 -1.2 V
Input High Voltage VIH 2.0 2.0 2.0 V
Input Low Voltage VIL 0.8 0.8 0.8 V
LVECL/ECL OUTPUTS (Q, Q)
Output High
Voltage VOH -1.055 -0.880 -1.055 -0.880 -1.025 -0.880 V
Output Low Voltage VOL -1.875 -1.555 -1.810 -1.605 -1.810 -1.605 V
Differential Output
Swing (VOH - VOL)
VOH -
VOL 550 699 550 691 550 677 mV
POWER SUPPLY
Power-Supply
Current ICC (Note 4) 3.0 7.0 3.5 7.0 4.3 7.0 mA
Internal Chip
Current IEE (Note 4) 9 20 10 20 11 20 mA
Note 1: Measurements are made with the device in thermal equilibrium.
Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3: DC parameters are production tested at +25°C. DC limits are guaranteed by design and characterization over the full
operating temperature range.
Note 4: All pins are open except VCC, VEE, and GND.
Note 5: Guaranteed by design and characterization. Limits are set to ±6 sigma.
Note 6: Device jitter added to the input signal.
MAX9360/MAX9361
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
4 _______________________________________________________________________________________
AC ELECTRICAL CHARACTERISTICS—MAX9360
(VCC = 3.0V to 3.6V, VEE = -2.375V to -5.5V, VGND = 0, outputs terminated with 50Ω±1% to -2.0V, input frequency = 1.0GHz, input
transition time = 125ps (20% to 80%). Typical values are at VCC = 3.3V, VIH = 2.0V, VIL = 0.8V, unless otherwise noted.) (Note 5)
0°C (SOT23)
-40°C (SO) +25°C +85°C
PARAMETER SYMBOL CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX
UNITS
VOH - VOL ≥ 300mV 1.0 3.0 1.0 3.0 1.0 3.0
Maximum Toggle
Frequency fMAX VOH - VOL ≥ 500mV 0.85 1.5 0.85 1.5 0.85 1.5 GHz
Input-to-Output
Propagation Delay
tPLHD,
tPHLD Figure 1 300 800 300 800 300 800 ps
Output Rise/Fall
Time tR, tFFigure 1 70 97 150 80 105 150 100 122 150 ps
Added
Deterministic Jitter tDJ
2Gbps
223 - 1 PRBS pattern
(Note 6)
43 70 43 70 43 70 ps
(
P-P
)
Added Random
Jitter tRJ 1.0GHz clock
pattern (Note 6) 1.4 3.0 1.5 3.0 1.5 3.0 ps
(
RMS
)
AC ELECTRICAL CHARACTERISTICS—MAX9361
(VCC = 4.5V to 5.5V, VEE = -2.375V to -5.5V, VGND = 0, outputs terminated with 50Ω±1% to -2.0V, input frequency = 100MHz, input
transition time = 125ps (20% to 80%). Typical values are at VCC = 5.0V, VIH = 2.0V, VIL = 0.8V, unless otherwise noted.) (Note 5)
-40°C +25°C +85°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
VOH - VOL ≥ 300mV 250 1300 250 1300 250 1300
Maximum Toggle
Frequency fMAX VOH - VOL ≥ 500mV 150 500 150 500 150 500 MHz
Input-to-Output
Propagation Delay
tPLHD,
tPHLD Figure 1 300 561 900 300 583 900 300 607 900 ps
Output Rise/Fall
Time tR, tFFigure 1 250 340 1000 250 342 1000 250 353 1000 ps
Added
Deterministic Jitter tDJ
200Mbps
223 - 1 PRBS pattern
(Note 6)
81 150 83 150 85 150 ps
(
P-P
)
Added Random
Jitter tRJ 100MHz clock
pattern (Note 6) 410 410 410ps
(
RMS
)
MAX9360/MAX9361
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
_______________________________________________________________________________________
5
0
4
12
8
16
20
-40 10-15 35 60 85
SUPPLY CURRENT vs. TEMPERATURE
MAX9360 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
IEE
ICC
Typical Operating Characteristics
(MAX9360: VCC = 3.3V and VEE = -5V, VIH = 2.0V, VIL = 0.8V, TA= +25°C, outputs terminated with 50Ωto -2V, input frequency
= 1GHz, input transition time = 125ps (20% to 80%), unless otherwise noted.)
300
450
400
350
500
550
600
650
700
750
800
0 1000500 1500 2000 2500 3000
OUTPUT AMPLITUDE vs. FREQUENCY
MAX9360 toc02
FREQUENCY (MHz)
OUTPUT AMPLITUDE (mV)
80
90
110
100
120
130
-40 10-15 35 60 85
TRANSITION TIME vs. TEMPERATURE
MAX9360 toc03
TEMPERATURE (°C)
TRANSITION TIME (ps)
tR
tF
350
400
375
450
425
475
500
-40 10-15 35 60 85
PROPAGATION DELAY vs. TEMPERATURE
MAX9360 toc4
TEMPERATURE (°C)
PROPAGATION DELAY (ps)
tPLHD
tPHLD
MAX9360/MAX9361
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
6 _______________________________________________________________________________________
Pin Description
PIN
SO SOT23
NAME FUNCTION
12V
EE
Negative Supply Voltage. Bypass VEE to GND with 0.1µF and 0.01µF ceramic capacitors.
Place the capacitors as close as possible to the device with the smaller value capacitor
closest to the device.
2 1 D LVTTL/CMOS Input for MAX9360. TTL/CMOS input for MAX9361.
3, 4 3, 4 N.C. No Connect. Connect to GND.
5 8 GND Ground
67 QInverting Differential LVECL/ECL Output. Typically terminate with 50Ω resistor to -2V.
7 6 Q Noninverting Differential LVECL/ECL Output. Typically terminate with 50Ω resistor to -2V.
85V
CC
Positive Supply Voltage. Bypass VCC to GND with 0.1µF and 0.01µF ceramic capacitors.
Place the capacitors as close as possible to the device with the smaller value capacitor
closest to the device.
50% 50%
tPLH tPHL
VOH - VOL
VOH - VOL
VOH - VOL
tRtF
80%
20% 20%
80%
0 (DIFFERENTIAL)
DIFFERENTIAL WAVEFORM
SINGLE-ENDED WAVEFORMS
D
Q
Q
Q - Q
VOH
VOL
VIL
VIH
Figure 1. Input-to-Output Propagation Delay and Transition Timing Diagram
Detailed Description
The MAX9360/MAX9361 are low-skew, single LVTTL/
CMOS/TTL-to-differential LVECL/ECL translators
designed for high-speed signal and clock driver appli-
cations. For interfacing to LVTTL/TTL/CMOS input sig-
nals, these devices operate over a 3.0V to 5.5V supply
range, allowing high-performance clock or data distrib-
ution in systems with a nominal 3.3V or 5.0V supply. For
interfacing to differential LVECL/ECL output signals,
these devices operate from a -2.375V to -5.5V supply.
The MAX9360 is a 3.3V LVTTL/CMOS-to-LVECL/ECL
translator that operates at typical speeds of 3GHz. The
MAX9361 is a 5V TTL/CMOS-to-LVECL/ECL translator that
operates at typical speeds of 1.3GHz. Both devices can
be used to drive either LVECL devices or standard ECL
devices with a negative supply range of -2.375V to -5.5V.
Input
The MAX9360/MAX9361 inputs accept standard LVTTL/
TTL/CMOS levels. The input has pullup circuitry that dri-
ves the outputs to a differential high if the inputs are open.
Differential Output
Output levels are referenced to GND and are considered
ECL or LVECL, depending on the level of the VEE supply.
With GND connected to zero and VEE at -4.2V to -5.5V,
the outputs are ECL. The outputs are LVECL when GND is
connected to zero and VEE is at -2.375V to -3.8V.
Applications Information
Supply Bypassing
Bypass VCC and VEE to ground with high-frequency
surface-mount ceramic 0.1µF and 0.01µF capacitors in
parallel as close as possible to the device, with the
0.01µF value capacitor closest to the device. Use multi-
ple parallel vias for low inductance.
Traces
Input and output trace characteristics affect the perfor-
mance of the MAX9360/MAX9361. Connect each signal
of a differential output to a 50Ωcharacteristic imped-
ance trace. Minimize the number of vias to prevent
impedance discontinuities. Reduce reflections by main-
taining the 50Ωcharacteristic impedance through con-
nectors and across cables. Reduce skew within a
differential pair by matching the electrical length of the
traces.
On the MAX9360, if the input edge rate approaches the
electrical length of the interconnect, then controlled-
impedance transmission lines should be used for the
input traces.
Output Termination
Terminate outputs through 50Ωto -2V or use an equiva-
lent Thevenin termination. Terminate both outputs and
use the same termination on each for the lowest output-
to-output skew. When a single-ended signal is taken
from a differential output, terminate both outputs. For
example, if Q is used as a single-ended output, termi-
nate both Q and Q.
Ensure that the output currents do not exceed the con-
tinuous safe output current limit or surge output current
limit as specified in the
Absolute Maximum Ratings
table. Under all operating conditions, the device’s total
thermal limits should be observed.
Chip Information
PROCESS: Bipolar
MAX9360/MAX9361
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
_______________________________________________________________________________________ 7
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
8 SOT23 K8-1 21-0078
8 SO S8-2 21-0041
MAX9360/MAX9361
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8
_____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 1/02 Initial release —
1 7/02 — —
2 12/08 Removed incorrect temperature range specified in the data sheet. 1
