1
Motorola Small–Signal Transistors, FETs and Diodes Device Data
  
NPN Silicon
MAXIMUM RATINGS
Rating Symbol Value Unit
CollectorEmitter Voltage VCES 30 Vdc
CollectorBase Voltage VCBO 30 Vdc
EmitterBase Voltage VEBO 10 Vdc
Collector Current — Continuous IC300 mAdc
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Total Device Dissipation FR–5 Board(1)
TA = 25°C
Derate above 25°C
PD225
1.8
mW
mW/°C
Thermal Resistance Junction to Ambient R
q
JA 556 °C/W
Total Device Dissipation
Alumina Substrate,(2) TA = 25°C
Derate above 25°C
PD300
2.4
mW
mW/°C
Thermal Resistance Junction to Ambient R
q
JA 417 °C/W
Junction and Storage Temperature TJ, Tstg 55 to +150 °C
DEVICE MARKING
MMBTA13LT1 = 1M; MMBTA14LT1 = 1N
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Max Unit
OFF CHARACTERISTICS
CollectorEmitter Breakdown Voltage
(IC = 100
m
Adc, VBE = 0) V(BR)CES 30 Vdc
Collector Cutoff Current
(VCB = 30 Vdc, IE = 0) ICBO 100 nAdc
Emitter Cutoff Current
(VEB = 10 Vdc, IC = 0) IEBO 100 nAdc
1. FR–5 = 1.0
0.75
0.062 in.
2. Alumina = 0.4
0.3
0.024 in. 99.5% alumina.
Thermal Clad is a trademark of the Bergquist Company
Preferred devices are Motorola recommended choices for future use and best overall value.
Order this document
by MMBTA13LT1/D
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SEMICONDUCTOR TECHNICAL DATA
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*Motorola Preferred Device
12
3
CASE 31808, STYLE 6
SOT–23 (TO236AB)
Motorola, Inc. 1996
COLLECTOR 3
BASE
1
EMITTER 2
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2 Motorola Small–Signal Transistors, FETs and Diodes Device Data
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Characteristic Symbol Min Max Unit
ON CHARACTERISTICS(3)
DC Current Gain
(IC = 10 mAdc, VCE = 5.0 Vdc) MMBTA13
MMBTA14
(IC = 100 mAdc, VCE = 5.0 Vdc) MMBTA13
MMBTA14
hFE 5000
10,000
10,000
20,000
CollectorEmitter Saturation Voltage
(IC = 100 mAdc, IB = 0.1 mAdc) VCE(sat) 1.5 Vdc
BaseEmitter On Voltage
(IC = 100 mAdc, VCE = 5.0 Vdc) VBE 2.0 Vdc
SMALL–SIGNAL CHARACTERISTICS
CurrentGain — Bandwidth Product(4)
(IC = 10 mAdc, VCE = 5.0 Vdc, f = 100 MHz) fT125 MHz
3. Pulse Test: Pulse Width
v
300
m
s, Duty Cycle
v
2.0%.
4. fT = |hfe| ftest.
RSin
enIDEAL
TRANSISTOR
Figure 1. Transistor Noise Model
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3
Motorola Small–Signal Transistors, FETs and Diodes Device Data
NOISE CHARACTERISTICS
(VCE = 5.0 Vdc, TA = 25°C)
Figure 2. Noise Voltage
f, FREQUENCY (Hz)
50
100
200
500
20
Figure 3. Noise Current
f, FREQUENCY (Hz)
Figure 4. Total Wideband Noise Voltage
RS, SOURCE RESISTANCE (k
)
Figure 5. Wideband Noise Figure
RS, SOURCE RESISTANCE (k
)
5.0
50
70
100
200
30
10
20
1.0
10
10
20 50 100 200 500 1 k 2 k 5 k 10 k 20 k 50 k 100 k
2.0
1.0
0.7
0.5
0.3
0.2
0.1
0.07
0.05
0.03
0.02
BANDWIDTH = 1.0 Hz
RS
0
IC = 1.0 mA
100
µ
A
10
µ
A
BANDWIDTH = 1.0 Hz
IC = 1.0 mA
100
µ
A
10
µ
A
en, NOISE VOLTAGE (nV)
in, NOISE CURRENT (pA)
2.0 5.0 10 20 50 100 200 500 100
0
BANDWIDTH = 10 Hz TO 15.7 kHz
IC = 10
µ
A
100
µ
A
1.0 mA
8.0
10
12
14
6.0
0
4.0
1.0 2.0 5.0 10 20 50 100 200 500 100
0
2.0
BANDWIDTH = 10 Hz TO 15.7 kHz
10
µ
A
100
µ
A
IC = 1.0 mA
VT, TOTAL WIDEBAND NOISE VOLTAGE (nV)
NF, NOISE FIGURE (dB)
10 20 50 100 200 500 1 k 2 k 5 k 10 k 20 k 50 k 100 k
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4 Motorola Small–Signal Transistors, FETs and Diodes Device Data
SMALL–SIGNAL CHARACTERISTICS
Figure 6. Capacitance
VR, REVERSE VOLTAGE (VOLTS)
5.0
7.0
10
20
3.0
Figure 7. High Frequency Current Gain
IC, COLLECTOR CURRENT (mA)
Figure 8. DC Current Gain
IC, COLLECTOR CURRENT (mA)
Figure 9. Collector Saturation Region
IB, BASE CURRENT (
µ
A)
2.0
200 k
5.0
0.04
4.0
2.0
1.0
0.8
0.6
0.4
0.2
TJ = 25
°
C
C, CAPACITANCE (pF)
1.5
2.0
2.5
3.0
1.0
0.5
|hfe|, SMALL–SIGNAL CURRENT GAIN
hFE, DC CURRENT GAIN
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
0.1 0.2 0.4 1.0 2.0 4.0 10 20 40
Cibo
Cobo
0.5 1.0 2.0 0.5 10 20 50 100 200 500
VCE = 5.0 V
f = 100 MHz
TJ = 25
°
C
100 k
70 k
50 k
30 k
20 k
10 k
7.0 k
5.0 k
3.0 k
2.0 k 7.0 10 20 30 50 70 100 200 300 500
TJ = 125
°
C
25
°
C
55
°
CVCE = 5.0 V
0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100 200 500 1000
TJ = 25
°
C
IC = 10 mA 50 mA 250 mA 500 mA
Figure 10. “On” Voltages
IC, COLLECTOR CURRENT (mA)
Figure 11. Temperature Coefficients
IC, COLLECTOR CURRENT (mA)
1.6
5.0
1.0
V, VOLTAGE (VOLTS)
1.4
1.2
1.0
0.8
0.6 7.0 10 20 30 50 70 100 200 300 500
VBE(sat) @ IC/IB = 1000
RV, TEMPERATURE COEFFICIENTS (mV/ C)
°
θ
TJ = 25
°
C
VBE(on) @ VCE = 5.0 V
VCE(sat) @ IC/IB = 1000
2.0
3.0
4.0
5.0
6.05.0 7.0 10 20 30 50 70 100 200 300 500
25
°
C TO 125
°
C
55
°
C TO 25
°
C
*R
q
VC FOR VCE(sat)
q
VB FOR VBE
25
°
C TO 125
°
C
55
°
C TO 25
°
C
*APPLIES FOR IC/IB
hFE/3.0
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5
Motorola Small–Signal Transistors, FETs and Diodes Device Data
Figure 12. Thermal Response
t, TIME (ms)
1.0
r(t), TRANSIENT THERMAL
2.0 5.01.00.50.20.1
RESISTANCE (NORMALIZED)
0.7
0.5
0.3
0.2
0.1
0.07
0.05
0.03
0.02
0.01 20 5010 200 500100 1.0 k 2.0 k 5.0 k 10 k
Figure 13. Active Region Safe Operating Area
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
1.0 k
0.4
700
500
300
200
100
70
50
30
20
10 0.6 1.0 2.0 4.0 6.0 10 20 40
IC, COLLECTOR CURRENT (mA)
TA = 25
°
C
D = 0.5
0.2
0.1 0.05 SINGLE PULSE
SINGLE PULSE
CURRENT LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
Z
θ
JC(t) = r(t)
R
θ
JC TJ(pk) – TC = P(pk) Z
θ
JC(t)
Z
θ
JA(t) = r(t)
R
θ
JA TJ(pk) – TA = P(pk) Z
θ
JA(t)
1.0 ms
100
µ
s
TC = 25
°
C
1.0 s
Design Note: Use of Transient Thermal Resistance Data
FIGURE A
tP
PPPP
t1
1/f
DUTY CYCLE
+
t1f
+
t1
tP
PEAK PULSE POWER = PP
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6 Motorola Small–Signal Transistors, FETs and Diodes Device Data
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
SOT–23
mm
inches
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by TJ(max), the maximum rated junction temperature of the
die, RθJA, the thermal resistance from the device junction to
ambient, and the operating temperature, TA. Using the
values provided on the data sheet for the SOT–23 package,
PD can be calculated as follows:
PD = TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature T A of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.
PD = 150°C – 25°C
556°C/W = 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad. Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
Always preheat the device.
The delta temperature between the preheat and
soldering should be 100°C or less.*
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
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7
Motorola Small–Signal Transistors, FETs and Diodes Device Data
PACKAGE DIMENSIONS
DJ
K
L
A
C
BS
H
GV
3
12
CASE 318–08
ISSUE AE
SOT–23 (TO–236AB)
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
DIM
AMIN MAX MIN MAX
MILLIMETERS
0.1102 0.1197 2.80 3.04
INCHES
B0.0472 0.0551 1.20 1.40
C0.0350 0.0440 0.89 1.11
D0.0150 0.0200 0.37 0.50
G0.0701 0.0807 1.78 2.04
H0.0005 0.0040 0.013 0.100
J0.0034 0.0070 0.085 0.177
K0.0180 0.0236 0.45 0.60
L0.0350 0.0401 0.89 1.02
S0.0830 0.0984 2.10 2.50
V0.0177 0.0236 0.45 0.60
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
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8 Motorola Small–Signal Transistors, FETs and Diodes Device Data
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and specifically disclaims any and all liability , including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different
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MMBTA13LT1/D
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