HARRIS SEMICONDUCTOR CD4060BMS CMOS 14 Stage Ripple-Carry Binary Counter/Divider and Oscillator December 1992 Features Pinout High Voitage Type (20V Rating) vu Common Reset ou is] voo a3 [2 hg] ato 12MHz Clock Rate at 15V aufs ha] 8 * Fully Static Operation as fa Hal ao Buffered Inputs and Outputs as [5 12] RESET Schmitt Trigger Input Pulse Line or |s ae as H * Standardized, Symmetrical Output Characteristics z * vss [ 9] a 100% Tested for Quiescent Current at 20V e 5V, 10V and 15V Parametric Ratings Meets All Requirements of JEDEC Tentative Standard B Series CMOS Devices Oscillator Features * All Active Components on Chip RC or Crystal Oscillator Configuration RC Oscillator Frequency of 690kHz Min. at 15V Applications * Control counters Timers Frequency Dividers Time Delay Circuits Description CD4060BMS consists of an oscillator section and 14 ripple carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A RESET input is provided which resets the counter to the all O's state and dis- ables the oscillator. A high fevel on the RESET line accom- plishes the reset function. All counter stages are master slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition of a1 (and a9). All inputs and outputs are fully buffered. Schmitt trigger action on the input pulse line permits unlimited input pulse rise and fall times. The CD4060BMS is supplied in these 16 lead outline pack- ages: Braze Seal DIP Haw Frit Seal DIP H1F Ceramic Flatpack H6W No. 138, Standard Specifications for Description of | Functional Diagram 14 STAGE RIPPLE COUNTER bbb556 LOGIC OSCILLATOR r (2)> a1 (1) +> 2 @) VSS =8 VOD = 16 ol bb6 f'3 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper |.C. Handling Procedures. Copyright Harris Corporation 1992 7-949 FileNumber 3317Specifications CD4060BMS Absolute Maximum Ratings DC Supply Voltage Range, (VDD) ............... 0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs ............. -0.5V to VDD +0.5V DC Input Current, Any One Input............... 000.000 00 +10mA Operating Temperature Range................ -55C to +125C Package Types D, F, K, H Storage Temperature Range (TSTG)........... -65C to +150C Lead Temperature (During Soldering) ................. +265C At Distance 1/16 + 1/32 Inch (1.59mm + 0.79mm) from case for Reliability Information Thermal Resistance ...........20.2. Oe Ge Ceramic DIP and FRIT Package ..... 80C/W 20C/w Flatpack Package ................ 7OCW 20C/W Maximum Package Power Dissipation (PD) at +125C For TA = -55C to +100C (Package Type D,F,K) ...... 500mw For TA = +100C to +125C (Package Type D, F,K)...... Derate Linearity at 12mW/C to 200mWw Device Dissipation per Output Transistor ............... 100mWw For TA = Full Package Temperature Range (All Package Types) 10s Maximum Junction Temperature... 0.0... ccc cece ccc cncsceeus +175C TABLE 1. DC ELECTRICAL PERFORMANCE CHARACT! ERISTICS GROUP A LIMITS PARAMETER SYMBOL CONDITIONS (NOTE 1) SUBGROUPS] TEMPERATURE MIN | MAX JUNITS Supply Current 100 VDD = 20V, VIN = VDD or GND 1 +25C - 10 pA 2 +125C - 1000 pA VDD = 18V, VIN = VDD or GND 3 -55C - 10 pA Input Leakage Current Ith VIN = VDD or GND VDD = 20 1 +25C -100 - nA 2 +125C -1000] - nA VDD = 18V 3 -55C -100 - nA Input Leakage Current {IH VIN=VDDorGND- |VDD=20 1 +25C - 100 nA 2 +125C - 1000 nA VDD = 18V 3 -55C - 100 nA Output Voltage VOL15 |VDD = 15V, No Load 1,2,3 +25C, +125C, -55C - 50 mV Output Voitage VOH15 {VDD = 15V, No Load (Note 3) 1,2,3 +25C, +125C, -55C| 14.95 - Vv Output Current (Sink) IOLS |VDD = 5V, VOUT = 0.4V 1 +25C 0.53 - mA (Excluding pins 9 & 10) [oro Tvop = 10V, VOUT = 0.5V 1 +25C 14 7 - | ma fOL15 |VDD = 15V, VOUT = 1.5V 1 425C 3.5 - mA Output Current (Source)| IOH5SA |VDD = 5V, VOUT = 4.6V 1 +25C - 0.53 | mA (Excluding pins 9 & 10) [Tories Ivpp = ev, VOUT = 2.5v 1 425C - | -18 | ma 10H10 |VDD = 10V, VOUT = 9.5V 1 +25C - -1.4 mA 1OH15 |VDD = 15V, VOUT = 13.5V 1 425C - -3.5 mA N Threshold Voltage VNTH {VDD = 10V, ISS = -10pnA 1 +25C -2.8 0.7 Vv P Threshold Voltage VPTH {VSS = OV, IDD = 10uA 1 +25C 0.7 2.8 Vv Functional F VDD = 2.8V, VIN = VDD or GND 7 +25C VOH>|VOL<] Vv VDD = 20V, VIN = VDD or GND 7 +25C vbD/2 | voD/2 VDD = 18V, VIN = VDD or GND 8A +125C VDD = 3V, VIN = VDD or GND 8B -55C Input Voltage Low VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1,2,3 425C, +125C, -55C - 1.5 v (Note 2) Input Voltage High VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 4,2,3 425C, +125C, -55C! 3.5 - Vv (Note 2) Input Voltage Low VIL VDD = 15V, VOH > 13.5V, 1,2,3 +25C, +125C, -55C - 4 Vv (Note 2) VOL < 1.5V Input Voltage High VIH__|VOD = 15V, VOH > 13.5V, 1,2,3 [+25C, +125C, -55C] 11 - v (Note 2) VOL < 1.5V NOTES: 1. All voltages referenced to device GND, 100% testing being 3. For accuracy, voltage is measured differentially to VDD. Limit implemented. 2. Go/No Go test with limits applied to inputs. is 0.050V max. 7-950Specifications CD4060BMS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A LIMITS PARAMETER SYMBOL | CONDITIONS (NOTES 1,2) | SUBGROUPS | TEMPERATURE} MIN MAX | UNITS Propagation Delay TPHL1 | VDD = 5V, VIN = VDD or GND 9 +25C - 740 ns se ea eration) TPL 10, 11 +125C, 55C | - 999 | ns Propagation Delay TPHL2 | VDD = 5V, ViN = VDO or GND 9 +25C - 200 ns QN to QN + 1 TPLH2 10, 11 +125C, 55C | - 270 | ns Propagation Delay TPHL3 | VDD = 5V, VIN = VDD or GND 9 +25C - 360 ns RESET 10, 14 +125C, 55C | - 406 | ns Transition Time TTHL [VOD = 5V, VIN = VDD or GND 9 +25C : 200 ns TTLH 10, 11 +125C, -55C : 270 As Maximum Input Pulse Fot VDD = 5V 9 +25C 3.5 - MHz Frequency VIN = VDD or GND 40, 11 +125C, -55C | 2.59 - MHz NOTES: 1. VDD = 5V, CL = 50pF, RL = 200K 2. -55C and +125C limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE} MIN MAX | UNITS Supply Current IDD VDD = 5V, VIN = VDD or GND 1,2 -55C, +25C - 5 pa +125C - 150 pA VOD = 10V, VIN = VDD or GND 1,2 55C, +25C : 10 pA +125C - 300 pA VDD = 15V, VIN = VDD or GND 1,2 -55C, +25C . 10 pA +125C - 600 pA o Output Voltage VOL VDD = 5V, No Load 1,2 425C, +125C, - 50 mV -55C 4 Output Voltage VOL VDD = 10V, No Load 1,2 425C, +125C, : 50 mV 55C Output Voltage VOH VDD = 5V, No Load 1,2 +25C, +125C, | 4.95 . v 55C Output Voitage VOH VDD = 10V, No Load 1,2 +25C, +125C, | 9.95 - Vv -55C Output Current (Sink) IOLS VOD = 5V, VOUT = 0.4V 1,2 +125C 0.36 . mA (Excluding pins 9 & 10) 55C 0.64 , mA Output Current (Sink) 1OL10 VDD = 10V, VOUT = 0.5V 1,2 +125C 0.9 - mA (Excluding pins 9 & 10) 55C 16 , mA Output Current (Sink) tOL15 VDD = 15V, VOUT = 1.5V 1,2 +125C 2.4 : mA (Excluding pins 9 & 10) 55C 42 ~ mA Output Current IOH5A VDD = 5V, VOUT = 4.6V 1,2 +126C . 0.36 mA (Excluding pins 9 & 10) 55C - 0.64 | mA Output Current lOH58 VOD = 5V, VOUT = 2.5V 1,2 +125C - 1.15 mA (eeuing pins 9 & 10) 55C , "2.0 | mA Output Current IOH10 VDD = 10V, VOUT = 9.5V 1,2 +125C - 0.9 mA (excluding pins 9 & 10) 55C - 1.6 | mA 7-951Specifications CD4060BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE| MIN MAX | UNITS Output Current 1OH15 VDD =15V, VOUT = 13.5V 1,2 +125C - -2.4 mA (Eecleang pins 9 & 10) 55C " 42 | ma Input Voltage Low vit VDD = 10V, VOH > 9V, 1,2 +25C, +125C, : 3 Vv VOL < 1V -55C Input Voltage High VIH VDD = 10V, VOH > 9v, 1,2 +25C, +125C, +7 - Vv VOL <1V -55C Drive Current at Pin 9 fOL VDD = 5V, VO = .4V 3 +25C 0.16 - mA Oscillator Design VDD = 10V, VO = .5V 3 +25C 0.42 . mA VDD = 15V, VO = 1.5V 3 +25C -1.0 : mA Drive Current at Pin 9 1OH VOD = 5V 1,2,3 +25C - -.16 mA Oscillator Design VDD = 10V 1,2,3 +25C - -42 | mA VDD = 15V 1,2,3 +25C - 1.0 mA Propagation Delay TPHi1 VOD = 10V 1,2,3 +25C - 300 ns Input Pulse al to Q4 TPLH1 VDD = 15V 1,2,3 425C ~ 200 ns Propagation Delay TPHL2 [VDD=10V 1,2,3 +25C - 100 ns QN to ON + 1 TPLH2 [Von = 15v 1,2,3 425C : 80 ns Propagation Delay TPHL3 VDO = 10V 1,2,3 +25C - 160 ns RESET VDD = 15V 1,2,3 +25C . 100 ns Transition Time TTHLE VDD = 10V 1,2,3 +25C . 100 ns TTLH VOD = 15V 1,2,3 +25C : 80 ns Maximum Input Puise FOI VDD = 10V 1,2,3 +25C 8 - MHz Frequency VDD = 15V 1,2,3 +25C 12 - MHz Minimum RESET Pulse Tw VDD = 5V 1,2,3 425C : 120 ns Width VDD = 10V 1,2,3 +25C - 60 | ns VDD = 15V 1,2,3 +25C : 40 ns Minimum Input Pulse Tw VDD = 5V 1,2,3 +25C - 100 ns Pe KHz VDD = 10V 1,2,3 +25C : 40 ns VDD = 15V 1,2,3 +25C. - 30 ns RC Operation RX Max RX VDD = 5V, CX = 10uF 2,3 +25C : 20 MQ VDD = 10V, CX = 50uF 2.3 +25C : 20 MQ VDD = 15V, CX = 10nF 2,3 +25C . 10 MQ , RC Operation CX Max CX VDD = 5V, RX = 500kQ 2,3 +25C . 1000 pF VDD = 10V, RX = 300kQ 2,3 +25C - 50 pF VOD = 15V, RX = 300kQ 2,3 +25C. - 50 pF Maximum Oscillator RX =5kQ. | VDD = 10V 2,3 +25C 530 810 ns Frequency (Note 4) | CX=15pF [ion yey 2,3 425C 690 | 940 | ns RC Operation Variation | CX =200pF [ VDD = 5V 2,3 +25C 18 25 kHz (Unticung Keon VDD = 10V 2,3 425C 20 26 | kHz VOD = 15V 2,3 425C 21.1 27 kHz Variation of Frequency | CX = 200pF | 5V to 10V 2,3 +25C - 2 kHz (Same UND Change eek 10V to 15V 2,3 +25C . 1 kHz 7-952Specifications CD4060BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE| MIN MAX | UNITS Input Capacitance CIN Any Input 1,2 +25C - 75 pF NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 4. RC Oscillator applications are not recommended at supply voltages below 7V for RX < 50kQ. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS UMITS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE} MIN MAX | UNITS Supply Current IDD | VDD = 20V, VIN = VDD or GND 1,4 +25C - 25 pA N Threshold Voltage VNTH_ | VDD = 10V, ISS = -10pA 1,4 425C -2.8 -0.2 v N Threshold Voltage AVTN_ | VOD = 10V, ISS = -10pA 1,4 +25C : 41 Vv Delta P Threshold Voltage VPTH 1 VSS =OV, IDD = 10pA 1,4 +25C 0.2 2.8 v P Threshold Voltage AVTP | VSS = OV, IDD = 10pA 1,4 +25C - 41 Vv Delta Functional F VDD = 18V, VIN = VDD or GND 1 +25C VOH > | VOL < v VDD = 3V, VIN = VDD or GND voo/2 | v0D/2 Propagation Delay Time TPHL }VDO=5V 1,2, 3,4 +25C - 1.35 x ns TPLH +25C Limit NOTES: 1. All voltages referenced to device GND. 3. See Table 2 for +25C limit. 2. CL = SOpF, RL = 200K, Input TR, TF < 20ns. 4. Read and Record TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25C PARAMETER SYMBOL DELTA LIMIT Supply Current - MSI-2 lod + 1.0pA Output Current (Sink) 1OLs + 20% x Pre-Test Reading Output Current (Source) IOH5A + 20% x Pre-Test Reading TABLE 6. APPLICABLE SUBGROUPS MIL-STD-883 CONFORMANCE GROUP METHOD GROUP A SUBGROUPS READ AND RECORD Initial Test (Pre Bum-tn) 100% 5004 1,7,9 IDD, IOLS, IOHSA Interim Test 1 (Post Burn-in) 100% 5004 1,7,9 IDD, IOL5, IOHSA Interim Test 2 (Post Burn-in) 100% 5004 1,7,9 IDD, 1OL5, IOHSA PDA (Note 1) 100% 5004 1,7, 9, Deltas Interim Test 3 (Post Burn-in) 100% 5004 1,7,9 IOD, |OL5, IOHSA PDA (Note 1) 100% 5004 1,7, 9, Deltas Final Test 100% 5004 2, 3, 8A, 8B, 10, 11 Group A Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11 Group B Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2,3, 9, 10, 11 Subgroup B-6 Sample 5005 1,7,9 7-953 LOGICSpecifications CD4060BMS TABLE 6. APPLICABLE SUBGROUPS (Continued) MIL-STD-883 CONFORMANCE GROUP METHOD GROUP A SUBGROUPS READ AND RECORD Group D Sampie 5005 1, 2, 3, 8A, 8B, 9 Subgroups 1,23 NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-e83 TEST READ AND RECORD CONFORMANCE GROUPS METHOD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD Group E Subgroup 2 5005 1,7,9 Table 4 1,9 Table 4 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION OPEN GROUND vpD 9V + -0.5V SOkHz 25kHz Static Bum-in 1 Note 1 | 1-7, 9, 10, 13-15 8, 11, 12 16 Static Bum-in 2 Note 1 | 1-7, 9, 10, 13-15 8 11, 12, 16 Dynamic Burn-in Note 1 - 8, 12 16 1-7,9, 10, 13-15 a : Irradiation Note 2 1-7, 9, 10, 13-15 8 11, 12, 16 NOTES: 1. Each pin except VDD and GND will have a series resistor of 10K + 5%, VDD = 18V + 0.5V 2, Each pin except VDD and GND will have a series resistor of 47K + 5%; Group E, Subgroup 2, sample siza Is 4 dica/wafer, 0 failures, VDD = 10V + 0.5V Logic Diagram a4-ato R= HIGH DOMINATES (RESETS ALL STAGES) 12, a13 ff VOD ALL INPUTS ARE PROTECTED * COUNTER ADVANCES ONE BINARY COUNT NETWORK POro ON EACH NEGATIVE - GOING TRANSITION OF ef (AND #0) vss DETAIL OF TYPICAL FLIP-FLOP STAGE 7-954CD4060BMS Typical Performance Curves AMBIENT = a 8 R 8 a OUTPUT LOW (SINK) CURRENT (IOL) (mA) 0 5 10 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 1. TYPICAL N-CHANNEL OUTPUT LOW SINK CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) AMBIENT TEMPERATURE (Ta) = 425C GATE-TO-SOURCE VOLTAGE (VGS) = 5V 2 & = a sek 8&8 OUTPUT HIGH (SOURCE) CURRENT (10H) (mA) FIGURE 3. TYPICAL P-CHANNEL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS ny T T J & AMBIENT TEMPERATURE (Ta) = 425C Z 2 = 150 3 sobpty TAGE (VDD) = 5V = vou = E 5 100 : > z 10V E 50 g ae 15V a _ * 0 9 20 40 60 80 100 LOAD CAPACITANCE (CL) (pF) FIGURE 5. TYPICAL PROPAGATION DELAY TIME (QN TO QN+1) AS A FUNCTION OF LOAD CAPACITANCE = a . 2 Soa OUTPUT LOW (SINK) CURRENT (IOL) (mA) b b 5 10 15 ORAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 2. MINIMUM N-CHANNEL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) 5__9___s AMBIENT TEMPERATURE (Tq) = +25C GATE-TO-SOURCE VOLTAGE (VGS) = 5V wt A a ) CURRENT (10H) (mA) 3 (SOURCE -15V a a OUTPUT HIGH FIGURE 4. MINIMUM P-CHANNEL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS (= 3 8 15V PROPAGATION DELAY TIME (IPLH, tPHL) (ne) 3 $8 8 8 20 40 60 80 100 LOAD CAPACITANCE (CL) (pF) FIGURE 6. TYPICAL PROPAGATION DELAY TIME (81 TO Q4 OUTPUT) AS A FUNCTION OF LOAD CAPACITANCE 7-955 LOGICCD4060BMS Typical Performance Curves (Continued) T T T T 105 6 T T AMBIENT TEMPERATURE (Ta) = 425C He AMBIENT TEMPERATURE (4) = 425C z 3 4 => ef a & 104} SUPPLY VOLTAGE (VDO) = 15V, = 200 gS 8 I 6 Z 2 af = 150 SUPPLY VOLTAGE (VDD) = 5V 5 ar = 5 10%, : e be z ra & S +100 g pases TON 8 eL LOAD CAPACITANCE oe gs f& 50 = 2 : r ams CL = 50pF = 2 a WE CL = 15pF 0 10 Leese it at 1 Loe L Loui 1 Lil 9 20 40 60 80 100 2.468 2468 2468 02 468 2 468 LOAD CAPACITANCE (CL) (pF) of 1 10 10? 10 tof INPUT FREQUENCY (fal) (kHz) FIGURE 7. TYPICAL TRANSITION TIME AS A FUNCTION OF FIGURE 8. TYPICAL DYNAMIC POWER DISSIPATION AS A LOAD CAPACITANCE FUNCTION OF INPUT FREQUENCY Test Circuits cx RS IS 2RX TO 10RX T 22.2 RXCX FIGURE 8. DYNAMIC POWER DISSIPATION TEST CIRCUIT FIGURE 10. TYPICAL RC CIRCUIT 7-956CD4060BMS Test Circuits (Continued) of @-] >-O-4 >--] RS > > > R NOTE: CXTAL = C1 + C2 + CSTRAY RC = Broader frequency response RS = Current limiting /_- i iu FIGURE 11. TYPICAL CRYSTAL CIRCUIT Chip Dimensions and Pad Layout os Sei 230 40 50 69 70 8p 99 KIS cova hen 2 ot -99 {2.311-2.515) SS -10 | 0102-0.254) | lo: S413 (2.667-2.870) 1 Dimension in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10 inch). METALLIZATION: Thickness: 11kA - 14kA, AL. PASSIVATION: 10.4kA - 15.6kA, Silane BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches 7-957 LOGIC